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ARM v8.1a adds Advanced SIMD instructions for Rounding Double Multiply Add/Subtract.
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Authored by labrinea on Nov 25 2015, 4:28 AM.

Details

Summary

The following instructions are added to AArch32 instruction set:

  • VQRDMLAH: Vector Saturating Rounding Doubling Multiply Accumulate Returning High Half
  • VQRDMLSH: Vector Saturating Rounding Doubling Multiply Subtract Returning High Half

The following instructions are added to AArch64 instruction set:

  • SQRDMLAH: Signed Saturating Rounding Doubling Multiply Accumulate Returning High Half
  • SQRDMLSH: Signed Saturating Rounding Doubling Multiply Subtract Returning High Half

This patch adds intrinsic and ACLE macro support for these instructions, as well as corresponding tests.

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Repository
rL LLVM

Event Timeline

labrinea updated this revision to Diff 41128.Nov 25 2015, 4:28 AM
labrinea retitled this revision from to ARM v8.1a adds Advanced SIMD instructions for Rounding Double Multiply Add/Subtract..
labrinea updated this object.
labrinea added reviewers: jmolloy, rengolin, cfe-commits.
labrinea updated this object.Nov 25 2015, 5:04 AM

Do these get the right diagnostics when used on CPUs without the new feature? I can't see how __ARM_FEATURE_QRDMX gets wired through to arm_neon.h.

labrinea updated this revision to Diff 41316.Nov 27 2015, 10:11 AM

@t.p.northover you were right, my patch was missing predefined guard macros for the instrinsics. I've now updated the patch.

t.p.northover accepted this revision.Nov 27 2015, 10:23 AM
t.p.northover added a reviewer: t.p.northover.

Thanks, LGTM!

Tim.

This revision is now accepted and ready to land.Nov 27 2015, 10:23 AM
This revision was automatically updated to reflect the committed changes.