[Verifier] Allow DW_OP_LLVM_entry_value in IR

[fdeazeve]

Summary

A follow up patch will make the CoroSplit pass introduce such operations in the
IR level when it is safe to do so.

Depends on D149748

[aprantl]

I think you may also need to update the IR documentation for this?

[fdeazeve]

Update docs

[fdeazeve]

In D149778#4316658, @aprantl wrote:

I think you may also need to update the IR documentation for this?

Good point! I've added a line about that in the LangRef in this patch, but will also amend the follow up review to note that the CoroSplit pass inserts this operation.

[fdeazeve]

Be slightly more explicit in the text

[fdeazeve]

Update verifier code to first check if the operand is a ValueAsMetadata.

llvm/lib/IR/Verifier.cpp

 
 void Verifier::verifyNotEntryValue(const DbgVariableIntrinsic &I) {
   DIExpression *E = dyn_cast_or_null<DIExpression>(I.getRawExpression());
 
   // We don't know whether this intrinsic verified correctly.
   if (!E || !E->isValid())
     return;
 
-  CheckDI(!E->isEntryValue(), "Entry values are only allowed in MIR", &I);
+  // We allow EntryValues for swift async arguments, as they have an
+  // ABI-guarantee to be turned into a specific register.
+  if (auto *ArgLoc = dyn_cast_or_null<Argument>(I.getVariableLocationOp(0));
+      ArgLoc && ArgLoc->hasAttribute(Attribute::SwiftAsync))
+    return;
+
+  CheckDI(!E->isEntryValue(),
+          "Entry values are only allowed in MIR unless they target a "
+          "swiftasync Argument",
+          &I);
 }
 
 void Verifier::verifyCompileUnits() {
   // When more than one Module is imported into the same context, such as during
   // an LTO build before linking the modules, ODR type uniquing may cause types
   // to point to a different CU. This check does not make sense in this case.
   if (M.getContext().isODRUniquingDebugTypes())
     return;

llvm/test/Verifier/diexpression-entry-value-llvm-ir.ll

 ; RUN: llvm-as -disable-output <%s 2>&1| FileCheck %s
 
-; The DW_OP_LLVM_entry_value operation can only be used in MIR.
-
-; CHECK: Entry values are only allowed in MIR
+; CHECK: Entry values are only allowed in MIR unless they target a swiftasync Argument
 ; CHECK: call void @llvm.dbg.value(metadata i32 %param, metadata !{{.*}}, metadata !DIExpression(DW_OP_LLVM_entry_value, 1))
+; CHECK-NOT: llvm.dbg.value
 ; CHECK: warning: ignoring invalid debug info
 
-define void @foo(i32 %param) !dbg !4 {
+define void @foo(i32 %param, ptr swiftasync %ok_param) !dbg !4 {
 entry:
   call void @llvm.dbg.value(metadata i32 %param, metadata !8, metadata !DIExpression(DW_OP_LLVM_entry_value, 1)), !dbg !9
+  call void @llvm.dbg.value(metadata ptr %ok_param, metadata !8, metadata !DIExpression(DW_OP_LLVM_entry_value, 1)), !dbg !9
   ret void
 }
 
 declare void @llvm.dbg.value(metadata, metadata, metadata) #0
 
 attributes #0 = { nounwind readnone speculatable willreturn }
 
 !llvm.dbg.cu = !{!0}