[BOLT] Add zero idiom to shortenInstructions

[Amir]

Clang crash:
https://paste.debian.net/1279223/

Bughunter run:
https://paste.debian.net/1279224/

Function before shorten-instructions:
https://paste.debian.net/1279226/

Function after shorten-instructions:
https://paste.debian.net/1279228/

Difference and root cause:
https://paste.debian.net/1279230/

bolt/lib/Target/X86/X86MCPlusBuilder.cpp

if (isBranch(Inst)) {
           Inst.getOperand(MCPlus::getNumPrimeOperands(Inst) - 1).isImm()) {
         int64_t Imm =
             Inst.getOperand(MCPlus::getNumPrimeOperands(Inst) - 1).getImm();
         if (int64_t(Imm) == int64_t(int8_t(Imm)))
           NewOpcode = ShortOpcode;
       }
     }
 
+    Inst.setOpcode(NewOpcode);
+
+    // Replace `movl $0x0, %eax` with `xorl %eax, %eax`
+    switch (NewOpcode) {
+    default:
+      break;
+
+    case X86::MOV64ri:
+    case X86::MOV64ri32:
+    case X86::MOV32ri:
+      auto OpNum = MCPlus::getNumPrimeOperands(Inst) - 1;
+      if (Inst.getOperand(OpNum).isImm() && !Inst.getOperand(OpNum).getImm()) {
+        if (NewOpcode == X86::MOV32ri)
+          NewOpcode = X86::XOR32rr;
+        else
+          NewOpcode = X86::XOR64rr;
+        MCOperand Op = Inst.getOperand(0);
+        Inst.setOpcode(NewOpcode);
+        Inst.clear();
+        Inst.addOperand(Op);
+        Inst.addOperand(Op);
+        Inst.addOperand(Op);
+      }
+      break;
+    }
+
     if (NewOpcode == OldOpcode)
       return false;
 
-    Inst.setOpcode(NewOpcode);
     return true;
   }
 
   bool
   convertMoveToConditionalMove(MCInst &Inst, unsigned CC, bool AllowStackMemOp,
                                bool AllowBasePtrStackMemOp) const override {
     // - Register-register moves are OK
     // - Stores are filtered out by opcode (no store CMOV)