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Differential D149422

[ValueTracking] Add tests for checking whether `div`/`rem` is safe to speculate; NFC
ClosedPublic

Authored by goldstein.w.n on Apr 27 2023, 11:22 PM.

Details

Reviewers
StephenFan
nikic
spatel
Commits
rG824e9bb2e336: [ValueTracking] Add tests for checking whether `div`/`rem` is safe to speculate…

Diff Detail

Unit TestsFailed

TimeTest
60,080 msx64 debian > MLIR.Examples/standalone::test.toy

Event Timeline

goldstein.w.n created this revision.Apr 27 2023, 11:22 PM
Herald added a project: Restricted Project. · View Herald TranscriptApr 27 2023, 11:22 PM
goldstein.w.n requested review of this revision.Apr 27 2023, 11:22 PM
Herald added a project: Restricted Project. · View Herald TranscriptApr 27 2023, 11:23 PM
Herald added a subscriber: llvm-commits. · View Herald Transcript
goldstein.w.n added a child revision: D149423: [ValueTracking] Use knownbits interface for determining if `div`/`rem` are safe to speculate.Apr 27 2023, 11:28 PM
Harbormaster completed remote builds in B228742: Diff 517806.Apr 28 2023, 12:37 AM
nikic added a comment.Apr 28 2023, 1:14 AM

The test cases would probably be simpler if this were using LICM.

llvm/test/Analysis/ValueTracking/speculate-div.ll
2 ↗(On Diff #517806)

Should have mentioned this earlier, but please don't put tests into llvm/test/Analysis/ValueTracking, unless they use special analysis printers. Instead put them into the pass being tested, here llvm/test/Transforms/SimplifyCFG.

7 ↗(On Diff #517806)

The function attributes shouldn't be needed.

goldstein.w.n updated this revision to Diff 518184.Apr 29 2023, 9:24 AM

Move tests + remove unneeded attrs

goldstein.w.n marked 2 inline comments as done.Apr 29 2023, 9:24 AM
nikic added a comment.Apr 29 2023, 10:19 AM

What do you think about this test structure? https://llvm.godbolt.org/z/nMxMGoz1r Seems clearer to me than going through speculative hoisting.

Harbormaster completed remote builds in B229025: Diff 518184.Apr 29 2023, 11:20 AM
goldstein.w.n added a comment.EditedApr 29 2023, 11:23 AM
In D149422#4307697, @nikic wrote:

What do you think about this test structure? https://llvm.godbolt.org/z/nMxMGoz1r Seems clearer to me than going through speculative hoisting.

Sure, where would that test belong? simplifycfg still?
Edit: putting in Transform/LICM.

goldstein.w.n updated this revision to Diff 518217.Apr 29 2023, 12:03 PM

Simplify tests + move to LICM

Herald added a subscriber: asbirlea. · View Herald TranscriptApr 29 2023, 12:03 PM
nikic accepted this revision.Apr 29 2023, 12:07 PM

LGTM

This revision is now accepted and ready to land.Apr 29 2023, 12:07 PM
Harbormaster completed remote builds in B229051: Diff 518217.Apr 29 2023, 2:00 PM
Closed by commit rG824e9bb2e336: [ValueTracking] Add tests for checking whether `div`/`rem` is safe to speculate… (authored by goldstein.w.n). · Explain WhyApr 30 2023, 8:42 AM
This revision was automatically updated to reflect the committed changes.
goldstein.w.n added a commit: rG824e9bb2e336: [ValueTracking] Add tests for checking whether `div`/`rem` is safe to speculate….
goldstein.w.n removed a child revision: D149423: [ValueTracking] Use knownbits interface for determining if `div`/`rem` are safe to speculate.May 19 2023, 2:28 PM

Revision Contents

PathSize
llvm/
test/
Transforms/
SimplifyCFG/
265 lines

Diff 518184

llvm/test/Transforms/SimplifyCFG/speculate-div.ll

  • This file was added.
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -S --passes='simplifycfg<hoist-common-insts>' %s | FileCheck %s
declare void @side_effects0()
declare void @side_effects1()
define void @f_sdiv_not_okay(i1 %c, ptr %d, ptr %m, ptr %b, i16 %xx) {
; CHECK-LABEL: @f_sdiv_not_okay(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[X:%.*]] = or i16 [[XX:%.*]], 1
; CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr [[B:%.*]], align 2
; CHECK-NEXT: br i1 [[C:%.*]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
; CHECK: if.then:
; CHECK-NEXT: call void @side_effects0()
; CHECK-NEXT: [[DIV_0:%.*]] = sdiv i16 [[TMP0]], [[X]]
; CHECK-NEXT: [[U:%.*]] = add i16 [[DIV_0]], [[TMP0]]
; CHECK-NEXT: br label [[IF_END:%.*]]
; CHECK: if.else:
; CHECK-NEXT: call void @side_effects1()
; CHECK-NEXT: [[DIV_1:%.*]] = sdiv i16 [[TMP0]], [[X]]
; CHECK-NEXT: [[V:%.*]] = add i16 [[DIV_1]], [[TMP0]]
; CHECK-NEXT: br label [[IF_END]]
; CHECK: if.end:
; CHECK-NEXT: [[UV:%.*]] = phi i16 [ [[V]], [[IF_ELSE]] ], [ [[U]], [[IF_THEN]] ]
; CHECK-NEXT: store i16 [[UV]], ptr [[D:%.*]], align 2
; CHECK-NEXT: ret void
;
entry:
%x = or i16 %xx, 1
br i1 %c, label %if.then, label %if.else
if.then:
%0 = load i16, ptr %b, align 2
call void @side_effects0()
%div.0 = sdiv i16 %0, %x
%u = add i16 %div.0, %0
br label %if.end
if.else:
%1 = load i16, ptr %b, align 2
call void @side_effects1()
%div.1 = sdiv i16 %1, %x
%v = add i16 %div.1, %1
br label %if.end
if.end:
%uv = phi i16 [ %v, %if.else ], [ %u, %if.then ]
store i16 %uv, ptr %d, align 2
ret void
}
define void @f_srem_okay(i1 %c, ptr %d, ptr %m, ptr %b, i16 %xx) {
; CHECK-LABEL: @f_srem_okay(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[X:%.*]] = or i16 [[XX:%.*]], 1
; CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr [[B:%.*]], align 2
; CHECK-NEXT: [[N0:%.*]] = or i16 [[TMP0]], 1
; CHECK-NEXT: br i1 [[C:%.*]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
; CHECK: if.then:
; CHECK-NEXT: call void @side_effects0()
; CHECK-NEXT: [[DIV_0:%.*]] = srem i16 [[N0]], [[X]]
; CHECK-NEXT: [[U:%.*]] = add i16 [[DIV_0]], [[TMP0]]
; CHECK-NEXT: br label [[IF_END:%.*]]
; CHECK: if.else:
; CHECK-NEXT: call void @side_effects1()
; CHECK-NEXT: [[DIV_1:%.*]] = srem i16 [[N0]], [[X]]
; CHECK-NEXT: [[V:%.*]] = add i16 [[DIV_1]], [[TMP0]]
; CHECK-NEXT: br label [[IF_END]]
; CHECK: if.end:
; CHECK-NEXT: [[UV:%.*]] = phi i16 [ [[V]], [[IF_ELSE]] ], [ [[U]], [[IF_THEN]] ]
; CHECK-NEXT: store i16 [[UV]], ptr [[D:%.*]], align 2
; CHECK-NEXT: ret void
;
entry:
%x = or i16 %xx, 1
br i1 %c, label %if.then, label %if.else
if.then:
%0 = load i16, ptr %b, align 2
call void @side_effects0()
%n0 = or i16 %0, 1
%div.0 = srem i16 %n0, %x
%u = add i16 %div.0, %0
br label %if.end
if.else:
%1 = load i16, ptr %b, align 2
call void @side_effects1()
%n1 = or i16 %1, 1
%div.1 = srem i16 %n1, %x
%v = add i16 %div.1, %1
br label %if.end
if.end:
%uv = phi i16 [ %v, %if.else ], [ %u, %if.then ]
store i16 %uv, ptr %d, align 2
ret void
}
define void @f_srem_okay_todo(i1 %c, ptr %d, ptr %m, ptr %b, i16 %xx) {
; CHECK-LABEL: @f_srem_okay_todo(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[X:%.*]] = add nuw i16 [[XX:%.*]], 1
; CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr [[B:%.*]], align 2
; CHECK-NEXT: [[N0:%.*]] = or i16 [[TMP0]], 1
; CHECK-NEXT: br i1 [[C:%.*]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
; CHECK: if.then:
; CHECK-NEXT: call void @side_effects0()
; CHECK-NEXT: [[DIV_0:%.*]] = srem i16 [[N0]], [[X]]
; CHECK-NEXT: [[U:%.*]] = add i16 [[DIV_0]], [[TMP0]]
; CHECK-NEXT: br label [[IF_END:%.*]]
; CHECK: if.else:
; CHECK-NEXT: call void @side_effects1()
; CHECK-NEXT: [[DIV_1:%.*]] = srem i16 [[N0]], [[X]]
; CHECK-NEXT: [[V:%.*]] = add i16 [[DIV_1]], [[TMP0]]
; CHECK-NEXT: br label [[IF_END]]
; CHECK: if.end:
; CHECK-NEXT: [[UV:%.*]] = phi i16 [ [[V]], [[IF_ELSE]] ], [ [[U]], [[IF_THEN]] ]
; CHECK-NEXT: store i16 [[UV]], ptr [[D:%.*]], align 2
; CHECK-NEXT: ret void
;
entry:
%x = add nuw i16 %xx, 1
br i1 %c, label %if.then, label %if.else
if.then:
%0 = load i16, ptr %b, align 2
call void @side_effects0()
%n0 = or i16 %0, 1
%div.0 = srem i16 %n0, %x
%u = add i16 %div.0, %0
br label %if.end
if.else:
%1 = load i16, ptr %b, align 2
call void @side_effects1()
%n1 = or i16 %1, 1
%div.1 = srem i16 %n1, %x
%v = add i16 %div.1, %1
br label %if.end
if.end:
%uv = phi i16 [ %v, %if.else ], [ %u, %if.then ]
store i16 %uv, ptr %d, align 2
ret void
}
define void @f_sdiv_okay2(i1 %c, ptr %d, ptr %m, ptr %b, i16 %xx) {
; CHECK-LABEL: @f_sdiv_okay2(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[XO:%.*]] = or i16 [[XX:%.*]], 1
; CHECK-NEXT: [[X:%.*]] = and i16 [[XO]], 123
; CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr [[B:%.*]], align 2
; CHECK-NEXT: br i1 [[C:%.*]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
; CHECK: if.then:
; CHECK-NEXT: call void @side_effects0()
; CHECK-NEXT: [[DIV_0:%.*]] = sdiv i16 [[TMP0]], [[X]]
; CHECK-NEXT: [[U:%.*]] = add i16 [[DIV_0]], [[TMP0]]
; CHECK-NEXT: br label [[IF_END:%.*]]
; CHECK: if.else:
; CHECK-NEXT: call void @side_effects1()
; CHECK-NEXT: [[DIV_1:%.*]] = sdiv i16 [[TMP0]], [[X]]
; CHECK-NEXT: [[V:%.*]] = add i16 [[DIV_1]], [[TMP0]]
; CHECK-NEXT: br label [[IF_END]]
; CHECK: if.end:
; CHECK-NEXT: [[UV:%.*]] = phi i16 [ [[V]], [[IF_ELSE]] ], [ [[U]], [[IF_THEN]] ]
; CHECK-NEXT: store i16 [[UV]], ptr [[D:%.*]], align 2
; CHECK-NEXT: ret void
;
entry:
%xo = or i16 %xx, 1
%x = and i16 %xo, 123
br i1 %c, label %if.then, label %if.else
if.then:
%0 = load i16, ptr %b, align 2
call void @side_effects0()
%div.0 = sdiv i16 %0, %x
%u = add i16 %div.0, %0
br label %if.end
if.else:
%1 = load i16, ptr %b, align 2
call void @side_effects1()
%div.1 = sdiv i16 %1, %x
%v = add i16 %div.1, %1
br label %if.end
if.end:
%uv = phi i16 [ %v, %if.else ], [ %u, %if.then ]
store i16 %uv, ptr %d, align 2
ret void
}
define void @f_udiv_okay(i1 %c, ptr %d, ptr %m, ptr %b, i16 %xx) {
; CHECK-LABEL: @f_udiv_okay(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[X:%.*]] = add nuw i16 [[XX:%.*]], 1
; CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr [[B:%.*]], align 2
; CHECK-NEXT: br i1 [[C:%.*]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
; CHECK: if.then:
; CHECK-NEXT: call void @side_effects0()
; CHECK-NEXT: [[DIV_0:%.*]] = udiv i16 [[TMP0]], [[X]]
; CHECK-NEXT: [[U:%.*]] = add i16 [[DIV_0]], [[TMP0]]
; CHECK-NEXT: br label [[IF_END:%.*]]
; CHECK: if.else:
; CHECK-NEXT: call void @side_effects1()
; CHECK-NEXT: [[DIV_1:%.*]] = udiv i16 [[TMP0]], [[X]]
; CHECK-NEXT: [[V:%.*]] = add i16 [[DIV_1]], [[TMP0]]
; CHECK-NEXT: br label [[IF_END]]
; CHECK: if.end:
; CHECK-NEXT: [[UV:%.*]] = phi i16 [ [[V]], [[IF_ELSE]] ], [ [[U]], [[IF_THEN]] ]
; CHECK-NEXT: store i16 [[UV]], ptr [[D:%.*]], align 2
; CHECK-NEXT: ret void
;
entry:
%x = add nuw i16 %xx, 1
br i1 %c, label %if.then, label %if.else
if.then:
%0 = load i16, ptr %b, align 2
call void @side_effects0()
%div.0 = udiv i16 %0, %x
%u = add i16 %div.0, %0
br label %if.end
if.else:
%1 = load i16, ptr %b, align 2
call void @side_effects1()
%div.1 = udiv i16 %1, %x
%v = add i16 %div.1, %1
br label %if.end
if.end:
%uv = phi i16 [ %v, %if.else ], [ %u, %if.then ]
store i16 %uv, ptr %d, align 2
ret void
}
define void @f_udiv_not_okay(i1 %c, ptr %d, ptr %m, ptr %b, i16 %xx) {
; CHECK-LABEL: @f_udiv_not_okay(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[X:%.*]] = xor i16 [[XX:%.*]], 1
; CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr [[B:%.*]], align 2
; CHECK-NEXT: br i1 [[C:%.*]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
; CHECK: if.then:
; CHECK-NEXT: call void @side_effects0()
; CHECK-NEXT: [[DIV_0:%.*]] = udiv i16 [[TMP0]], [[X]]
; CHECK-NEXT: [[U:%.*]] = add i16 [[DIV_0]], [[TMP0]]
; CHECK-NEXT: br label [[IF_END:%.*]]
; CHECK: if.else:
; CHECK-NEXT: call void @side_effects1()
; CHECK-NEXT: [[DIV_1:%.*]] = udiv i16 [[TMP0]], [[X]]
; CHECK-NEXT: [[V:%.*]] = add i16 [[DIV_1]], [[TMP0]]
; CHECK-NEXT: br label [[IF_END]]
; CHECK: if.end:
; CHECK-NEXT: [[UV:%.*]] = phi i16 [ [[V]], [[IF_ELSE]] ], [ [[U]], [[IF_THEN]] ]
; CHECK-NEXT: store i16 [[UV]], ptr [[D:%.*]], align 2
; CHECK-NEXT: ret void
;
entry:
%x = xor i16 %xx, 1
br i1 %c, label %if.then, label %if.else
if.then:
%0 = load i16, ptr %b, align 2
call void @side_effects0()
%div.0 = udiv i16 %0, %x
%u = add i16 %div.0, %0
br label %if.end
if.else:
%1 = load i16, ptr %b, align 2
call void @side_effects1()
%div.1 = udiv i16 %1, %x
%v = add i16 %div.1, %1
br label %if.end
if.end:
%uv = phi i16 [ %v, %if.else ], [ %u, %if.then ]
store i16 %uv, ptr %d, align 2
ret void
}