[ValueTracking] Add logic for `fshl/fshr(A, B, C) != 0` if `A == B && A ! = 0`

[goldstein.w.n]

Summary

Having A == B is quite common for rotate patterns.

Alive2 Links:

• https://alive2.llvm.org/ce/z/mPXi9c
• https://alive2.llvm.org/ce/z/UfDHoI

[nikic]

LGTM

llvm/lib/Analysis/ValueTracking.cpp

if (auto *II = dyn_cast<IntrinsicInst>(I)) {
         if (isKnownNonZero(II->getArgOperand(0), DemandedElts, Depth, Q))
           return true;
         break;
       case Intrinsic::uadd_sat:
         if (isKnownNonZero(II->getArgOperand(0), DemandedElts, Depth, Q) ||
             isKnownNonZero(II->getArgOperand(1), DemandedElts, Depth, Q))
           return true;
         break;
+      case Intrinsic::fshr:
+      case Intrinsic::fshl:
+        // If Op0 == Op1, this is a rotate. rotate(x, y) != 0 iff x != 0.
+        if (II->getArgOperand(0) == II->getArgOperand(1))
+          return isKnownNonZero(II->getArgOperand(0), DemandedElts, Depth, Q);
+        break;
       case Intrinsic::vscale:
         return true;
       default:
         break;
       }
     }
     break;
   }

llvm/test/Analysis/ValueTracking/known-non-zero.ll

;
   %r = icmp eq i8 %o, 0
   ret i1 %r
 }
 
 define i1 @fshr_non_zero(i8 %x, i8 %y, i8 %z) {
 ; CHECK-LABEL: @fshr_non_zero(
 ; CHECK-NEXT:    [[PRED0:%.*]] = icmp ne i8 [[X:%.*]], 0
 ; CHECK-NEXT:    call void @llvm.assume(i1 [[PRED0]])
-; CHECK-NEXT:    [[V:%.*]] = tail call i8 @llvm.fshr.i8(i8 [[X]], i8 [[X]], i8 [[Y:%.*]])
-; CHECK-NEXT:    [[OR:%.*]] = or i8 [[V]], [[Z:%.*]]
-; CHECK-NEXT:    [[R:%.*]] = icmp eq i8 [[OR]], 0
-; CHECK-NEXT:    ret i1 [[R]]
+; CHECK-NEXT:    ret i1 false
 ;
   %pred0 = icmp ne i8 %x, 0
   call void @llvm.assume(i1 %pred0)
   %v = tail call i8 @llvm.fshr.i8(i8 %x, i8 %x, i8 %y)
   %or = or i8 %v, %z
   %r = icmp eq i8 %or, 0
   ret i1 %r
 }
;
   %r = icmp eq i8 %or, 0
   ret i1 %r
 }
 
 define i1 @fshl_non_zero(i8 %x, i8 %y, i8 %z) {
 ; CHECK-LABEL: @fshl_non_zero(
 ; CHECK-NEXT:    [[PRED0:%.*]] = icmp ne i8 [[X:%.*]], 0
 ; CHECK-NEXT:    call void @llvm.assume(i1 [[PRED0]])
-; CHECK-NEXT:    [[V:%.*]] = tail call i8 @llvm.fshl.i8(i8 [[X]], i8 [[X]], i8 [[Y:%.*]])
-; CHECK-NEXT:    [[OR:%.*]] = or i8 [[V]], [[Z:%.*]]
-; CHECK-NEXT:    [[R:%.*]] = icmp eq i8 [[OR]], 0
-; CHECK-NEXT:    ret i1 [[R]]
+; CHECK-NEXT:    ret i1 false
 ;
   %pred0 = icmp ne i8 %x, 0
   call void @llvm.assume(i1 %pred0)
   %v = tail call i8 @llvm.fshl.i8(i8 %x, i8 %x, i8 %y)
   %or = or i8 %v, %z
   %r = icmp eq i8 %or, 0
   ret i1 %r
 }