[X86] Create all-one vector(v8i32) for TESTC(X,~X) == TESTC(X,-1) if X is v8f32

[yubing]

Summary

getAllOnesConstant can only take v8i32 instead of v8f32

[goldstein.w.n]

Why is this important?

llvm/test/CodeGen/X86/combine-testp-v8f32.ll

1

Can you split the test into a seperate patch (i.e test file compiled with llc before this change) so we can see the diff this patch generates?

[yubing]

In D148608#4276752, @goldstein.w.n wrote:

Why is this important?

since getAllOnesConstant can only take v8i32 instead of v8f32

llvm/test/CodeGen/X86/combine-testp-v8f32.ll

1

sorry i can't. it is compfail without this diff.

[goldstein.w.n]

llvm/test/CodeGen/X86/combine-testp-v8f32.ll

9

I think you need to regenerate this. It failed when I just tested locally.

modified   llvm/test/CodeGen/X86/combine-testp-v8f32.ll
@@ -6,7 +6,6 @@ define void @test(<8 x i32> %ref.tmp.sroa.0.16.vec.expand.i.i.i.i.i.i.i) #0 pers
 ; AVX:       # %bb.0: # %entry
 ; AVX-NEXT:    vxorps %xmm1, %xmm1, %xmm1
 ; AVX-NEXT:    vcmptrueps %ymm1, %ymm1, %ymm1
-; AVX-NEXT:    vxorps %ymm1, %ymm0, %ymm1
 ; AVX-NEXT:    vtestps %ymm1, %ymm0
 ; AVX-NEXT:    vzeroupper
 ; AVX-NEXT:    retq

[goldstein.w.n]

In D148608#4276765, @yubing wrote:

In D148608#4276752, @goldstein.w.n wrote:

Why is this important?

since getAllOnesConstant can only take v8i32 instead of v8f32

Oh I see. Makes sense. Can you mention that in the summary/commit message?

[yubing]

fix testcase

[yubing]

In D148608#4276772, @goldstein.w.n wrote:

In D148608#4276765, @yubing wrote:

In D148608#4276752, @goldstein.w.n wrote:

Why is this important?

since getAllOnesConstant can only take v8i32 instead of v8f32

Oh I see. Makes sense. Can you mention that in the summary/commit message?

thanks for comments. i've added it into summary

[pengfei]

llvm/test/CodeGen/X86/combine-testp-v8f32.ll

5

Simplify the names.

[RKSimon]

Nice catch

llvm/test/CodeGen/X86/combine-testp-v8f32.ll

5

Please can you put this in combine-testps.ll and an equivalent in combine-testpd.ll - there should be matching tests (and naming convention) with combine-ptest.ll that you can base it off.

[yubing]

address Simon's comments

[yubing]

ping?

[RKSimon]

LGTM - cheers

llvm/lib/Target/X86/X86ISelLowering.cpp

     }
   }
 
   if (CC == X86::COND_B || CC == X86::COND_AE) {
     // TESTC(X,~X) == TESTC(X,-1)
     if (SDValue NotOp1 = IsNOT(Op1, DAG)) {
       if (peekThroughBitcasts(NotOp1) == peekThroughBitcasts(Op0)) {
         SDLoc DL(EFLAGS);
-        return DAG.getNode(EFLAGS.getOpcode(), DL, VT,
-                           DAG.getBitcast(OpVT, NotOp1),
-                           DAG.getAllOnesConstant(DL, OpVT));
+        return DAG.getNode(
+            EFLAGS.getOpcode(), DL, VT, DAG.getBitcast(OpVT, NotOp1),
+            DAG.getBitcast(OpVT,
+                           DAG.getAllOnesConstant(DL, NotOp1.getValueType())));
       }
     }
   }
 
   if (CC == X86::COND_E || CC == X86::COND_NE) {
     // TESTZ(X,~Y) == TESTC(Y,X)
     if (SDValue NotOp1 = IsNOT(Op1, DAG)) {
       CC = (CC == X86::COND_E ? X86::COND_B : X86::COND_AE);

llvm/test/CodeGen/X86/combine-testp-v8f32.ll

+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx | FileCheck %s --check-prefix=AVX
+
+define void @test(<8 x i32> %ref.tmp.sroa.0.16.vec.expand.i.i.i.i.i.i.i) #0 personality ptr null {
+; AVX-LABEL: test:
+; AVX:       # %bb.0: # %entry
+; AVX-NEXT:    vxorps %xmm1, %xmm1, %xmm1
+; AVX-NEXT:    vcmptrueps %ymm1, %ymm1, %ymm1
+; AVX-NEXT:    vxorps %ymm1, %ymm0, %ymm1
+; AVX-NEXT:    vtestps %ymm1, %ymm0
+; AVX-NEXT:    vzeroupper
+; AVX-NEXT:    retq
+entry:
+  %xor.i.i.i.i.i.i.i.i.i = xor <8 x i32> %ref.tmp.sroa.0.16.vec.expand.i.i.i.i.i.i.i, <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1>
+  %.cast.i.i.i.i.i.i = bitcast <8 x i32> %xor.i.i.i.i.i.i.i.i.i to <8 x float>
+  %0 = call i32 @llvm.x86.avx.vtestz.ps.256(<8 x float> %.cast.i.i.i.i.i.i, <8 x float> %.cast.i.i.i.i.i.i)
+  %cmp.i.not.i.i.i.i.i.i = icmp eq i32 %0, 0
+  br i1 %cmp.i.not.i.i.i.i.i.i, label %if.end3.i.i.i.i.i.i, label %end
+
+if.end3.i.i.i.i.i.i:                              ; preds = %entry
+  ret void
+
+end: ; preds = %entry
+  ret void
+}
+
+declare i32 @llvm.x86.avx.vtestz.ps.256(<8 x float>, <8 x float>)