[mlir][openacc] Accept acc.serial has parent of acc.yield op

[clementval]

Summary

acc.serial op is modeled on the acc.parallel op.
acc.yield operation must then accept acc.serial has a parent
operation.

[PeteSteinfeld]

All builds and tests correctly and looks good.

mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td

let extraClassDeclaration = [{
     static StringRef getReductionKeyword() { return "reduction"; }
   }];
   let hasCustomAssemblyFormat = 1;
   let hasVerifier = 1;
 }
 
 // Yield operation for the acc.loop and acc.parallel operations.
 def OpenACC_YieldOp : OpenACC_Op<"yield", [Terminator,
-    ParentOneOf<["ParallelOp, LoopOp"]>]> {
+    ParentOneOf<["ParallelOp, LoopOp, SerialOp"]>]> {
   let summary = "Acc yield and termination operation";
 
   let description = [{
     `acc.yield` is a special terminator operation for block inside regions in
     acc ops (parallel and loop). It returns values to the immediately enclosing
     acc op.
   }];
 

mlir/test/Dialect/OpenACC/ops.mlir

func.func @testserialop(%a: memref<10xf32>, %b: memref<10xf32>, %c: memref<10x10xf32>) -> () {
   acc.serial {
   } attributes {defaultAttr = #acc<defaultvalue present>}
   acc.serial {
   } attributes {asyncAttr}
   acc.serial {
   } attributes {waitAttr}
   acc.serial {
   } attributes {selfAttr}
+  acc.serial {
+    acc.yield
+  } attributes {selfAttr}
   return
 }
 
 // CHECK:      func @testserialop([[ARGA:%.*]]: memref<10xf32>, [[ARGB:%.*]]: memref<10xf32>, [[ARGC:%.*]]: memref<10x10xf32>) {
 // CHECK:      [[I64VALUE:%.*]] = arith.constant 1 : i64
 // CHECK:      [[I32VALUE:%.*]] = arith.constant 1 : i32
 // CHECK:      [[IDXVALUE:%.*]] = arith.constant 1 : index
 // CHECK:      acc.serial async([[I64VALUE]] : i64) {

 // CHECK:      acc.serial {
 // CHECK-NEXT: } attributes {defaultAttr = #acc<defaultvalue present>}
 // CHECK:      acc.serial {
 // CHECK-NEXT: } attributes {asyncAttr}
 // CHECK:      acc.serial {
 // CHECK-NEXT: } attributes {waitAttr}
 // CHECK:      acc.serial {
 // CHECK-NEXT: } attributes {selfAttr}
+// CHECK:      acc.serial {
+// CHECK:        acc.yield
+// CHECK-NEXT: } attributes {selfAttr}
 
 // -----
 
 func.func @testdataop(%a: memref<10xf32>, %b: memref<10xf32>, %c: memref<10x10xf32>) -> () {
   %ifCond = arith.constant true
   acc.data if(%ifCond) present(%a : memref<10xf32>) {
   }
   acc.data present(%a : memref<10xf32>) if(%ifCond) {