[X86] Disable masked UNPCKLPD/UNPCKHPD -> SHUFPS transformation

[pengfei]

Summary

UNPCKLPD/UNPCKHPD is a 64-bit element operation. The masked version
doesn't match SHUFPS in lanes.
This reverts part of D144763.

[pengfei]

Remove commnets.

[RKSimon]

Good Catch! LGTM

llvm/test/CodeGen/X86/tuning-shuffle-unpckpd-avx512.ll

167–168

Add comments to the changed test cases - saying these are negative tests as the predicate masks don't match

[RKSimon]

@goldstein.w.n You might want to investigate if its worth using VSHUFPD instead?

[goldstein.w.n]

In D147507#4242658, @RKSimon wrote:

@goldstein.w.n You might want to investigate if its worth using VSHUFPD instead?

@pengfei and @RKSimon what about using {VP}UNPCK{L|H}QDQ{...}? I tested on ICL and didn't see any domain penalty. Wasn't able to find the hardware to test hsw/skl/.... and not sure if it falls under no-shuffle hasNoDomainDelayShuffle or something else but it is the ideal replacement both from perf and codesize perspective.

[RKSimon]

In D147507#4243369, @goldstein.w.n wrote:

In D147507#4242658, @RKSimon wrote:

@goldstein.w.n You might want to investigate if its worth using VSHUFPD instead?

@pengfei and @RKSimon what about using {VP}UNPCK{L|H}QDQ{...}? I tested on ICL and didn't see any domain penalty. Wasn't able to find the hardware to test hsw/skl/.... and not sure if it falls under no-shuffle hasNoDomainDelayShuffle or something else but it is the ideal replacement both from perf and codesize perspective.

Why not both? We can try with VSHUFPD to see if it has better scheduling, else try integer unpack if we don't have a domain penalty

[goldstein.w.n]

In D147507#4242658, @RKSimon wrote:

@goldstein.w.n You might want to investigate if its worth using VSHUFPD instead?

See: D147541

llvm/lib/Target/X86/X86FixupInstTuning.cpp

case X86::VUNPCKLPDYrr:
     // VMOVLHPS is always 128 bits.
   case X86::VMOVLHPSZrr:
   case X86::VUNPCKLPDZ128rr:
     return ProcessUNPCKLPDrr(X86::VSHUFPSZ128rri);
   case X86::VUNPCKLPDZ256rr:
     return ProcessUNPCKLPDrr(X86::VSHUFPSZ256rri);
   case X86::VUNPCKLPDZrr:
     return ProcessUNPCKLPDrr(X86::VSHUFPSZrri);
-  case X86::VUNPCKLPDZ128rrk:
-    return ProcessUNPCKLPDrr(X86::VSHUFPSZ128rrik);
-  case X86::VUNPCKLPDZ256rrk:
-    return ProcessUNPCKLPDrr(X86::VSHUFPSZ256rrik);
-  case X86::VUNPCKLPDZrrk:
-    return ProcessUNPCKLPDrr(X86::VSHUFPSZrrik);
-  case X86::VUNPCKLPDZ128rrkz:
-    return ProcessUNPCKLPDrr(X86::VSHUFPSZ128rrikz);
-  case X86::VUNPCKLPDZ256rrkz:
-    return ProcessUNPCKLPDrr(X86::VSHUFPSZ256rrikz);
-  case X86::VUNPCKLPDZrrkz:
-    return ProcessUNPCKLPDrr(X86::VSHUFPSZrrikz);
   case X86::UNPCKHPDrr:
     return ProcessUNPCKHPDrr(X86::SHUFPSrri);
   case X86::VUNPCKHPDrr:
     return ProcessUNPCKHPDrr(X86::VSHUFPSrri);
   case X86::VUNPCKHPDYrr:
     return ProcessUNPCKHPDrr(X86::VSHUFPSYrri);
   case X86::VUNPCKHPDZ128rr:
     return ProcessUNPCKHPDrr(X86::VSHUFPSZ128rri);
   case X86::VUNPCKHPDZ256rr:
     return ProcessUNPCKHPDrr(X86::VSHUFPSZ256rri);
   case X86::VUNPCKHPDZrr:
     return ProcessUNPCKHPDrr(X86::VSHUFPSZrri);
-  case X86::VUNPCKHPDZ128rrk:
-    return ProcessUNPCKHPDrr(X86::VSHUFPSZ128rrik);
-  case X86::VUNPCKHPDZ256rrk:
-    return ProcessUNPCKHPDrr(X86::VSHUFPSZ256rrik);
-  case X86::VUNPCKHPDZrrk:
-    return ProcessUNPCKHPDrr(X86::VSHUFPSZrrik);
-  case X86::VUNPCKHPDZ128rrkz:
-    return ProcessUNPCKHPDrr(X86::VSHUFPSZ128rrikz);
-  case X86::VUNPCKHPDZ256rrkz:
-    return ProcessUNPCKHPDrr(X86::VSHUFPSZ256rrikz);
-  case X86::VUNPCKHPDZrrkz:
-    return ProcessUNPCKHPDrr(X86::VSHUFPSZrrikz);
   default:
     return false;
   }
 }
 
 bool X86FixupInstTuningPass::runOnMachineFunction(MachineFunction &MF) {
   LLVM_DEBUG(dbgs() << "Start X86FixupInstTuning\n";);
   bool Changed = false;

llvm/test/CodeGen/X86/tuning-shuffle-unpckpd-avx512.ll

 ; CHECK-NEXT:    vunpckhpd {{.*#+}} zmm0 {%k1} {z} = zmm0[1],zmm1[1],zmm0[3],zmm1[3],zmm0[5],zmm1[5],zmm0[7],zmm1[7]
 ; CHECK-NEXT:    retq
   %mask = bitcast i8 %mask_int to <8 x i1>
   %shufp = shufflevector <8 x double> %a, <8 x double> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
   %res = select <8 x i1> %mask, <8 x double> %shufp, <8 x double> zeroinitializer
   ret <8 x double> %res
 }
 
 define <4 x double> @transform_VUNPCKLPDYrrkz(<4 x double> %a, <4 x double> %b, i4 %mask_int) nounwind {
-; CHECK-SKX-LABEL: transform_VUNPCKLPDYrrkz:
-; CHECK-SKX:       # %bb.0:
-; CHECK-SKX-NEXT:    kmovd %edi, %k1
-; CHECK-SKX-NEXT:    vunpcklpd {{.*#+}} ymm0 {%k1} {z} = ymm0[0],ymm1[0],ymm0[2],ymm1[2]
-; CHECK-SKX-NEXT:    retq
-;
-; CHECK-ICX-LABEL: transform_VUNPCKLPDYrrkz:
-; CHECK-ICX:       # %bb.0:
-; CHECK-ICX-NEXT:    kmovd %edi, %k1
-; CHECK-ICX-NEXT:    vshufps {{.*#+}} ymm0 {%k1} {z} = ymm0[0,1],ymm1[0,1],ymm0[4,5],ymm1[4,5]
-; CHECK-ICX-NEXT:    retq
-;
-; CHECK-V4-LABEL: transform_VUNPCKLPDYrrkz:
-; CHECK-V4:       # %bb.0:
-; CHECK-V4-NEXT:    kmovd %edi, %k1
-; CHECK-V4-NEXT:    vunpcklpd {{.*#+}} ymm0 {%k1} {z} = ymm0[0],ymm1[0],ymm0[2],ymm1[2]
-; CHECK-V4-NEXT:    retq
-;
-; CHECK-ZNVER4-LABEL: transform_VUNPCKLPDYrrkz:
-; CHECK-ZNVER4:       # %bb.0:
-; CHECK-ZNVER4-NEXT:    kmovd %edi, %k1
-; CHECK-ZNVER4-NEXT:    vunpcklpd {{.*#+}} ymm0 {%k1} {z} = ymm0[0],ymm1[0],ymm0[2],ymm1[2]
-; CHECK-ZNVER4-NEXT:    retq
+; CHECK-LABEL: transform_VUNPCKLPDYrrkz:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    kmovd %edi, %k1
+; CHECK-NEXT:    vunpcklpd {{.*#+}} ymm0 {%k1} {z} = ymm0[0],ymm1[0],ymm0[2],ymm1[2]
+; CHECK-NEXT:    retq
   %mask = bitcast i4 %mask_int to <4 x i1>
   %shufp = shufflevector <4 x double> %a, <4 x double> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
   %res = select <4 x i1> %mask, <4 x double> %shufp, <4 x double> zeroinitializer
   ret <4 x double> %res
 }
 
 define <4 x double> @transform_VUNPCKHPDYrrkz(<4 x double> %a, <4 x double> %b, i4 %mask_int) nounwind {
-; CHECK-SKX-LABEL: transform_VUNPCKHPDYrrkz:
-; CHECK-SKX:       # %bb.0:
-; CHECK-SKX-NEXT:    kmovd %edi, %k1
-; CHECK-SKX-NEXT:    vunpckhpd {{.*#+}} ymm0 {%k1} {z} = ymm0[1],ymm1[1],ymm0[3],ymm1[3]
-; CHECK-SKX-NEXT:    retq
-;
-; CHECK-ICX-LABEL: transform_VUNPCKHPDYrrkz:
-; CHECK-ICX:       # %bb.0:
-; CHECK-ICX-NEXT:    kmovd %edi, %k1
-; CHECK-ICX-NEXT:    vshufps {{.*#+}} ymm0 {%k1} {z} = ymm0[2,3],ymm1[2,3],ymm0[6,7],ymm1[6,7]
-; CHECK-ICX-NEXT:    retq
-;
-; CHECK-V4-LABEL: transform_VUNPCKHPDYrrkz:
-; CHECK-V4:       # %bb.0:
-; CHECK-V4-NEXT:    kmovd %edi, %k1
-; CHECK-V4-NEXT:    vunpckhpd {{.*#+}} ymm0 {%k1} {z} = ymm0[1],ymm1[1],ymm0[3],ymm1[3]
-; CHECK-V4-NEXT:    retq
-;
-; CHECK-ZNVER4-LABEL: transform_VUNPCKHPDYrrkz:
-; CHECK-ZNVER4:       # %bb.0:
-; CHECK-ZNVER4-NEXT:    kmovd %edi, %k1
-; CHECK-ZNVER4-NEXT:    vunpckhpd {{.*#+}} ymm0 {%k1} {z} = ymm0[1],ymm1[1],ymm0[3],ymm1[3]
-; CHECK-ZNVER4-NEXT:    retq
+; CHECK-LABEL: transform_VUNPCKHPDYrrkz:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    kmovd %edi, %k1
+; CHECK-NEXT:    vunpckhpd {{.*#+}} ymm0 {%k1} {z} = ymm0[1],ymm1[1],ymm0[3],ymm1[3]
+; CHECK-NEXT:    retq
   %mask = bitcast i4 %mask_int to <4 x i1>
   %shufp = shufflevector <4 x double> %a, <4 x double> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
   %res = select <4 x i1> %mask, <4 x double> %shufp, <4 x double> zeroinitializer
   ret <4 x double> %res
 }
 
 define <2 x double> @transform_VUNPCKLPDrrkz(<2 x double> %a, <2 x double> %b, i2 %mask_int) nounwind {
-; CHECK-SKX-LABEL: transform_VUNPCKLPDrrkz:
-; CHECK-SKX:       # %bb.0:
-; CHECK-SKX-NEXT:    kmovd %edi, %k1
-; CHECK-SKX-NEXT:    vunpcklpd {{.*#+}} xmm0 {%k1} {z} = xmm0[0],xmm1[0]
-; CHECK-SKX-NEXT:    retq
-;
-; CHECK-ICX-LABEL: transform_VUNPCKLPDrrkz:
-; CHECK-ICX:       # %bb.0:
-; CHECK-ICX-NEXT:    kmovd %edi, %k1
-; CHECK-ICX-NEXT:    vshufps {{.*#+}} xmm0 {%k1} {z} = xmm0[0,1],xmm1[0,1]
-; CHECK-ICX-NEXT:    retq
-;
-; CHECK-V4-LABEL: transform_VUNPCKLPDrrkz:
-; CHECK-V4:       # %bb.0:
-; CHECK-V4-NEXT:    kmovd %edi, %k1
-; CHECK-V4-NEXT:    vunpcklpd {{.*#+}} xmm0 {%k1} {z} = xmm0[0],xmm1[0]
-; CHECK-V4-NEXT:    retq
-;
-; CHECK-ZNVER4-LABEL: transform_VUNPCKLPDrrkz:
-; CHECK-ZNVER4:       # %bb.0:
-; CHECK-ZNVER4-NEXT:    kmovd %edi, %k1
-; CHECK-ZNVER4-NEXT:    vunpcklpd {{.*#+}} xmm0 {%k1} {z} = xmm0[0],xmm1[0]
-; CHECK-ZNVER4-NEXT:    retq
+; CHECK-LABEL: transform_VUNPCKLPDrrkz:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    kmovd %edi, %k1
+; CHECK-NEXT:    vunpcklpd {{.*#+}} xmm0 {%k1} {z} = xmm0[0],xmm1[0]
+; CHECK-NEXT:    retq
   %mask = bitcast i2 %mask_int to <2 x i1>
   %shufp = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 0, i32 2>
   %res = select <2 x i1> %mask, <2 x double> %shufp, <2 x double> zeroinitializer
   ret <2 x double> %res
 }
 
 define <2 x double> @transform_VUNPCKHPDrrkz(<2 x double> %a, <2 x double> %b, i2 %mask_int) nounwind {
-; CHECK-SKX-LABEL: transform_VUNPCKHPDrrkz:
-; CHECK-SKX:       # %bb.0:
-; CHECK-SKX-NEXT:    kmovd %edi, %k1
-; CHECK-SKX-NEXT:    vunpckhpd {{.*#+}} xmm0 {%k1} {z} = xmm0[1],xmm1[1]
-; CHECK-SKX-NEXT:    retq
-;
-; CHECK-ICX-LABEL: transform_VUNPCKHPDrrkz:
-; CHECK-ICX:       # %bb.0:
-; CHECK-ICX-NEXT:    kmovd %edi, %k1
-; CHECK-ICX-NEXT:    vshufps {{.*#+}} xmm0 {%k1} {z} = xmm0[2,3],xmm1[2,3]
-; CHECK-ICX-NEXT:    retq
-;
-; CHECK-V4-LABEL: transform_VUNPCKHPDrrkz:
-; CHECK-V4:       # %bb.0:
-; CHECK-V4-NEXT:    kmovd %edi, %k1
-; CHECK-V4-NEXT:    vunpckhpd {{.*#+}} xmm0 {%k1} {z} = xmm0[1],xmm1[1]
-; CHECK-V4-NEXT:    retq
-;
-; CHECK-ZNVER4-LABEL: transform_VUNPCKHPDrrkz:
-; CHECK-ZNVER4:       # %bb.0:
-; CHECK-ZNVER4-NEXT:    kmovd %edi, %k1
-; CHECK-ZNVER4-NEXT:    vunpckhpd {{.*#+}} xmm0 {%k1} {z} = xmm0[1],xmm1[1]
-; CHECK-ZNVER4-NEXT:    retq
+; CHECK-LABEL: transform_VUNPCKHPDrrkz:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    kmovd %edi, %k1
+; CHECK-NEXT:    vunpckhpd {{.*#+}} xmm0 {%k1} {z} = xmm0[1],xmm1[1]
+; CHECK-NEXT:    retq
   %mask = bitcast i2 %mask_int to <2 x i1>
   %shufp = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 1, i32 3>
   %res = select <2 x i1> %mask, <2 x double> %shufp, <2 x double> zeroinitializer
   ret <2 x double> %res
 }
 
 define <8 x double> @transform_VUNPCKLPDZrrk(<8 x double> %a, <8 x double> %b, <8 x double> %c, i8 %mask_int) nounwind {
 ; CHECK-LABEL: transform_VUNPCKLPDZrrk:

 ; CHECK-NEXT:    retq
   %mask = bitcast i8 %mask_int to <8 x i1>
   %shufp = shufflevector <8 x double> %a, <8 x double> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
   %res = select <8 x i1> %mask, <8 x double> %shufp, <8 x double> %c
   ret <8 x double> %res
 }
 
 define <4 x double> @transform_VUNPCKLPDYrrk(<4 x double> %a, <4 x double> %b, <4 x double> %c, i4 %mask_int) nounwind {
-; CHECK-SKX-LABEL: transform_VUNPCKLPDYrrk:
-; CHECK-SKX:       # %bb.0:
-; CHECK-SKX-NEXT:    kmovd %edi, %k1
-; CHECK-SKX-NEXT:    vunpcklpd {{.*#+}} ymm2 {%k1} = ymm0[0],ymm1[0],ymm0[2],ymm1[2]
-; CHECK-SKX-NEXT:    vmovapd %ymm2, %ymm0
-; CHECK-SKX-NEXT:    retq
-;
-; CHECK-ICX-LABEL: transform_VUNPCKLPDYrrk:
-; CHECK-ICX:       # %bb.0:
-; CHECK-ICX-NEXT:    kmovd %edi, %k1
-; CHECK-ICX-NEXT:    vshufps {{.*#+}} ymm2 {%k1} = ymm0[0,1],ymm1[0,1],ymm0[4,5],ymm1[4,5]
-; CHECK-ICX-NEXT:    vmovapd %ymm2, %ymm0
-; CHECK-ICX-NEXT:    retq
-;
-; CHECK-V4-LABEL: transform_VUNPCKLPDYrrk:
-; CHECK-V4:       # %bb.0:
-; CHECK-V4-NEXT:    kmovd %edi, %k1
-; CHECK-V4-NEXT:    vunpcklpd {{.*#+}} ymm2 {%k1} = ymm0[0],ymm1[0],ymm0[2],ymm1[2]
-; CHECK-V4-NEXT:    vmovapd %ymm2, %ymm0
-; CHECK-V4-NEXT:    retq
-;
-; CHECK-ZNVER4-LABEL: transform_VUNPCKLPDYrrk:
-; CHECK-ZNVER4:       # %bb.0:
-; CHECK-ZNVER4-NEXT:    kmovd %edi, %k1
-; CHECK-ZNVER4-NEXT:    vunpcklpd {{.*#+}} ymm2 {%k1} = ymm0[0],ymm1[0],ymm0[2],ymm1[2]
-; CHECK-ZNVER4-NEXT:    vmovapd %ymm2, %ymm0
-; CHECK-ZNVER4-NEXT:    retq
+; CHECK-LABEL: transform_VUNPCKLPDYrrk:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    kmovd %edi, %k1
+; CHECK-NEXT:    vunpcklpd {{.*#+}} ymm2 {%k1} = ymm0[0],ymm1[0],ymm0[2],ymm1[2]
+; CHECK-NEXT:    vmovapd %ymm2, %ymm0
+; CHECK-NEXT:    retq
   %mask = bitcast i4 %mask_int to <4 x i1>
   %shufp = shufflevector <4 x double> %a, <4 x double> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
   %res = select <4 x i1> %mask, <4 x double> %shufp, <4 x double> %c
   ret <4 x double> %res
 }
 
 define <4 x double> @transform_VUNPCKHPDYrrk(<4 x double> %a, <4 x double> %b, <4 x double> %c, i4 %mask_int) nounwind {
-; CHECK-SKX-LABEL: transform_VUNPCKHPDYrrk:
-; CHECK-SKX:       # %bb.0:
-; CHECK-SKX-NEXT:    kmovd %edi, %k1
-; CHECK-SKX-NEXT:    vunpckhpd {{.*#+}} ymm2 {%k1} = ymm0[1],ymm1[1],ymm0[3],ymm1[3]
-; CHECK-SKX-NEXT:    vmovapd %ymm2, %ymm0
-; CHECK-SKX-NEXT:    retq
-;
-; CHECK-ICX-LABEL: transform_VUNPCKHPDYrrk:
-; CHECK-ICX:       # %bb.0:
-; CHECK-ICX-NEXT:    kmovd %edi, %k1
-; CHECK-ICX-NEXT:    vshufps {{.*#+}} ymm2 {%k1} = ymm0[2,3],ymm1[2,3],ymm0[6,7],ymm1[6,7]
-; CHECK-ICX-NEXT:    vmovapd %ymm2, %ymm0
-; CHECK-ICX-NEXT:    retq
-;
-; CHECK-V4-LABEL: transform_VUNPCKHPDYrrk:
-; CHECK-V4:       # %bb.0:
-; CHECK-V4-NEXT:    kmovd %edi, %k1
-; CHECK-V4-NEXT:    vunpckhpd {{.*#+}} ymm2 {%k1} = ymm0[1],ymm1[1],ymm0[3],ymm1[3]
-; CHECK-V4-NEXT:    vmovapd %ymm2, %ymm0
-; CHECK-V4-NEXT:    retq
-;
-; CHECK-ZNVER4-LABEL: transform_VUNPCKHPDYrrk:
-; CHECK-ZNVER4:       # %bb.0:
-; CHECK-ZNVER4-NEXT:    kmovd %edi, %k1
-; CHECK-ZNVER4-NEXT:    vunpckhpd {{.*#+}} ymm2 {%k1} = ymm0[1],ymm1[1],ymm0[3],ymm1[3]
-; CHECK-ZNVER4-NEXT:    vmovapd %ymm2, %ymm0
-; CHECK-ZNVER4-NEXT:    retq
+; CHECK-LABEL: transform_VUNPCKHPDYrrk:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    kmovd %edi, %k1
+; CHECK-NEXT:    vunpckhpd {{.*#+}} ymm2 {%k1} = ymm0[1],ymm1[1],ymm0[3],ymm1[3]
+; CHECK-NEXT:    vmovapd %ymm2, %ymm0
+; CHECK-NEXT:    retq
   %mask = bitcast i4 %mask_int to <4 x i1>
   %shufp = shufflevector <4 x double> %a, <4 x double> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
   %res = select <4 x i1> %mask, <4 x double> %shufp, <4 x double> %c
   ret <4 x double> %res
 }
 
 define <2 x double> @transform_VUNPCKLPDrrk(<2 x double> %a, <2 x double> %b, <2 x double> %c, i2 %mask_int) nounwind {
-; CHECK-SKX-LABEL: transform_VUNPCKLPDrrk:
-; CHECK-SKX:       # %bb.0:
-; CHECK-SKX-NEXT:    kmovd %edi, %k1
-; CHECK-SKX-NEXT:    vunpcklpd {{.*#+}} xmm2 {%k1} = xmm0[0],xmm1[0]
-; CHECK-SKX-NEXT:    vmovapd %xmm2, %xmm0
-; CHECK-SKX-NEXT:    retq
-;
-; CHECK-ICX-LABEL: transform_VUNPCKLPDrrk:
-; CHECK-ICX:       # %bb.0:
-; CHECK-ICX-NEXT:    kmovd %edi, %k1
-; CHECK-ICX-NEXT:    vshufps {{.*#+}} xmm2 {%k1} = xmm0[0,1],xmm1[0,1]
-; CHECK-ICX-NEXT:    vmovapd %xmm2, %xmm0
-; CHECK-ICX-NEXT:    retq
-;
-; CHECK-V4-LABEL: transform_VUNPCKLPDrrk:
-; CHECK-V4:       # %bb.0:
-; CHECK-V4-NEXT:    kmovd %edi, %k1
-; CHECK-V4-NEXT:    vunpcklpd {{.*#+}} xmm2 {%k1} = xmm0[0],xmm1[0]
-; CHECK-V4-NEXT:    vmovapd %xmm2, %xmm0
-; CHECK-V4-NEXT:    retq
-;
-; CHECK-ZNVER4-LABEL: transform_VUNPCKLPDrrk:
-; CHECK-ZNVER4:       # %bb.0:
-; CHECK-ZNVER4-NEXT:    kmovd %edi, %k1
-; CHECK-ZNVER4-NEXT:    vunpcklpd {{.*#+}} xmm2 {%k1} = xmm0[0],xmm1[0]
-; CHECK-ZNVER4-NEXT:    vmovapd %xmm2, %xmm0
-; CHECK-ZNVER4-NEXT:    retq
+; CHECK-LABEL: transform_VUNPCKLPDrrk:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    kmovd %edi, %k1
+; CHECK-NEXT:    vunpcklpd {{.*#+}} xmm2 {%k1} = xmm0[0],xmm1[0]
+; CHECK-NEXT:    vmovapd %xmm2, %xmm0
+; CHECK-NEXT:    retq
   %mask = bitcast i2 %mask_int to <2 x i1>
   %shufp = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 0, i32 2>
   %res = select <2 x i1> %mask, <2 x double> %shufp, <2 x double> %c
   ret <2 x double> %res
 }
 
 define <2 x double> @transform_VUNPCKHPDrrk(<2 x double> %a, <2 x double> %b, <2 x double> %c, i2 %mask_int) nounwind {
-; CHECK-SKX-LABEL: transform_VUNPCKHPDrrk:
-; CHECK-SKX:       # %bb.0:
-; CHECK-SKX-NEXT:    kmovd %edi, %k1
-; CHECK-SKX-NEXT:    vunpckhpd {{.*#+}} xmm2 {%k1} = xmm0[1],xmm1[1]
-; CHECK-SKX-NEXT:    vmovapd %xmm2, %xmm0
-; CHECK-SKX-NEXT:    retq
-;
-; CHECK-ICX-LABEL: transform_VUNPCKHPDrrk:
-; CHECK-ICX:       # %bb.0:
-; CHECK-ICX-NEXT:    kmovd %edi, %k1
-; CHECK-ICX-NEXT:    vshufps {{.*#+}} xmm2 {%k1} = xmm0[2,3],xmm1[2,3]
-; CHECK-ICX-NEXT:    vmovapd %xmm2, %xmm0
-; CHECK-ICX-NEXT:    retq
-;
-; CHECK-V4-LABEL: transform_VUNPCKHPDrrk:
-; CHECK-V4:       # %bb.0:
-; CHECK-V4-NEXT:    kmovd %edi, %k1
-; CHECK-V4-NEXT:    vunpckhpd {{.*#+}} xmm2 {%k1} = xmm0[1],xmm1[1]
-; CHECK-V4-NEXT:    vmovapd %xmm2, %xmm0
-; CHECK-V4-NEXT:    retq
-;
-; CHECK-ZNVER4-LABEL: transform_VUNPCKHPDrrk:
-; CHECK-ZNVER4:       # %bb.0:
-; CHECK-ZNVER4-NEXT:    kmovd %edi, %k1
-; CHECK-ZNVER4-NEXT:    vunpckhpd {{.*#+}} xmm2 {%k1} = xmm0[1],xmm1[1]
-; CHECK-ZNVER4-NEXT:    vmovapd %xmm2, %xmm0
-; CHECK-ZNVER4-NEXT:    retq
+; CHECK-LABEL: transform_VUNPCKHPDrrk:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    kmovd %edi, %k1
+; CHECK-NEXT:    vunpckhpd {{.*#+}} xmm2 {%k1} = xmm0[1],xmm1[1]
+; CHECK-NEXT:    vmovapd %xmm2, %xmm0
+; CHECK-NEXT:    retq
   %mask = bitcast i2 %mask_int to <2 x i1>
   %shufp = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 1, i32 3>
   %res = select <2 x i1> %mask, <2 x double> %shufp, <2 x double> %c
   ret <2 x double> %res
 }
 
 define <16 x float> @transform_VUNPCKLPDZrm(<16 x float> %a, ptr %pb) nounwind {
 ; CHECK-LABEL: transform_VUNPCKLPDZrm: