[LoongArch] Optimize multiplication with immediates

[benshi001]

Summary

Optimize multiplication with some specific immediates to
a pair of alsl.

[xen0n]

llvm/lib/Target/LoongArch/LoongArchInstrInfo.td

953–964

Diff damage?

[benshi001]

llvm/lib/Target/LoongArch/LoongArchInstrInfo.td

953–964

There may be something wrong in my previous commit, https://github.com/llvm/llvm-project/commit/734c213004305bfca04b5906a3c591735f43a020

The indent is wrong. And I have to fix it here.

llvm/lib/Target/LoongArch/LoongArchInstrInfo.td

def : Pat<(sext_inreg (add GPR:$rj, (AddiPair:$im)), i32),
           (ADDI_W (ADDI_W GPR:$rj, (AddiPairImmLarge AddiPair:$im)),
                   (AddiPairImmSmall AddiPair:$im))>;
 } // Predicates = [IsLA64]
 
 let Predicates = [IsLA32] in {
 foreach Idx0 = 1...4 in {
   foreach Idx1 = 1...4 in {
     defvar CImm = !add(1, !shl(!add(1, !shl(1, Idx0)), Idx1));
     def : Pat<(mul_const_oneuse GPR:$r, (i32 CImm)),
               (ALSL_W (ALSL_W GPR:$r, GPR:$r, (i32 Idx0)),
                       GPR:$r, (i32 Idx1))>;
   }
 }
+foreach Idx0 = 1...4 in {
+  foreach Idx1 = 1...4 in {
+    defvar Cb = !add(1, !shl(1, Idx0));
+    defvar CImm = !add(Cb, !shl(Cb, Idx1));
+    def : Pat<(mul_const_oneuse GPR:$r, (i32 CImm)),
+              (ALSL_W (ALSL_W GPR:$r, GPR:$r, (i32 Idx0)),
+                      (ALSL_W GPR:$r, GPR:$r, (i32 Idx0)), (i32 Idx1))>;
+  }
+}
 } // Predicates = [IsLA32]
 
 let Predicates = [IsLA64] in {
 foreach Idx0 = 1...4 in {
   foreach Idx1 = 1...4 in {
     defvar CImm = !add(1, !shl(!add(1, !shl(1, Idx0)), Idx1));
     def : Pat<(sext_inreg (mul_const_oneuse GPR:$r, (i64 CImm)), i32),
               (ALSL_W (ALSL_W GPR:$r, GPR:$r, (i64 Idx0)),
                       GPR:$r, (i64 Idx1))>;
     def : Pat<(mul_const_oneuse GPR:$r, (i64 CImm)),
               (ALSL_D (ALSL_D GPR:$r, GPR:$r, (i64 Idx0)),
                       GPR:$r, (i64 Idx1))>;
   }
 }
+foreach Idx0 = 1...4 in {
+  foreach Idx1 = 1...4 in {
+    defvar Cb = !add(1, !shl(1, Idx0));
+    defvar CImm = !add(Cb, !shl(Cb, Idx1));
+    def : Pat<(sext_inreg (mul_const_oneuse GPR:$r, (i64 CImm)), i32),
+              (ALSL_W (ALSL_W GPR:$r, GPR:$r, (i64 Idx0)),
+                      (ALSL_W GPR:$r, GPR:$r, (i64 Idx0)), (i64 Idx1))>;
+    def : Pat<(mul_const_oneuse GPR:$r, (i64 CImm)),
+              (ALSL_D (ALSL_D GPR:$r, GPR:$r, (i64 Idx0)),
+                      (ALSL_D GPR:$r, GPR:$r, (i64 Idx0)), (i64 Idx1))>;
+  }
+}
 } // Predicates = [IsLA64]
 
 foreach Idx = 1...7 in {
   defvar ShamtA = !mul(8, Idx);
   defvar ShamtB = !mul(8, !sub(8, Idx));
   def : Pat<(or (shl GPR:$rk, (i64 ShamtA)), (srl GPR:$rj, (i64 ShamtB))),
             (BYTEPICK_D GPR:$rj, GPR:$rk, Idx)>;
 }

llvm/test/CodeGen/LoongArch/ir-instruction/mul.ll

 ; LA64-NEXT:    ret
   %b = mul i32 %a, 25
   ret i32 %b
 }
 
 define signext i32 @mul_i32_27(i32 %a) {
 ; LA32-LABEL: mul_i32_27:
 ; LA32:       # %bb.0:
-; LA32-NEXT:    ori $a1, $zero, 27
-; LA32-NEXT:    mul.w $a0, $a0, $a1
+; LA32-NEXT:    alsl.w $a0, $a0, $a0, 1
+; LA32-NEXT:    alsl.w $a0, $a0, $a0, 3
 ; LA32-NEXT:    ret
 ;
 ; LA64-LABEL: mul_i32_27:
 ; LA64:       # %bb.0:
-; LA64-NEXT:    ori $a1, $zero, 27
-; LA64-NEXT:    mul.d $a0, $a0, $a1
-; LA64-NEXT:    addi.w $a0, $a0, 0
+; LA64-NEXT:    alsl.w $a0, $a0, $a0, 1
+; LA64-NEXT:    alsl.w $a0, $a0, $a0, 3
 ; LA64-NEXT:    ret
   %b = mul i32 %a, 27
   ret i32 %b
 }
 
 define signext i32 @mul_i32_35(i32 %a) {
 ; LA32-LABEL: mul_i32_35:
 ; LA32:       # %bb.0:

 ; LA64-NEXT:    ret
   %b = mul i32 %a, 41
   ret i32 %b
 }
 
 define signext i32 @mul_i32_45(i32 %a) {
 ; LA32-LABEL: mul_i32_45:
 ; LA32:       # %bb.0:
-; LA32-NEXT:    ori $a1, $zero, 45
-; LA32-NEXT:    mul.w $a0, $a0, $a1
+; LA32-NEXT:    alsl.w $a0, $a0, $a0, 2
+; LA32-NEXT:    alsl.w $a0, $a0, $a0, 3
 ; LA32-NEXT:    ret
 ;
 ; LA64-LABEL: mul_i32_45:
 ; LA64:       # %bb.0:
-; LA64-NEXT:    ori $a1, $zero, 45
-; LA64-NEXT:    mul.d $a0, $a0, $a1
-; LA64-NEXT:    addi.w $a0, $a0, 0
+; LA64-NEXT:    alsl.w $a0, $a0, $a0, 2
+; LA64-NEXT:    alsl.w $a0, $a0, $a0, 3
 ; LA64-NEXT:    ret
   %b = mul i32 %a, 45
   ret i32 %b
 }
 
 define signext i32 @mul_i32_49(i32 %a) {
 ; LA32-LABEL: mul_i32_49:
 ; LA32:       # %bb.0:
 ; LA32-NEXT:    alsl.w $a1, $a0, $a0, 1
 ; LA32-NEXT:    alsl.w $a0, $a1, $a0, 4
 ; LA32-NEXT:    ret
 ;
 ; LA64-LABEL: mul_i32_49:
 ; LA64:       # %bb.0:
 ; LA64-NEXT:    alsl.w $a1, $a0, $a0, 1
 ; LA64-NEXT:    alsl.w $a0, $a1, $a0, 4
 ; LA64-NEXT:    ret
   %b = mul i32 %a, 49
   ret i32 %b
 }
 
 define signext i32 @mul_i32_51(i32 %a) {
 ; LA32-LABEL: mul_i32_51:
 ; LA32:       # %bb.0:
-; LA32-NEXT:    ori $a1, $zero, 51
-; LA32-NEXT:    mul.w $a0, $a0, $a1
+; LA32-NEXT:    alsl.w $a0, $a0, $a0, 1
+; LA32-NEXT:    alsl.w $a0, $a0, $a0, 4
 ; LA32-NEXT:    ret
 ;
 ; LA64-LABEL: mul_i32_51:
 ; LA64:       # %bb.0:
-; LA64-NEXT:    ori $a1, $zero, 51
-; LA64-NEXT:    mul.d $a0, $a0, $a1
-; LA64-NEXT:    addi.w $a0, $a0, 0
+; LA64-NEXT:    alsl.w $a0, $a0, $a0, 1
+; LA64-NEXT:    alsl.w $a0, $a0, $a0, 4
 ; LA64-NEXT:    ret
   %b = mul i32 %a, 51
   ret i32 %b
 }
 
 define signext i32 @mul_i32_69(i32 %a) {
 ; LA32-LABEL: mul_i32_69:
 ; LA32:       # %bb.0:

 ; LA64-NEXT:    ret
   %b = mul i32 %a, 81
   ret i32 %b
 }
 
 define signext i32 @mul_i32_85(i32 %a) {
 ; LA32-LABEL: mul_i32_85:
 ; LA32:       # %bb.0:
-; LA32-NEXT:    ori $a1, $zero, 85
-; LA32-NEXT:    mul.w $a0, $a0, $a1
+; LA32-NEXT:    alsl.w $a0, $a0, $a0, 2
+; LA32-NEXT:    alsl.w $a0, $a0, $a0, 4
 ; LA32-NEXT:    ret
 ;
 ; LA64-LABEL: mul_i32_85:
 ; LA64:       # %bb.0:
-; LA64-NEXT:    ori $a1, $zero, 85
-; LA64-NEXT:    mul.d $a0, $a0, $a1
-; LA64-NEXT:    addi.w $a0, $a0, 0
+; LA64-NEXT:    alsl.w $a0, $a0, $a0, 2
+; LA64-NEXT:    alsl.w $a0, $a0, $a0, 4
 ; LA64-NEXT:    ret
   %b = mul i32 %a, 85
   ret i32 %b
 }
 
 define signext i32 @mul_i32_137(i32 %a) {
 ; LA32-LABEL: mul_i32_137:
 ; LA32:       # %bb.0:

 ; LA64-NEXT:    ret
   %b = mul i32 %a, 145
   ret i32 %b
 }
 
 define signext i32 @mul_i32_153(i32 %a) {
 ; LA32-LABEL: mul_i32_153:
 ; LA32:       # %bb.0:
-; LA32-NEXT:    ori $a1, $zero, 153
-; LA32-NEXT:    mul.w $a0, $a0, $a1
+; LA32-NEXT:    alsl.w $a0, $a0, $a0, 3
+; LA32-NEXT:    alsl.w $a0, $a0, $a0, 4
 ; LA32-NEXT:    ret
 ;
 ; LA64-LABEL: mul_i32_153:
 ; LA64:       # %bb.0:
-; LA64-NEXT:    ori $a1, $zero, 153
-; LA64-NEXT:    mul.d $a0, $a0, $a1
-; LA64-NEXT:    addi.w $a0, $a0, 0
+; LA64-NEXT:    alsl.w $a0, $a0, $a0, 3
+; LA64-NEXT:    alsl.w $a0, $a0, $a0, 4
 ; LA64-NEXT:    ret
   %b = mul i32 %a, 153
   ret i32 %b
 }
 
 define signext i32 @mul_i32_273(i32 %a) {
 ; LA32-LABEL: mul_i32_273:
 ; LA32:       # %bb.0:
 ; LA32-NEXT:    alsl.w $a1, $a0, $a0, 4
 ; LA32-NEXT:    alsl.w $a0, $a1, $a0, 4
 ; LA32-NEXT:    ret
 ;
 ; LA64-LABEL: mul_i32_273:
 ; LA64:       # %bb.0:
 ; LA64-NEXT:    alsl.w $a1, $a0, $a0, 4
 ; LA64-NEXT:    alsl.w $a0, $a1, $a0, 4
 ; LA64-NEXT:    ret
   %b = mul i32 %a, 273
   ret i32 %b
 }
 
 define signext i32 @mul_i32_289(i32 %a) {
 ; LA32-LABEL: mul_i32_289:
 ; LA32:       # %bb.0:
-; LA32-NEXT:    ori $a1, $zero, 289
-; LA32-NEXT:    mul.w $a0, $a0, $a1
+; LA32-NEXT:    alsl.w $a0, $a0, $a0, 4
+; LA32-NEXT:    alsl.w $a0, $a0, $a0, 4
 ; LA32-NEXT:    ret
 ;
 ; LA64-LABEL: mul_i32_289:
 ; LA64:       # %bb.0:
-; LA64-NEXT:    ori $a1, $zero, 289
-; LA64-NEXT:    mul.d $a0, $a0, $a1
-; LA64-NEXT:    addi.w $a0, $a0, 0
+; LA64-NEXT:    alsl.w $a0, $a0, $a0, 4
+; LA64-NEXT:    alsl.w $a0, $a0, $a0, 4
 ; LA64-NEXT:    ret
   %b = mul i32 %a, 289
   ret i32 %b
 }
 
 define i64 @mul_i64_11(i64 %a) {
 ; LA32-LABEL: mul_i64_11:
 ; LA32:       # %bb.0:

 ; LA32-NEXT:    mul.w $a1, $a1, $a2
 ; LA32-NEXT:    mulh.wu $a3, $a0, $a2
 ; LA32-NEXT:    add.w $a1, $a3, $a1
 ; LA32-NEXT:    mul.w $a0, $a0, $a2
 ; LA32-NEXT:    ret
 ;
 ; LA64-LABEL: mul_i64_27:
 ; LA64:       # %bb.0:
-; LA64-NEXT:    ori $a1, $zero, 27
-; LA64-NEXT:    mul.d $a0, $a0, $a1
+; LA64-NEXT:    alsl.d $a0, $a0, $a0, 1
+; LA64-NEXT:    alsl.d $a0, $a0, $a0, 3
 ; LA64-NEXT:    ret
   %b = mul i64 %a, 27
   ret i64 %b
 }
 
 define i64 @mul_i64_35(i64 %a) {
 ; LA32-LABEL: mul_i64_35:
 ; LA32:       # %bb.0:

 ; LA32-NEXT:    mul.w $a1, $a1, $a2
 ; LA32-NEXT:    mulh.wu $a3, $a0, $a2
 ; LA32-NEXT:    add.w $a1, $a3, $a1
 ; LA32-NEXT:    mul.w $a0, $a0, $a2
 ; LA32-NEXT:    ret
 ;
 ; LA64-LABEL: mul_i64_45:
 ; LA64:       # %bb.0:
-; LA64-NEXT:    ori $a1, $zero, 45
-; LA64-NEXT:    mul.d $a0, $a0, $a1
+; LA64-NEXT:    alsl.d $a0, $a0, $a0, 2
+; LA64-NEXT:    alsl.d $a0, $a0, $a0, 3
 ; LA64-NEXT:    ret
   %b = mul i64 %a, 45
   ret i64 %b
 }
 
 define i64 @mul_i64_49(i64 %a) {
 ; LA32-LABEL: mul_i64_49:
 ; LA32:       # %bb.0:

 ; LA32-NEXT:    mul.w $a1, $a1, $a2
 ; LA32-NEXT:    mulh.wu $a3, $a0, $a2
 ; LA32-NEXT:    add.w $a1, $a3, $a1
 ; LA32-NEXT:    mul.w $a0, $a0, $a2
 ; LA32-NEXT:    ret
 ;
 ; LA64-LABEL: mul_i64_51:
 ; LA64:       # %bb.0:
-; LA64-NEXT:    ori $a1, $zero, 51
-; LA64-NEXT:    mul.d $a0, $a0, $a1
+; LA64-NEXT:    alsl.d $a0, $a0, $a0, 1
+; LA64-NEXT:    alsl.d $a0, $a0, $a0, 4
 ; LA64-NEXT:    ret
   %b = mul i64 %a, 51
   ret i64 %b
 }
 
 define i64 @mul_i64_69(i64 %a) {
 ; LA32-LABEL: mul_i64_69:
 ; LA32:       # %bb.0:

 ; LA32-NEXT:    mul.w $a1, $a1, $a2
 ; LA32-NEXT:    mulh.wu $a3, $a0, $a2
 ; LA32-NEXT:    add.w $a1, $a3, $a1
 ; LA32-NEXT:    mul.w $a0, $a0, $a2
 ; LA32-NEXT:    ret
 ;
 ; LA64-LABEL: mul_i64_85:
 ; LA64:       # %bb.0:
-; LA64-NEXT:    ori $a1, $zero, 85
-; LA64-NEXT:    mul.d $a0, $a0, $a1
+; LA64-NEXT:    alsl.d $a0, $a0, $a0, 2
+; LA64-NEXT:    alsl.d $a0, $a0, $a0, 4
 ; LA64-NEXT:    ret
   %b = mul i64 %a, 85
   ret i64 %b
 }
 
 define i64 @mul_i64_137(i64 %a) {
 ; LA32-LABEL: mul_i64_137:
 ; LA32:       # %bb.0:

 ; LA32-NEXT:    mul.w $a1, $a1, $a2
 ; LA32-NEXT:    mulh.wu $a3, $a0, $a2
 ; LA32-NEXT:    add.w $a1, $a3, $a1
 ; LA32-NEXT:    mul.w $a0, $a0, $a2
 ; LA32-NEXT:    ret
 ;
 ; LA64-LABEL: mul_i64_153:
 ; LA64:       # %bb.0:
-; LA64-NEXT:    ori $a1, $zero, 153
-; LA64-NEXT:    mul.d $a0, $a0, $a1
+; LA64-NEXT:    alsl.d $a0, $a0, $a0, 3
+; LA64-NEXT:    alsl.d $a0, $a0, $a0, 4
 ; LA64-NEXT:    ret
   %b = mul i64 %a, 153
   ret i64 %b
 }
 
 define i64 @mul_i64_273(i64 %a) {
 ; LA32-LABEL: mul_i64_273:
 ; LA32:       # %bb.0:

 ; LA32-NEXT:    mul.w $a1, $a1, $a2
 ; LA32-NEXT:    mulh.wu $a3, $a0, $a2
 ; LA32-NEXT:    add.w $a1, $a3, $a1
 ; LA32-NEXT:    mul.w $a0, $a0, $a2
 ; LA32-NEXT:    ret
 ;
 ; LA64-LABEL: mul_i64_289:
 ; LA64:       # %bb.0:
-; LA64-NEXT:    ori $a1, $zero, 289
-; LA64-NEXT:    mul.d $a0, $a0, $a1
+; LA64-NEXT:    alsl.d $a0, $a0, $a0, 4
+; LA64-NEXT:    alsl.d $a0, $a0, $a0, 4
 ; LA64-NEXT:    ret
   %b = mul i64 %a, 289
   ret i64 %b
 }