[lldb] Add support for MSP430 in LLDB.

[kuilpd]

Summary

Add MSP430 to the list of available targets, implement MSP430 ABI, add support for debugging targets with 16-bit address size.

The update is intended for use with MSPDebug, a GDB server implementation for MSP430.

[asl]

@JDevlieghere @bulbazord I don't think I know lldb codebase well enough to cover the complete review here. But from MSP430-standpoint things seem to be correct. Will you be able to review or suggest some other reviewers?

Thanks!

[bulbazord]

I'm not too familiar with MSP430 but the general idea looks fine. Others may have comments about areas I'm less familiar with.

One concern I have is that there are no tests. I can understand that it may be difficult to get automated tests running testing the debugging of an architecture like MSP430 but there are things we can test to sanity test MSP430 support... At the very least, adding a unit test for the new ArchSpec support would be good -- llvm-project/lldb/unittests/Utility/ArchSpecTest.cpp.

lldb/include/lldb/Utility/DataExtractor.h

845–846

I know this is not your code but maybe we should deconditionalize this assertion?

lldb/source/Expression/IRMemoryMap.cpp

98–113

I think with the change above we should probably make this assertion more useful.

99–100

switch on the expression directly instead of creating a local?

101–109

Instead of making 8 the default, maybe we can assert on default or something? This can prevent future bugs where perhaps address_byte_size is not 8 for some reason and we do the wrong thing.

159–164

Same here, let's not assume 8 if we hit default.

171–174

Is this true for all machines where the address byte size is 2? Seems like 512 and 4096 should be based on something other than the address byte size. Platform/ABI perhaps?

lldb/source/Expression/LLVMUserExpression.cpp

336–339

Same here, this seems dependent on Platform/ABI.

lldb/source/Plugins/ABI/MSP430/ABISysV_msp430.h

14–17

You can remove these comments, I don't think we track that kind of thing anymore... I think?

52–55

nit: you can merge these

[kuilpd]

lldb/source/Expression/IRMemoryMap.cpp

98–113

Do we need this assert if I there is already one in the default case above?

default:
  lldbassert(false && "Invalid address size.");
  return LLDB_INVALID_ADDRESS;

[kuilpd]

Added asserts in default cases, added checks for architecture instead of address size, added a unit test.

[kuilpd]

Wrong previous diff.

Added asserts in default cases, added checks for architecture instead of address size, added a unit test.

[DavidSpickett]

One concern I have is that there are no tests. I can understand that it may be difficult to get automated tests running testing the debugging of an architecture like MSP430 but there are things we can test to sanity test MSP430 support

Two things come to mind:

• Core files (though it is embedded so is that even a thing?)
• Mocking an msp430 remote, as we do for example in Target XML tests.

[kuilpd]

In D146965#4240075, @DavidSpickett wrote:

Two things come to mind:

• Core files (though it is embedded so is that even a thing?)

It is completely bare metal, but the address space is only 16-bit, so would the entire 64 KB of memory count as a core dump?

• Mocking an msp430 remote, as we do for example in Target XML tests.

mspdebug (the tool that implements gdb server for MSP430) doesn't have a lot of features, doesn't support memory region info or even target.xml with register information, so it all comes down to fallback information in LLDB.
I can make a test that checks if fallback information even exists and registers have correct data and size, for example.
What else would you recommend to test for?

[DavidSpickett]

It is completely bare metal, but the address space is only 16-bit, so would the entire 64 KB of memory count as a core dump?

It's more "world" than "core" but yeah why not. Probably won't need all 64k though, see below...

I can make a test that checks if fallback information even exists and registers have correct data and size, for example.

Yes that would be great. Plus it documents our expectations (or lack of) from this third party debug stub.

What else would you recommend to test for?

Backtrace is the obvious thing, assuming you have implemented any of that yet. What you could do is dump the stack from a real device and use the previously mentioned fake GDB remote to replay it to lldb.

Other things:

• Stepping
• Breakpoints, hardware and software. Also, do the breakpoints report an address after the stop or before.

If the feature mostly relies on the existing msp430 stub being correct, there's not much point testing it. For anything where lldb has to make some msp430 specific decision, see if you can mock up a gdb remote to test it.

lldb/source/Plugins/Platform/Linux/PlatformLinux.cpp

126

If this is bare metal why do we have changes to Linux code here? Or is this the default platform used when connecting to the msp430 debug stub.

That said, I'm not sure we A: support Hexagon or B: it runs linux either :)

[bulbazord]

lldb/source/Plugins/Platform/Linux/PlatformLinux.cpp

126

Hexagon is definitely supported AFAIK but I'm not sure it runs Linux. It does looks like we support an SysV ABI class for Hexagon though, so perhaps that's somewhat indicative that it runs something with that ABI...

[kuilpd]

Added a test for registers, breakpoints, stepping, backtracing.

[kuilpd]

In D146965#4240075, @DavidSpickett wrote:

Two things come to mind:

• Core files (though it is embedded so is that even a thing?)

Looked into core dumping in LLDB a bit, I think it pretty much requires that there is an OS, and there needs to be an explicit support for the architecture in question.
Plus, mspdebug doesn't actually support core files, there is no use for it now even if LLDB can generate it.

• Mocking an msp430 remote, as we do for example in Target XML tests.

Did this, I put the same packets mspdebug sends into the mockup.

[DavidSpickett]

Looked into core dumping in LLDB a bit, I think it pretty much requires that there is an OS, and there needs to be an explicit support for the architecture in question. Plus, mspdebug doesn't actually support core files, there is no use for it now even if LLDB can generate it.

That makes sense. I was more thinking about carving useful memory out of a raw dump of the RAM in any case, which is exactly what you've done in the test you added.

If you wanted to have a corefile like experience I guess you could do that RAM dump, load it back into a simulator and connect to that. But regardless, out of scope here.

lldb/test/API/functionalities/gdb_remote_client/TestMSP430MSPDebug.py

7

Please add a comment along the lines of: This test ensures that lldb correctly handles packets sent by <the msp430 debug stub>.

Ideally with a link to that stub or its source or the vendor's website, whatever's available.

If you can say how you captured the packets that would be good too. I assume just connecting and turning on packet logging but worth mentioning in case you had to do something unique.

24

Can you generate these with a helper function? Seems like the first bit changes and the rest are blanks you could add each time.

Also could you yield each time? Been a long time since I did serious Python but I think that could remove the counter.

30

I don't know that we have recent enough Pythons to use match, when was it added?

I don't have the minimum versions for lldb to hand, I would guess it is 3.7.

34

For these can you write a helper to generate the bulk of it? And ideally describe which bit is the important part. I guess some of this is the stack.

97

Could you also check that the disassembler works?

I mistakenly thought that msp430 didn't have an llvm backend but it seems that it does so it should "just work".

lldb/test/API/functionalities/gdb_remote_client/msp430.yaml

2

I forget if/how you add comments to a YAML file but however it's done, please add the C source that was used to generate the program file as a comment at the top.

[kuilpd]

Added comments, changed memory strings formatting, added disassembler check.

[DavidSpickett]

Thanks for the test changes, looks good.

There is some documentation that lists what targets we support, MSP430 should be added there. lldb/docs/index.rst is one of those.

Otherwise, can anyone else think of major debug features that should be (at least) smoke tested? (of course you could do this in follow up patches if it needs more work)

lldb/test/API/functionalities/gdb_remote_client/TestMSP430MSPDebug.py

104

Write some registers too? Again, not likely to find anything, just ensures we have the right offsets and don't take the wrong 16 bits out of the value.

[DavidSpickett]

Also please update the commit message to make it clear that this is for using lldb with mspdebug, not with lldb-server.

To help us and also to help anyone who might link to this commit to share the good news :)

[DavidSpickett]

I just landed https://github.com/llvm/llvm-project/commit/57c8fee1b97eb7e70513b935b765f8381a941b18 which will give you build errors. All you have to do is add an extra nullptr to your register infos.

[kuilpd]

Rebased and updated register info initialization.

[DavidSpickett]

I'm sure there's something missing but LGTM.

@bulbazord ?

[bulbazord]

In D146965#4274274, @DavidSpickett wrote:

I'm sure there's something missing but LGTM.

@bulbazord ?

I'm satisfied with this since there are tests. I'm not sure what might be missing but I'm sure we'll find it in time.

[asl]

Thanks @bulbazord @DavidSpickett !

[asl]

@kuilpd

Please ensure that the patch is rebased into top of main and builds w/o errors / warnings.

[kuilpd]

Fixed Triple.h include.

lldb/include/lldb/Utility/ArchSpec.h

enum Core {
     eCore_mips64r5,
     eCore_mips64r6,
     eCore_mips64el,
     eCore_mips64r2el,
     eCore_mips64r3el,
     eCore_mips64r5el,
     eCore_mips64r6el,
 
+    eCore_msp430,
+
     eCore_ppc_generic,
     eCore_ppc_ppc601,
     eCore_ppc_ppc602,
     eCore_ppc_ppc603,
     eCore_ppc_ppc603e,
     eCore_ppc_ppc603ev,
     eCore_ppc_ppc604,
     eCore_ppc_ppc604e,

lldb/include/lldb/Utility/DataExtractor.h

public:
 
   /// Set the address byte size.
   ///
   /// Set the size in bytes that will be used when extracting any address and
   /// pointer values from data contained in this object.
   ///
   /// \param[in] addr_size
   ///     The size in bytes to use when extracting addresses.
   void SetAddressByteSize(uint32_t addr_size) {
-#ifdef LLDB_CONFIGURATION_DEBUG
-    assert(addr_size == 4 || addr_size == 8);
-#endif
+    assert(addr_size == 2 || addr_size == 4 || addr_size == 8);
     m_addr_size = addr_size;
   }
 
   /// Set data with a buffer that is caller owned.
   ///
   /// Use data that is owned by the caller when extracting values. The data
   /// must stay around as long as this object, or any object that copies a
   /// subset of this object's data, is valid. If \a bytes is nullptr, or \a

lldb/source/Expression/IRMemoryMap.cpp

if (m_allocations.empty()) {
     lldb::addr_t addr = back->first;
     size_t alloc_size = back->second.m_size;
     ret = llvm::alignTo(addr + alloc_size, 4096);
   }
 
   // Now, if it's possible to use the GetMemoryRegionInfo API to detect mapped
   // regions, walk forward through memory until a region is found that has
   // adequate space for our allocation.
   if (process_is_alive) {
-    const uint64_t end_of_memory = process_sp->GetAddressByteSize() == 8
-                                       ? 0xffffffffffffffffull
-                                       : 0xffffffffull;
-
-    lldbassert(process_sp->GetAddressByteSize() == 4 ||
-               end_of_memory != 0xffffffffull);
+    uint64_t end_of_memory;
+    switch (process_sp->GetAddressByteSize()) {
+    case 2:
+      end_of_memory = 0xffffull;
+      break;
+    case 4:
+      end_of_memory = 0xffffffffull;
+      break;
+    case 8:
+      end_of_memory = 0xffffffffffffffffull;
+      break;
+    default:
+      lldbassert(false && "Invalid address size.");
+      return LLDB_INVALID_ADDRESS;
+    }
 
     MemoryRegionInfo region_info;
     Status err = process_sp->GetMemoryRegionInfo(ret, region_info);
     if (err.Success()) {
       while (true) {
         if (region_info.GetReadable() != MemoryRegionInfo::OptionalBool::eNo ||
             region_info.GetWritable() != MemoryRegionInfo::OptionalBool::eNo ||
             region_info.GetExecutable() !=
if (err.Success()) {
         }
       }
     }
   }
 
   // We've tried our algorithm, and it didn't work.  Now we have to reset back
   // to the end of the allocations we've already reported, or use a 'sensible'
   // default if this is our first allocation.
-
   if (m_allocations.empty()) {
     uint32_t address_byte_size = GetAddressByteSize();
     if (address_byte_size != UINT32_MAX) {
       switch (address_byte_size) {
-      case 8:
-        ret = 0xdead0fff00000000ull;
+      case 2:
+        ret = 0x8000ull;
         break;
       case 4:
         ret = 0xee000000ull;
         break;
-      default:
+      case 8:
+        ret = 0xdead0fff00000000ull;
         break;
+      default:
+        lldbassert(false && "Invalid address size.");
+        return LLDB_INVALID_ADDRESS;
       }
     }
   } else {
     auto back = m_allocations.rbegin();
     lldb::addr_t addr = back->first;
     size_t alloc_size = back->second.m_size;
-    ret = llvm::alignTo(addr + alloc_size, 4096);
+    auto arch = target_sp->GetArchitecture().GetTriple().getArch();
+    auto align = arch == llvm::Triple::msp430 ? 512 : 4096;
+    ret = llvm::alignTo(addr + alloc_size, align);
   }
 
   return ret;
 }
 
 IRMemoryMap::AllocationMap::iterator
 IRMemoryMap::FindAllocation(lldb::addr_t addr, size_t size) {
   if (addr == LLDB_INVALID_ADDRESS)
     return m_allocations.end();

lldb/source/Expression/LLVMUserExpression.cpp

if (m_materialized_address == LLDB_INVALID_ADDRESS) {
       }
     }
 
     struct_address = m_materialized_address;
 
     if (m_can_interpret && m_stack_frame_bottom == LLDB_INVALID_ADDRESS) {
       Status alloc_error;
 
-      const size_t stack_frame_size = 512 * 1024;
+      auto arch = target->GetArchitecture().GetTriple().getArch();
+      const size_t stack_frame_size =
+          arch == llvm::Triple::msp430 ? 512 : 512 * 1024;
 
       const bool zero_memory = false;
 
       m_stack_frame_bottom = m_execution_unit_sp->Malloc(
           stack_frame_size, 8,
           lldb::ePermissionsReadable | lldb::ePermissionsWritable,
           IRMemoryMap::eAllocationPolicyHostOnly, zero_memory, alloc_error);
 
       m_stack_frame_top = m_stack_frame_bottom + stack_frame_size;

lldb/source/Host/common/NativeProcessProtocol.cpp

 }
 
 llvm::Expected<llvm::ArrayRef<uint8_t>>
 NativeProcessProtocol::GetSoftwareBreakpointTrapOpcode(size_t size_hint) {
   static const uint8_t g_aarch64_opcode[] = {0x00, 0x00, 0x20, 0xd4};
   static const uint8_t g_i386_opcode[] = {0xCC};
   static const uint8_t g_mips64_opcode[] = {0x00, 0x00, 0x00, 0x0d};
   static const uint8_t g_mips64el_opcode[] = {0x0d, 0x00, 0x00, 0x00};
+  static const uint8_t g_msp430_opcode[] = {0x43, 0x43};
   static const uint8_t g_s390x_opcode[] = {0x00, 0x01};
   static const uint8_t g_ppc_opcode[] = {0x7f, 0xe0, 0x00, 0x08};   // trap
   static const uint8_t g_ppcle_opcode[] = {0x08, 0x00, 0xe0, 0x7f}; // trap
   static const uint8_t g_riscv_opcode[] = {0x73, 0x00, 0x10, 0x00}; // ebreak
   static const uint8_t g_riscv_opcode_c[] = {0x02, 0x90};           // c.ebreak
   static const uint8_t g_loongarch_opcode[] = {0x05, 0x00, 0x2a,
                                                0x00}; // break 0x5
 
NativeProcessProtocol::GetSoftwareBreakpointTrapOpcode(size_t size_hint) {
   case llvm::Triple::mips:
   case llvm::Triple::mips64:
     return llvm::ArrayRef(g_mips64_opcode);
 
   case llvm::Triple::mipsel:
   case llvm::Triple::mips64el:
     return llvm::ArrayRef(g_mips64el_opcode);
 
+  case llvm::Triple::msp430:
+    return llvm::ArrayRef(g_msp430_opcode);
+
   case llvm::Triple::systemz:
     return llvm::ArrayRef(g_s390x_opcode);
 
   case llvm::Triple::ppc:
   case llvm::Triple::ppc64:
     return llvm::ArrayRef(g_ppc_opcode);
 
   case llvm::Triple::ppc64le:

lldb/source/Plugins/ABI/CMakeLists.txt

-foreach(target AArch64 ARM ARC Hexagon Mips PowerPC SystemZ X86)
+foreach(target AArch64 ARM ARC Hexagon Mips MSP430 PowerPC SystemZ X86)
   if (${target} IN_LIST LLVM_TARGETS_TO_BUILD)
     add_subdirectory(${target})
   endif()
 endforeach()

lldb/source/Plugins/ABI/MSP430/ABISysV_msp430.h

+//===-- ABISysV_msp430.h ----------------------------------------*- C++ -*-===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef LLDB_SOURCE_PLUGINS_ABI_MSP430_ABISYSV_MSP430_H
+#define LLDB_SOURCE_PLUGINS_ABI_MSP430_ABISYSV_MSP430_H
+
+#include "lldb/Target/ABI.h"
+#include "lldb/lldb-private.h"
+
+class ABISysV_msp430 : public lldb_private::RegInfoBasedABI {
+public:
+  ~ABISysV_msp430() override = default;
+
+  size_t GetRedZoneSize() const override;
+
+  bool PrepareTrivialCall(lldb_private::Thread &thread, lldb::addr_t sp,
+                          lldb::addr_t functionAddress,
+                          lldb::addr_t returnAddress,
+                          llvm::ArrayRef<lldb::addr_t> args) const override;
+
+  bool GetArgumentValues(lldb_private::Thread &thread,
+                         lldb_private::ValueList &values) const override;
+
+  lldb_private::Status
+  SetReturnValueObject(lldb::StackFrameSP &frame_sp,
+                       lldb::ValueObjectSP &new_value) override;
+
+  lldb::ValueObjectSP
+  GetReturnValueObjectImpl(lldb_private::Thread &thread,
+                           lldb_private::CompilerType &type) const override;
+
+  bool
+  CreateFunctionEntryUnwindPlan(lldb_private::UnwindPlan &unwind_plan) override;
+
+  bool CreateDefaultUnwindPlan(lldb_private::UnwindPlan &unwind_plan) override;
+
+  bool RegisterIsVolatile(const lldb_private::RegisterInfo *reg_info) override;
+
+  bool CallFrameAddressIsValid(lldb::addr_t cfa) override {
+    // Make sure the stack call frame addresses are 2 byte aligned
+    // and not zero
+    if (cfa & 0x01 || cfa == 0)
+      return false;
+    return true;
+  }
+
+  bool CodeAddressIsValid(lldb::addr_t pc) override { return true; }
+
+  const lldb_private::RegisterInfo *
+  GetRegisterInfoArray(uint32_t &count) override;
+
+  //------------------------------------------------------------------
+  // Static Functions
+  //------------------------------------------------------------------
+
+  static void Initialize();
+
+  static void Terminate();
+
+  static lldb::ABISP CreateInstance(lldb::ProcessSP process_sp,
+                                    const lldb_private::ArchSpec &arch);
+
+  static llvm::StringRef GetPluginNameStatic() { return "sysv-msp430"; }
+
+  // PluginInterface protocol
+
+  llvm::StringRef GetPluginName() override { return GetPluginNameStatic(); }
+
+protected:
+  void CreateRegisterMapIfNeeded();
+
+  lldb::ValueObjectSP
+  GetReturnValueObjectSimple(lldb_private::Thread &thread,
+                             lldb_private::CompilerType &ast_type) const;
+
+  bool RegisterIsCalleeSaved(const lldb_private::RegisterInfo *reg_info);
+
+private:
+  using lldb_private::RegInfoBasedABI::RegInfoBasedABI;
+};
+
+#endif // LLDB_SOURCE_PLUGINS_ABI_MSP430_ABISYSV_MSP430_H

lldb/source/Plugins/ABI/MSP430/ABISysV_msp430.cpp

+//===-- ABISysV_msp430.cpp --------------------------------------*- C++ -*-===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+
+#include "ABISysV_msp430.h"
+
+#include "lldb/Core/Module.h"
+#include "lldb/Core/PluginManager.h"
+#include "lldb/Core/Value.h"
+#include "lldb/Core/ValueObjectConstResult.h"
+#include "lldb/Core/ValueObjectMemory.h"
+#include "lldb/Core/ValueObjectRegister.h"
+#include "lldb/Symbol/UnwindPlan.h"
+#include "lldb/Target/Process.h"
+#include "lldb/Target/RegisterContext.h"
+#include "lldb/Target/StackFrame.h"
+#include "lldb/Target/Target.h"
+#include "lldb/Target/Thread.h"
+#include "lldb/Utility/ConstString.h"
+#include "lldb/Utility/DataExtractor.h"
+#include "lldb/Utility/Log.h"
+#include "lldb/Utility/RegisterValue.h"
+
+#include "llvm/IR/DerivedTypes.h"
+#include "llvm/TargetParser/Triple.h"
+
+using namespace lldb;
+using namespace lldb_private;
+
+LLDB_PLUGIN_DEFINE_ADV(ABISysV_msp430, ABIMSP430)
+
+enum dwarf_regnums {
+  dwarf_pc = 0,
+  dwarf_sp,
+  dwarf_r2,
+  dwarf_r3,
+  dwarf_fp,
+  dwarf_r5,
+  dwarf_r6,
+  dwarf_r7,
+  dwarf_r8,
+  dwarf_r9,
+  dwarf_r10,
+  dwarf_r11,
+  dwarf_r12,
+  dwarf_r13,
+  dwarf_r14,
+  dwarf_r15,
+};
+
+static const RegisterInfo g_register_infos[] = {
+    {"r0",
+     "pc",
+     2,
+     0,
+     eEncodingUint,
+     eFormatHex,
+     {dwarf_pc, dwarf_pc, LLDB_REGNUM_GENERIC_PC, LLDB_INVALID_REGNUM,
+      LLDB_INVALID_REGNUM},
+     nullptr,
+     nullptr,
+     nullptr,
+    },
+    {"r1",
+     "sp",
+     2,
+     0,
+     eEncodingUint,
+     eFormatHex,
+     {dwarf_sp, dwarf_sp, LLDB_REGNUM_GENERIC_SP, LLDB_INVALID_REGNUM,
+      LLDB_INVALID_REGNUM},
+     nullptr,
+     nullptr,
+     nullptr,
+    },
+    {"r2",
+     "",
+     2,
+     0,
+     eEncodingUint,
+     eFormatHex,
+     {dwarf_r2, dwarf_r2, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      LLDB_INVALID_REGNUM},
+     nullptr,
+     nullptr,
+     nullptr,
+    },
+    {"r3",
+     "",
+     2,
+     0,
+     eEncodingUint,
+     eFormatHex,
+     {dwarf_r3, dwarf_r3, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      LLDB_INVALID_REGNUM},
+     nullptr,
+     nullptr,
+     nullptr,
+    },
+    {"r4",
+     "fp",
+     2,
+     0,
+     eEncodingUint,
+     eFormatHex,
+     {dwarf_fp, dwarf_fp, LLDB_REGNUM_GENERIC_FP, LLDB_INVALID_REGNUM,
+      LLDB_INVALID_REGNUM},
+     nullptr,
+     nullptr,
+     nullptr,
+    },
+    {"r5",
+     "",
+     2,
+     0,
+     eEncodingUint,
+     eFormatHex,
+     {dwarf_r5, dwarf_r5, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      LLDB_INVALID_REGNUM},
+     nullptr,
+     nullptr,
+     nullptr,
+    },
+    {"r6",
+     "",
+     2,
+     0,
+     eEncodingUint,
+     eFormatHex,
+     {dwarf_r6, dwarf_r6, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      LLDB_INVALID_REGNUM},
+     nullptr,
+     nullptr,
+     nullptr,
+    },
+    {"r7",
+     "",
+     2,
+     0,
+     eEncodingUint,
+     eFormatHex,
+     {dwarf_r7, dwarf_r7, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      LLDB_INVALID_REGNUM},
+     nullptr,
+     nullptr,
+     nullptr,
+    },
+    {"r8",
+     "",
+     2,
+     0,
+     eEncodingUint,
+     eFormatHex,
+     {dwarf_r8, dwarf_r8, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      LLDB_INVALID_REGNUM},
+     nullptr,
+     nullptr,
+     nullptr,
+    },
+    {"r9",
+     "",
+     2,
+     0,
+     eEncodingUint,
+     eFormatHex,
+     {dwarf_r9, dwarf_r9, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      LLDB_INVALID_REGNUM},
+     nullptr,
+     nullptr,
+     nullptr,
+    },
+    {"r10",
+     "",
+     2,
+     0,
+     eEncodingUint,
+     eFormatHex,
+     {dwarf_r10, dwarf_r10, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      LLDB_INVALID_REGNUM},
+     nullptr,
+     nullptr,
+     nullptr,
+    },
+    {"r11",
+     "",
+     2,
+     0,
+     eEncodingUint,
+     eFormatHex,
+     {dwarf_r11, dwarf_r11, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      LLDB_INVALID_REGNUM},
+     nullptr,
+     nullptr,
+     nullptr,
+    },
+    {"r12",
+     "",
+     2,
+     0,
+     eEncodingUint,
+     eFormatHex,
+     {dwarf_r12, dwarf_r12, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      LLDB_INVALID_REGNUM},
+     nullptr,
+     nullptr,
+     nullptr,
+    },
+    {"r13",
+     "",
+     2,
+     0,
+     eEncodingUint,
+     eFormatHex,
+     {dwarf_r13, dwarf_r13, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      LLDB_INVALID_REGNUM},
+     nullptr,
+     nullptr,
+     nullptr,
+    },
+    {"r14",
+     "",
+     2,
+     0,
+     eEncodingUint,
+     eFormatHex,
+     {dwarf_r14, dwarf_r14, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      LLDB_INVALID_REGNUM},
+     nullptr,
+     nullptr,
+     nullptr,
+    },
+    {"r15",
+     "",
+     2,
+     0,
+     eEncodingUint,
+     eFormatHex,
+     {dwarf_r15, dwarf_r15, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
+      LLDB_INVALID_REGNUM},
+     nullptr,
+     nullptr,
+     nullptr,
+    }};
+
+static const uint32_t k_num_register_infos =
+    sizeof(g_register_infos) / sizeof(RegisterInfo);
+
+const lldb_private::RegisterInfo *
+ABISysV_msp430::GetRegisterInfoArray(uint32_t &count) {
+  // Make the C-string names and alt_names for the register infos into const
+  // C-string values by having the ConstString unique the names in the global
+  // constant C-string pool.
+  count = k_num_register_infos;
+  return g_register_infos;
+}
+
+size_t ABISysV_msp430::GetRedZoneSize() const { return 0; }
+
+//------------------------------------------------------------------
+// Static Functions
+//------------------------------------------------------------------
+
+ABISP
+ABISysV_msp430::CreateInstance(lldb::ProcessSP process_sp,
+                               const ArchSpec &arch) {
+  if (arch.GetTriple().getArch() == llvm::Triple::msp430) {
+    return ABISP(
+        new ABISysV_msp430(std::move(process_sp), MakeMCRegisterInfo(arch)));
+  }
+  return ABISP();
+}
+
+bool ABISysV_msp430::PrepareTrivialCall(Thread &thread, lldb::addr_t sp,
+                                        lldb::addr_t pc, lldb::addr_t ra,
+                                        llvm::ArrayRef<addr_t> args) const {
+  // we don't use the traditional trivial call specialized for jit
+  return false;
+}
+
+bool ABISysV_msp430::GetArgumentValues(Thread &thread,
+                                       ValueList &values) const {
+  return false;
+}
+
+Status ABISysV_msp430::SetReturnValueObject(lldb::StackFrameSP &frame_sp,
+                                            lldb::ValueObjectSP &new_value_sp) {
+  return Status();
+}
+
+ValueObjectSP ABISysV_msp430::GetReturnValueObjectSimple(
+    Thread &thread, CompilerType &return_compiler_type) const {
+  ValueObjectSP return_valobj_sp;
+  return return_valobj_sp;
+}
+
+ValueObjectSP ABISysV_msp430::GetReturnValueObjectImpl(
+    Thread &thread, CompilerType &return_compiler_type) const {
+  ValueObjectSP return_valobj_sp;
+  return return_valobj_sp;
+}
+
+// called when we are on the first instruction of a new function
+bool ABISysV_msp430::CreateFunctionEntryUnwindPlan(UnwindPlan &unwind_plan) {
+  unwind_plan.Clear();
+  unwind_plan.SetRegisterKind(eRegisterKindDWARF);
+
+  uint32_t sp_reg_num = dwarf_sp;
+  uint32_t pc_reg_num = dwarf_pc;
+
+  UnwindPlan::RowSP row(new UnwindPlan::Row);
+  row->GetCFAValue().SetIsRegisterPlusOffset(sp_reg_num, 2);
+  row->SetRegisterLocationToAtCFAPlusOffset(pc_reg_num, -2, true);
+  row->SetRegisterLocationToIsCFAPlusOffset(sp_reg_num, 0, true);
+
+  unwind_plan.AppendRow(row);
+  unwind_plan.SetSourceName("msp430 at-func-entry default");
+  unwind_plan.SetSourcedFromCompiler(eLazyBoolNo);
+  return true;
+}
+
+bool ABISysV_msp430::CreateDefaultUnwindPlan(UnwindPlan &unwind_plan) {
+  unwind_plan.Clear();
+  unwind_plan.SetRegisterKind(eRegisterKindDWARF);
+
+  uint32_t fp_reg_num = dwarf_fp;
+  uint32_t sp_reg_num = dwarf_sp;
+  uint32_t pc_reg_num = dwarf_pc;
+
+  UnwindPlan::RowSP row(new UnwindPlan::Row);
+  row->GetCFAValue().SetIsRegisterPlusOffset(sp_reg_num, 2);
+  row->SetRegisterLocationToAtCFAPlusOffset(pc_reg_num, -2, true);
+  row->SetRegisterLocationToIsCFAPlusOffset(sp_reg_num, 0, true);
+  row->SetRegisterLocationToUnspecified(fp_reg_num, true);
+
+  unwind_plan.AppendRow(row);
+  unwind_plan.SetSourceName("msp430 default unwind plan");
+  unwind_plan.SetSourcedFromCompiler(eLazyBoolNo);
+  unwind_plan.SetUnwindPlanValidAtAllInstructions(eLazyBoolNo);
+  return true;
+}
+
+bool ABISysV_msp430::RegisterIsVolatile(const RegisterInfo *reg_info) {
+  return !RegisterIsCalleeSaved(reg_info);
+}
+
+bool ABISysV_msp430::RegisterIsCalleeSaved(const RegisterInfo *reg_info) {
+  int reg = ((reg_info->byte_offset) / 2);
+
+  bool save = (reg >= 4) && (reg <= 10);
+  return save;
+}
+
+void ABISysV_msp430::Initialize(void) {
+  PluginManager::RegisterPlugin(
+      GetPluginNameStatic(), "System V ABI for msp430 targets", CreateInstance);
+}
+
+void ABISysV_msp430::Terminate(void) {
+  PluginManager::UnregisterPlugin(CreateInstance);
+}

lldb/source/Plugins/ABI/MSP430/CMakeLists.txt

+add_lldb_library(lldbPluginABIMSP430 PLUGIN
+  ABISysV_msp430.cpp
+
+  LINK_LIBS
+    lldbCore
+    lldbSymbol
+    lldbTarget
+  LINK_COMPONENTS
+    Support
+    TargetParser
+  )
+

lldb/source/Plugins/ObjectFile/Breakpad/BreakpadRecords.cpp

 
 template <>
 llvm::Triple::ArchType stringTo<llvm::Triple::ArchType>(llvm::StringRef Str) {
   using llvm::Triple;
   return llvm::StringSwitch<Triple::ArchType>(Str)
       .Case("arm", Triple::arm)
       .Cases("arm64", "arm64e", Triple::aarch64)
       .Case("mips", Triple::mips)
+      .Case("msp430", Triple::msp430)
       .Case("ppc", Triple::ppc)
       .Case("ppc64", Triple::ppc64)
       .Case("s390", Triple::systemz)
       .Case("sparc", Triple::sparc)
       .Case("sparcv9", Triple::sparcv9)
       .Case("x86", Triple::x86)
       .Cases("x86_64", "x86_64h", Triple::x86_64)
       .Default(Triple::UnknownArch);

lldb/source/Plugins/Platform/Linux/PlatformLinux.cpp

if (hostArch.GetTriple().isArch64Bit()) {
       m_supported_architectures.push_back(
           HostInfo::GetArchitecture(HostInfo::eArchKind32));
     }
   } else {
     m_supported_architectures = CreateArchList(
         {llvm::Triple::x86_64, llvm::Triple::x86, llvm::Triple::arm,
          llvm::Triple::aarch64, llvm::Triple::mips64, llvm::Triple::mips64,
          llvm::Triple::hexagon, llvm::Triple::mips, llvm::Triple::mips64el,
-         llvm::Triple::mipsel, llvm::Triple::systemz},
+         llvm::Triple::mipsel, llvm::Triple::msp430, llvm::Triple::systemz},
         llvm::Triple::Linux);
   }
 }
 
 std::vector<ArchSpec>
 PlatformLinux::GetSupportedArchitectures(const ArchSpec &process_host_arch) {
   if (m_remote_platform_sp)
     return m_remote_platform_sp->GetSupportedArchitectures(process_host_arch);

lldb/source/Plugins/Process/gdb-remote/GDBRemoteRegisterFallback.cpp

 #define REG(name, size)                                                        \
   DynamicRegisterInfo::Register {                                              \
     ConstString(#name), empty_alt_name, reg_set, size, LLDB_INVALID_INDEX32,   \
         lldb::eEncodingUint, lldb::eFormatHex, LLDB_INVALID_REGNUM,            \
         LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, {}, {}  \
   }
 #define R64(name) REG(name, 8)
 #define R32(name) REG(name, 4)
+#define R16(name) REG(name, 2)
 
 static std::vector<DynamicRegisterInfo::Register> GetRegisters_aarch64() {
   ConstString empty_alt_name;
   ConstString reg_set{"general purpose registers"};
 
   std::vector<DynamicRegisterInfo::Register> registers{
       R64(x0),  R64(x1),  R64(x2),  R64(x3),  R64(x4),  R64(x5),   R64(x6),
       R64(x7),  R64(x8),  R64(x9),  R64(x10), R64(x11), R64(x12),  R64(x13),
       R64(x14), R64(x15), R64(x16), R64(x17), R64(x18), R64(x19),  R64(x20),
       R64(x21), R64(x22), R64(x23), R64(x24), R64(x25), R64(x26),  R64(x27),
       R64(x28), R64(x29), R64(x30), R64(sp),  R64(pc),  R32(cpsr),
   };
 
   return registers;
 }
 
+static std::vector<DynamicRegisterInfo::Register> GetRegisters_msp430() {
+  ConstString empty_alt_name;
+  ConstString reg_set{"general purpose registers"};
+
+  std::vector<DynamicRegisterInfo::Register> registers{
+      R16(pc),  R16(sp),  R16(r2),  R16(r3), R16(fp),  R16(r5),
+      R16(r6),  R16(r7),  R16(r8),  R16(r9), R16(r10), R16(r11),
+      R16(r12), R16(r13), R16(r14), R16(r15)};
+
+  return registers;
+}
+
 static std::vector<DynamicRegisterInfo::Register> GetRegisters_x86() {
   ConstString empty_alt_name;
   ConstString reg_set{"general purpose registers"};
 
   std::vector<DynamicRegisterInfo::Register> registers{
       R32(eax), R32(ecx), R32(edx), R32(ebx),    R32(esp), R32(ebp),
       R32(esi), R32(edi), R32(eip), R32(eflags), R32(cs),  R32(ss),
       R32(ds),  R32(es),  R32(fs),  R32(gs),

 #undef R64
 #undef REG
 
 std::vector<DynamicRegisterInfo::Register>
 GetFallbackRegisters(const ArchSpec &arch_to_use) {
   switch (arch_to_use.GetMachine()) {
   case llvm::Triple::aarch64:
     return GetRegisters_aarch64();
+  case llvm::Triple::msp430:
+    return GetRegisters_msp430();
   case llvm::Triple::x86:
     return GetRegisters_x86();
   case llvm::Triple::x86_64:
     return GetRegisters_x86_64();
   default:
     break;
   }
 
   return {};
 }
 
 } // namespace process_gdb_remote
 } // namespace lldb_private

lldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.cpp

if (!abbr_entry) {
           llvm::inconvertibleErrorCode(),
           "DWARF package index missing abbreviation column");
     }
     header.m_abbr_offset = abbr_entry->getOffset();
   }
 
   bool length_OK = data.ValidOffset(header.GetNextUnitOffset() - 1);
   bool version_OK = SymbolFileDWARF::SupportedVersion(header.m_version);
-  bool addr_size_OK = (header.m_addr_size == 4) || (header.m_addr_size == 8);
+  bool addr_size_OK = (header.m_addr_size == 2) || (header.m_addr_size == 4) ||
+                      (header.m_addr_size == 8);
   bool type_offset_OK =
       !header.IsTypeUnit() || (header.m_type_offset <= header.GetLength());
 
   if (!length_OK)
     return llvm::make_error<llvm::object::GenericBinaryError>(
         "Invalid unit length");
   if (!version_OK)
     return llvm::make_error<llvm::object::GenericBinaryError>(

lldb/source/Target/Platform.cpp

size_t Platform::GetSoftwareBreakpointTrapOpcode(Target &target,
 
   case llvm::Triple::mipsel:
   case llvm::Triple::mips64el: {
     static const uint8_t g_hex_opcode[] = {0x0d, 0x00, 0x00, 0x00};
     trap_opcode = g_hex_opcode;
     trap_opcode_size = sizeof(g_hex_opcode);
   } break;
 
+  case llvm::Triple::msp430: {
+    static const uint8_t g_msp430_opcode[] = {0x43, 0x43};
+    trap_opcode = g_msp430_opcode;
+    trap_opcode_size = sizeof(g_msp430_opcode);
+  } break;
+
   case llvm::Triple::systemz: {
     static const uint8_t g_hex_opcode[] = {0x00, 0x01};
     trap_opcode = g_hex_opcode;
     trap_opcode_size = sizeof(g_hex_opcode);
   } break;
 
   case llvm::Triple::hexagon: {
     static const uint8_t g_hex_opcode[] = {0x0c, 0xdb, 0x00, 0x54};

lldb/source/Utility/ArchSpec.cpp

static const CoreDefinition g_core_definitions[] = {
      ArchSpec::eCore_mips64r2el, "mips64r2el"},
     {eByteOrderLittle, 8, 2, 4, llvm::Triple::mips64el,
      ArchSpec::eCore_mips64r3el, "mips64r3el"},
     {eByteOrderLittle, 8, 2, 4, llvm::Triple::mips64el,
      ArchSpec::eCore_mips64r5el, "mips64r5el"},
     {eByteOrderLittle, 8, 2, 4, llvm::Triple::mips64el,
      ArchSpec::eCore_mips64r6el, "mips64r6el"},
 
+    // MSP430
+    {eByteOrderLittle, 2, 2, 4, llvm::Triple::msp430, ArchSpec::eCore_msp430,
+     "msp430"},
+
     {eByteOrderBig, 4, 4, 4, llvm::Triple::ppc, ArchSpec::eCore_ppc_generic,
      "powerpc"},
     {eByteOrderBig, 4, 4, 4, llvm::Triple::ppc, ArchSpec::eCore_ppc_ppc601,
      "ppc601"},
     {eByteOrderBig, 4, 4, 4, llvm::Triple::ppc, ArchSpec::eCore_ppc_ppc602,
      "ppc602"},
     {eByteOrderBig, 4, 4, 4, llvm::Triple::ppc, ArchSpec::eCore_ppc_ppc603,
      "ppc603"},
static const ArchDefinitionEntry g_elf_arch_entries[] = {
     {ArchSpec::eCore_mips64r6, llvm::ELF::EM_MIPS,
      ArchSpec::eMIPSSubType_mips64r6, 0xFFFFFFFFu, 0xFFFFFFFFu}, // mips64r6
     {ArchSpec::eCore_mips64el, llvm::ELF::EM_MIPS,
      ArchSpec::eMIPSSubType_mips64el, 0xFFFFFFFFu, 0xFFFFFFFFu}, // mips64el
     {ArchSpec::eCore_mips64r2el, llvm::ELF::EM_MIPS,
      ArchSpec::eMIPSSubType_mips64r2el, 0xFFFFFFFFu, 0xFFFFFFFFu}, // mips64r2el
     {ArchSpec::eCore_mips64r6el, llvm::ELF::EM_MIPS,
      ArchSpec::eMIPSSubType_mips64r6el, 0xFFFFFFFFu, 0xFFFFFFFFu}, // mips64r6el
+    {ArchSpec::eCore_msp430, llvm::ELF::EM_MSP430, LLDB_INVALID_CPUTYPE,
+     0xFFFFFFFFu, 0xFFFFFFFFu}, // MSP430
     {ArchSpec::eCore_hexagon_generic, llvm::ELF::EM_HEXAGON,
      LLDB_INVALID_CPUTYPE, 0xFFFFFFFFu, 0xFFFFFFFFu}, // HEXAGON
     {ArchSpec::eCore_arc, llvm::ELF::EM_ARC_COMPACT2, LLDB_INVALID_CPUTYPE,
      0xFFFFFFFFu, 0xFFFFFFFFu}, // ARC
     {ArchSpec::eCore_avr, llvm::ELF::EM_AVR, LLDB_INVALID_CPUTYPE, 0xFFFFFFFFu,
      0xFFFFFFFFu}, // AVR
     {ArchSpec::eCore_riscv32, llvm::ELF::EM_RISCV,
      ArchSpec::eRISCVSubType_riscv32, 0xFFFFFFFFu, 0xFFFFFFFFu}, // riscv32
if (arch_def_entry) {
             m_triple.setOS(llvm::Triple::OSType::NetBSD);
             break;
           case llvm::ELF::ELFOSABI_OPENBSD:
             m_triple.setOS(llvm::Triple::OSType::OpenBSD);
             break;
           case llvm::ELF::ELFOSABI_SOLARIS:
             m_triple.setOS(llvm::Triple::OSType::Solaris);
             break;
+          case llvm::ELF::ELFOSABI_STANDALONE:
+            m_triple.setOS(llvm::Triple::OSType::UnknownOS);
+            break;
           }
         } else if (arch_type == eArchTypeCOFF && os == llvm::Triple::Win32) {
           m_triple.setVendor(llvm::Triple::PC);
           m_triple.setOS(llvm::Triple::Win32);
         } else {
           m_triple.setVendor(llvm::Triple::UnknownVendor);
           m_triple.setOS(llvm::Triple::UnknownOS);
         }

lldb/test/API/functionalities/gdb_remote_client/TestMSP430MSPDebug.py

+import lldb
+from lldbsuite.test.lldbtest import *
+from lldbsuite.test.decorators import *
+from lldbsuite.test.gdbclientutils import *
+from lldbsuite.test.lldbgdbclient import GDBRemoteTestBase
+
+# This test ensures that LLDB correctly handles packets sent by MSPDebug.
+# https://github.com/dlbeer/mspdebug
+
+class MyResponder(MockGDBServerResponder):
+    def qSupported(self, client_supported):
+        return "PacketSize=4000"
+
+    def setBreakpoint(self, packet):
+        return "OK"
+
+    def stopPackets():
+        # Registers 3 to 15 are empty
+        regs3to15 = "".join('%02x:%s;' % (i, "00000000") for i in range(3, 16))
+        yield "T0500:00050000;01:00000000;02:00000000;" + regs3to15
+        yield "T0500:10050000;01:baff0000;02:05000000;" + regs3to15
+        yield "T0500:16050000;01:baff0000;02:05000000;" + regs3to15
+
+    stopPacket = stopPackets()
+    def haltReason(self):
+        return next(self.stopPacket)
+
+    def cont(self):
+        return self.haltReason()
+
+    # Memory dump
+    def readMemory(self, addr, length):
+        # Program memory
+        if (addr == 0x0400):
+            return ("ff"*256) + "3140c0ff0c43b0121c05b01281010000b240d2043c051c423c0530413180020081430000b01210053150020030411c4330413c402a0030410c433041" + ("ff"*196)
+        # Stack contents
+        if (addr == 0xfe00):
+            return ("ff"*442) + "280500000a05" + ("ff"*62) + "0005"
+
+class TestMSP430MSPDebug(GDBRemoteTestBase):
+
+    @skipIfLLVMTargetMissing("MSP430")
+    def test(self):
+        """
+        Test LLDB's MSP430 functionality.
+        """
+        target = self.createTarget("msp430.yaml")
+        self.server.responder = MyResponder()
+
+        if self.TraceOn():
+            self.runCmd("log enable gdb-remote packets")
+            self.addTearDownHook(
+                lambda: self.runCmd("log disable gdb-remote packets"))
+
+        process = self.connect(target)
+        lldbutil.expect_state_changes(self, self.dbg.GetListener(), process,
+                                      [lldb.eStateStopped])
+        num_threads = len(process.threads)
+        self.assertEqual(num_threads, 1, "Only one thread")
+        thread = process.GetThreadAtIndex(0)
+
+        # Test if a breakpoint can be set
+        bp = target.BreakpointCreateByName("func")
+        self.assertTrue(bp.IsValid())
+        bp.SetEnabled(True)
+        self.assertTrue(bp.IsEnabled())
+
+        # Test if the breakpoint address is resolved correctly
+        self.assertEqual(bp.GetNumLocations(), 1, "Only one location")
+        bp_loc = bp.GetLocationAtIndex(0);
+        self.assertTrue(bp_loc.GetAddress().GetLoadAddress(target) == 0x510,
+            "Address of main")
+
+        # Test if the process stops at the breakpoint
+        process.Continue()
+        self.assertStopReason(thread.GetStopReason(), lldb.eStopReasonBreakpoint,
+            "Hit a breakpoint")
+
+        # Check if disassembler works and the current function is "func"
+        func = thread.GetFrameAtIndex(0).GetFunction()
+        insts = func.GetInstructions(target)
+        inst = insts.GetInstructionAtIndex(0)
+        self.assertEqual(inst.GetMnemonic(target), "mov")
+        self.assertEqual(inst.GetOperands(target), "#1234, &1340")
+
+        # Test if thread can step a single instruction
+        thread.StepInstruction(False)
+        self.assertTrue(thread.GetFrameAtIndex(0).GetPCAddress().GetLoadAddress(target) == 0x516,
+            "Address of the next instruction")
+
+        # Test if registers are being set correctly
+        registerSet = thread.GetFrameAtIndex(0).GetRegisters().GetValueAtIndex(0)
+        reg_val_dict = {
+             "pc": 0x0516,  "sp": 0xffba,  "r2": 0x0005,
+             "r3": 0x0000,  "fp": 0x0000,  "r5": 0x0000,
+             "r6": 0x0000,  "r7": 0x0000,  "r8": 0x0000,
+             "r9": 0x0000, "r10": 0x0000, "r11": 0x0000,
+            "r12": 0x0000, "r13": 0x0000, "r14": 0x0000,
+            "r15": 0x0000
+        }
+        for reg in registerSet:
+            self.assertEqual(reg.GetValueAsUnsigned(),
+                             reg_val_dict[reg.GetName()])
+
+        # Check if backtracing works:
+        self.assertTrue(len(thread.frames) >= 3)
+        crt0_addr = thread.GetFrameAtIndex(2).GetPCAddress().GetLoadAddress(target)
+        self.assertEqual(crt0_addr, 0x50a)
+
+

lldb/test/API/functionalities/gdb_remote_client/msp430.yaml

+# File test.c, compiled with flags "-O0 -g"
+# Source code:
+#
+# int foo = 0;
+#
+# int func() {
+#     foo = 1234;
+#     return foo;
+# }
+#
+# int main() {
+#     return func();
+# }
+#
+
+--- !ELF
+FileHeader:
+  Class:           ELFCLASS32
+  Data:            ELFDATA2LSB
+  OSABI:           ELFOSABI_STANDALONE
+  Type:            ET_EXEC
+  Machine:         EM_MSP430
+  Flags:           [  ]
+  Entry:           0x500
+ProgramHeaders:
+  - Type:            PT_LOAD
+    Flags:           [ PF_X, PF_R ]
+    FirstSec:        .text
+    LastSec:         .bss
+    VAddr:           0x46C
+    Align:           0x4
+  - Type:            PT_LOAD
+    Flags:           [ PF_W, PF_R ]
+    FirstSec:        .data
+    LastSec:         .bss
+    VAddr:           0x53C
+    Align:           0x4
+  - Type:            PT_LOAD
+    Flags:           [ PF_R ]
+    FirstSec:        __interrupt_vector_31
+    LastSec:         __interrupt_vector_31
+    VAddr:           0xFFFE
+    Align:           0x4
+Sections:
+  - Name:            .text
+    Type:            SHT_PROGBITS
+    Flags:           [ SHF_ALLOC, SHF_EXECINSTR ]
+    Address:         0x500
+    AddressAlign:    0x4
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lldb/unittests/Utility/ArchSpecTest.cpp

TEST(ArchSpecTest, TestSetTriple) {
   EXPECT_EQ(llvm::Triple::x86, AS.GetTriple().getArch());
   EXPECT_EQ(llvm::Triple::PC, AS.GetTriple().getVendor());
   EXPECT_EQ(llvm::Triple::Win32, AS.GetTriple().getOS());
   EXPECT_TRUE(
       llvm::StringRef(AS.GetTriple().str()).consume_front("i686-pc-windows"));
   EXPECT_STREQ("i686", AS.GetArchitectureName());
   EXPECT_EQ(ArchSpec::eCore_x86_32_i686, AS.GetCore());
 
+  AS = ArchSpec();
+  EXPECT_TRUE(AS.SetTriple("msp430---elf"));
+  EXPECT_EQ(llvm::Triple::msp430, AS.GetTriple().getArch());
+  EXPECT_STREQ("msp430", AS.GetArchitectureName());
+  EXPECT_EQ(ArchSpec::eCore_msp430, AS.GetCore());
+
   // Various flavors of invalid triples.
   AS = ArchSpec();
   EXPECT_FALSE(AS.SetTriple("unknown-unknown-unknown"));
 
   AS = ArchSpec();
   EXPECT_FALSE(AS.SetTriple("unknown"));
 
   AS = ArchSpec();