[LoongArch] Add an option for MCInstPrinter to print numeric reg names

[wangleiat]

Summary

-loongarch-numeric-reg for llvm-mc and llc.
-M numeric (which matches GNU objdump) for llvm-objdump and llvm-mc.

[xen0n]

Aren't all the register indexes less human-friendly to most? ;-)

llvm/test/MC/LoongArch/Misc/numeric-reg-names.s

32

One space before "CHECK" for all these lines.

[wangleiat]

llvm/test/MC/LoongArch/Misc/numeric-reg-names.s

32

Thanks.

[wangleiat]

Address @xen0n's comments.

[SixWeining]

llvm/test/MC/LoongArch/Misc/numeric-reg-names.s

1

f is enough :)

[wangleiat]

Address @SixWeining's comments and rebase.

llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchInstPrinter.h

 namespace llvm {
 
 class LoongArchInstPrinter : public MCInstPrinter {
 public:
   LoongArchInstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII,
                        const MCRegisterInfo &MRI)
       : MCInstPrinter(MAI, MII, MRI) {}
 
+  bool applyTargetSpecificCLOption(StringRef Opt) override;
+
   void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,
                  const MCSubtargetInfo &STI, raw_ostream &O) override;
   void printRegName(raw_ostream &O, unsigned RegNo) const override;
   void printAtomicMemOp(const MCInst *MI, unsigned OpNo,
                         const MCSubtargetInfo &STI, raw_ostream &O);
 
   // Autogenerated by tblgen.
   std::pair<const char *, uint64_t> getMnemonic(const MCInst *MI) override;

llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchInstPrinter.cpp

 //===- LoongArchInstPrinter.cpp - Convert LoongArch MCInst to asm syntax --===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 //
 // This class prints an LoongArch MCInst to a .s file.
 //
 //===----------------------------------------------------------------------===//
 
 #include "LoongArchInstPrinter.h"
 #include "LoongArchBaseInfo.h"
+#include "LoongArchMCTargetDesc.h"
 #include "llvm/MC/MCAsmInfo.h"
 #include "llvm/MC/MCInst.h"
 #include "llvm/MC/MCRegisterInfo.h"
 #include "llvm/MC/MCSubtargetInfo.h"
 #include "llvm/MC/MCSymbol.h"
+#include "llvm/Support/CommandLine.h"
 using namespace llvm;
 
 #define DEBUG_TYPE "loongarch-asm-printer"
 
 // Include the auto-generated portion of the assembly writer.
 #define PRINT_ALIAS_INSTR
 #include "LoongArchGenAsmWriter.inc"
 
+static cl::opt<bool>
+    NumericReg("loongarch-numeric-reg",
+               cl::desc("Print numeric register names rather than the ABI "
+                        "names (such as $r0 instead of $zero)"),
+               cl::init(false), cl::Hidden);
+
+// The command-line flag above is used by llvm-mc and llc. It can be used by
+// `llvm-objdump`, but we override the value here to handle options passed to
+// `llvm-objdump` with `-M` (which matches GNU objdump). There did not seem to
+// be an easier way to allow these options in all these tools, without doing it
+// this way.
+bool LoongArchInstPrinter::applyTargetSpecificCLOption(StringRef Opt) {
+  if (Opt == "numeric") {
+    NumericReg = true;
+    return true;
+  }
+
+  return false;
+}
+
 void LoongArchInstPrinter::printInst(const MCInst *MI, uint64_t Address,
                                      StringRef Annot,
                                      const MCSubtargetInfo &STI,
                                      raw_ostream &O) {
   if (!printAliasInstr(MI, Address, STI, O))
     printInstruction(MI, Address, STI, O);
   printAnnotation(O, Annot);
 }
void LoongArchInstPrinter::printAtomicMemOp(const MCInst *MI, unsigned OpNo,
                                             raw_ostream &O) {
   const MCOperand &MO = MI->getOperand(OpNo);
   assert(MO.isReg() && "printAtomicMemOp can only print register operands");
   printRegName(O, MO.getReg());
 }
 
 const char *LoongArchInstPrinter::getRegisterName(unsigned RegNo) {
   // Default print reg alias name
-  return getRegisterName(RegNo, LoongArch::RegAliasName);
+  return getRegisterName(RegNo, NumericReg ? LoongArch::NoRegAltName
+                                           : LoongArch::RegAliasName);
 }

llvm/test/CodeGen/LoongArch/numeric-reg-names.ll

+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc --mtriple=loongarch32 --loongarch-numeric-reg < %s \
+; RUN:   | FileCheck %s --check-prefix=LA32
+; RUN: llc --mtriple=loongarch64 --loongarch-numeric-reg < %s \
+; RUN:   | FileCheck %s --check-prefix=LA64
+
+@.str_1 = internal constant [7 x i8] c"hello\0A\00"
+
+declare i32 @printf(ptr, ...)
+
+define i32 @main() {
+; LA32-LABEL: main:
+; LA32:       # %bb.0:
+; LA32-NEXT:    addi.w $r3, $r3, -16
+; LA32-NEXT:    .cfi_def_cfa_offset 16
+; LA32-NEXT:    st.w $r1, $r3, 12 # 4-byte Folded Spill
+; LA32-NEXT:    .cfi_offset 1, -4
+; LA32-NEXT:    pcalau12i $r4, %pc_hi20(.str_1)
+; LA32-NEXT:    addi.w $r4, $r4, %pc_lo12(.str_1)
+; LA32-NEXT:    bl %plt(printf)
+; LA32-NEXT:    move $r4, $r0
+; LA32-NEXT:    ld.w $r1, $r3, 12 # 4-byte Folded Reload
+; LA32-NEXT:    addi.w $r3, $r3, 16
+; LA32-NEXT:    ret
+;
+; LA64-LABEL: main:
+; LA64:       # %bb.0:
+; LA64-NEXT:    addi.d $r3, $r3, -16
+; LA64-NEXT:    .cfi_def_cfa_offset 16
+; LA64-NEXT:    st.d $r1, $r3, 8 # 8-byte Folded Spill
+; LA64-NEXT:    .cfi_offset 1, -8
+; LA64-NEXT:    pcalau12i $r4, %pc_hi20(.str_1)
+; LA64-NEXT:    addi.d $r4, $r4, %pc_lo12(.str_1)
+; LA64-NEXT:    bl %plt(printf)
+; LA64-NEXT:    move $r4, $r0
+; LA64-NEXT:    ld.d $r1, $r3, 8 # 8-byte Folded Reload
+; LA64-NEXT:    addi.d $r3, $r3, 16
+; LA64-NEXT:    ret
+  %s = getelementptr [7 x i8], ptr @.str_1, i64 0, i64 0
+  call i32 (ptr, ...) @printf(ptr %s)
+  ret i32 0
+}

llvm/test/MC/LoongArch/Misc/numeric-reg-names.s

+# RUN: llvm-mc --triple=loongarch32 --mattr=+d --loongarch-numeric-reg %s \
+# RUN:     | FileCheck %s
+# RUN: llvm-mc --triple=loongarch32 --mattr=+d -M numeric %s \
+# RUN:     | FileCheck %s
+# RUN: llvm-mc --triple=loongarch32 --mattr=+d --filetype=obj %s -o %t.32
+# RUN: llvm-objdump -d -M numeric %t.32 | FileCheck %s
+# RUN: llvm-mc --triple=loongarch64 --mattr=+d --loongarch-numeric-reg %s \
+# RUN:     | FileCheck %s
+# RUN: llvm-mc --triple=loongarch64 --mattr=+d -M numeric %s \
+# RUN:     | FileCheck %s
+# RUN: llvm-mc --triple=loongarch64 --mattr=+d --filetype=obj %s -o %t.64
+# RUN: llvm-objdump -d -M numeric %t.64 | FileCheck %s
+
+addi.w $zero, $ra, 1
+addi.w $tp, $sp, 1
+addi.w $a0, $a1, 1
+addi.w $a2, $a3, 1
+addi.w $a4, $a5, 1
+addi.w $a6, $a7, 1
+addi.w $t0, $t1, 1
+addi.w $t2, $t3, 1
+addi.w $t4, $t5, 1
+addi.w $t6, $t7, 1
+addi.w $t8, $r21, 1
+addi.w $fp, $s0, 1
+addi.w $s1, $s2, 1
+addi.w $s3, $s4, 1
+addi.w $s5, $s6, 1
+addi.w $s7, $s8, 1
+
+# CHECK:      addi.w  $r0, $r1, 1
+# CHECK-NEXT: addi.w  $r2, $r3, 1
+# CHECK-NEXT: addi.w  $r4, $r5, 1
+# CHECK-NEXT: addi.w  $r6, $r7, 1
+# CHECK-NEXT: addi.w  $r8, $r9, 1
+# CHECK-NEXT: addi.w  $r10, $r11, 1
+# CHECK-NEXT: addi.w  $r12, $r13, 1
+# CHECK-NEXT: addi.w  $r14, $r15, 1
+# CHECK-NEXT: addi.w  $r16, $r17, 1
+# CHECK-NEXT: addi.w  $r18, $r19, 1
+# CHECK-NEXT: addi.w  $r20, $r21, 1
+# CHECK-NEXT: addi.w  $r22, $r23, 1
+# CHECK-NEXT: addi.w  $r24, $r25, 1
+# CHECK-NEXT: addi.w  $r26, $r27, 1
+# CHECK-NEXT: addi.w  $r28, $r29, 1
+# CHECK-NEXT: addi.w  $r30, $r31, 1
+
+fmadd.s $fa0, $fa1, $fa2, $fa3
+fmadd.s $fa4, $fa5, $fa6, $fa7
+fmadd.s $ft0, $ft1, $ft2, $ft3
+fmadd.s $ft4, $ft5, $ft6, $ft7
+fmadd.s $ft8, $ft9, $ft10, $ft11
+fmadd.s $ft12, $ft13, $ft14, $ft15
+fmadd.s $fs0, $fs1, $fs2, $fs3
+fmadd.s $fs4, $fs5, $fs6, $fs7
+
+# CHECK:      fmadd.s $f0, $f1, $f2, $f3
+# CHECK-NEXT: fmadd.s $f4, $f5, $f6, $f7
+# CHECK-NEXT: fmadd.s $f8, $f9, $f10, $f11
+# CHECK-NEXT: fmadd.s $f12, $f13, $f14, $f15
+# CHECK-NEXT: fmadd.s $f16, $f17, $f18, $f19
+# CHECK-NEXT: fmadd.s $f20, $f21, $f22, $f23
+# CHECK-NEXT: fmadd.s $f24, $f25, $f26, $f27
+# CHECK-NEXT: fmadd.s $f28, $f29, $f30, $f31