This is an archive of the discontinued LLVM Phabricator instance.

This was picked up by a MachineVerifier patch I'm working on. Since s_mulk_i32 is only formed by SIShrinkInstructions it is probably too late to affect codegen.

arsenm accepted this revision.Jan 9 2023, 7:24 AM

This revision is now accepted and ready to land.Jan 9 2023, 7:24 AM

This revision was landed with ongoing or failed builds.Jan 9 2023, 7:46 AM

Closed by commit rG6a6f62a719b9: [AMDGPU] S_MULK_I32 does not define SCC. NFCI. (authored by foad). · Explain Why

This revision was automatically updated to reflect the committed changes.

foad added a commit: rG6a6f62a719b9: [AMDGPU] S_MULK_I32 does not define SCC. NFCI..

Harbormaster completed remote builds in B206526: Diff 487416.Jan 9 2023, 8:14 AM

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llvm/

lib/

Target/

AMDGPU/

SOPInstructions.td

5 lines

Diff 487437

llvm/lib/Target/AMDGPU/SOPInstructions.td

	Show First 20 Lines • Show All 859 Lines • ▼ Show 20 Lines
	def S_CMPK_LG_U32 : SOPK_SCC <"s_cmpk_lg_u32", "s_cmp_lg_u32", 0>;			def S_CMPK_LG_U32 : SOPK_SCC <"s_cmpk_lg_u32", "s_cmp_lg_u32", 0>;
	def S_CMPK_GT_U32 : SOPK_SCC <"s_cmpk_gt_u32", "s_cmp_gt_u32", 0>;			def S_CMPK_GT_U32 : SOPK_SCC <"s_cmpk_gt_u32", "s_cmp_gt_u32", 0>;
	def S_CMPK_GE_U32 : SOPK_SCC <"s_cmpk_ge_u32", "s_cmp_ge_u32", 0>;			def S_CMPK_GE_U32 : SOPK_SCC <"s_cmpk_ge_u32", "s_cmp_ge_u32", 0>;
	def S_CMPK_LT_U32 : SOPK_SCC <"s_cmpk_lt_u32", "s_cmp_lt_u32", 0>;			def S_CMPK_LT_U32 : SOPK_SCC <"s_cmpk_lt_u32", "s_cmp_lt_u32", 0>;
	def S_CMPK_LE_U32 : SOPK_SCC <"s_cmpk_le_u32", "s_cmp_le_u32", 0>;			def S_CMPK_LE_U32 : SOPK_SCC <"s_cmpk_le_u32", "s_cmp_le_u32", 0>;
	} // End SOPKZext = 1			} // End SOPKZext = 1
	} // End isCompare = 1			} // End isCompare = 1

	let Defs = [SCC], isCommutable = 1, DisableEncoding = "$src0",			let isCommutable = 1, DisableEncoding = "$src0",
	Constraints = "$sdst = $src0" in {			Constraints = "$sdst = $src0" in {
				let Defs = [SCC] in
	def S_ADDK_I32 : SOPK_32TIE <"s_addk_i32">;			def S_ADDK_I32 : SOPK_32TIE <"s_addk_i32">;
	def S_MULK_I32 : SOPK_32TIE <"s_mulk_i32">;			def S_MULK_I32 : SOPK_32TIE <"s_mulk_i32">;
	}			}

	let SubtargetPredicate = isGFX6GFX7GFX8GFX9 in			let SubtargetPredicate = isGFX6GFX7GFX8GFX9 in
	def S_CBRANCH_I_FORK : SOPK_Pseudo <			def S_CBRANCH_I_FORK : SOPK_Pseudo <
	"s_cbranch_i_fork",			"s_cbranch_i_fork",
	(outs), (ins SReg_64:$sdst, sopp_brtarget:$simm16),			(outs), (ins SReg_64:$sdst, sopp_brtarget:$simm16),
	"$sdst, $simm16"			"$sdst, $simm16"
	▲ Show 20 Lines • Show All 1,480 Lines • Show Last 20 Lines

This is an archive of the discontinued LLVM Phabricator instance.

[AMDGPU] S_MULK_I32 does not define SCC. NFCI.ClosedPublic

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Diff 487437

llvm/lib/Target/AMDGPU/SOPInstructions.td

[AMDGPU] S_MULK_I32 does not define SCC. NFCI.
ClosedPublic