NVPTX: Cleanup check for denormal mode

[arsenm]

Summary

Go through the common query and be explicit about the supported flush
type.

[arsenm]

llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp

374

Looks broken for double to me but I don't know what the options are

[tra]

llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp

149–151

Huh. I wonder why are we using isHalfTy for figuring out denormal mode.

Considering that it seems to be FP32 that is the special case with an attribute of its own, it should've been IsSingleTy. Knowing whether it's fp16 or not only allows us to get correct mode for fp16, but not for the other types.

374

Indeed. I do not understand why getDenormalMode appears to single out fp32 as a special case.

[arsenm]

llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp

374

Because turn on f32 flush is the option the languages actually expose. denormal-fp-math-f32 acts as an override to denormal-fp-math

[tra]

llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp

374

OK, then the code is (and has been) broken for 'double'. I do not think we want to override denormals mode for doubles using denormal-fp-math-f32.
On the other hand, it's no more broken than it was before, so we can probably live with that until we figure out how to fix this.

https://llvm.org/docs/LangRef.html says:

" denormal-fp-math-f32" [...] Not all targets support separately setting the denormal mode per type, and no attempt is made to diagnose unsupported uses. Currently this attribute is respected by the AMDGPU and NVPTX backends.

On a side note, I wonder if the denormals handling mode may need to grow a similar override for fp16, which also has .ftz instruction variants.

[arsenm]

llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp

374

But do those imply a change in the default FP mode, or are they just operations that have flushing semantics in the default mode

[arsenm]

90f60a6a737b397c49c56371f628e4b6440c00fd

llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp

static Instruction *simplifyNvvmIntrinsic(IntrinsicInst *II, InstCombiner &IC) {
   struct SimplifyAction {
     // Invariant: At most one of these Optionals has a value.
     std::optional<Intrinsic::ID> IID;
     std::optional<Instruction::CastOps> CastOp;
     std::optional<Instruction::BinaryOps> BinaryOp;
     std::optional<SpecialCase> Special;
 
     FtzRequirementTy FtzRequirement = FTZ_Any;
     // Denormal handling is guarded by different attributes depending on the
     // type (denormal-fp-math vs denormal-fp-math-f32), take note of halfs.
     bool IsHalfTy = false;
 
     SimplifyAction() = default;
 
     SimplifyAction(Intrinsic::ID IID, FtzRequirementTy FtzReq,
                    bool IsHalfTy = false)
         : IID(IID), FtzRequirement(FtzReq), IsHalfTy(IsHalfTy) {}
 
     // Cast operations don't have anything to do with FTZ, so we skip that
const SimplifyAction Action = [II]() -> SimplifyAction {
     }
   }();
 
   // If Action.FtzRequirementTy is not satisfied by the module's ftz state, we
   // can bail out now.  (Notice that in the case that IID is not an NVVM
   // intrinsic, we don't have to look up any module metadata, as
   // FtzRequirementTy will be FTZ_Any.)
   if (Action.FtzRequirement != FTZ_Any) {
-    const char *AttrName =
-        Action.IsHalfTy ? "denormal-fp-math" : "denormal-fp-math-f32";
-    StringRef Attr =
-        II->getFunction()->getFnAttribute(AttrName).getValueAsString();
-    DenormalMode Mode = parseDenormalFPAttribute(Attr);
-    bool FtzEnabled = Mode.Output != DenormalMode::IEEE;
+    DenormalMode Mode = II->getFunction()->getDenormalMode(
+        Action.IsHalfTy ? APFloat::IEEEhalf() : APFloat::IEEEsingle());
+    bool FtzEnabled = Mode.Output == DenormalMode::PreserveSign;
 
     if (FtzEnabled != (Action.FtzRequirement == FTZ_MustBeOn))
       return nullptr;
   }
 
   // Simplify to target-generic intrinsic.
   if (Action.IID) {
     SmallVector<Value *, 4> Args(II->args());