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[mlir][bufferize] lower allocation alignment from 128 to 64 bytes
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Authored by cota on Dec 6 2022, 7:43 AM.

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Summary

While it is unlikely to matter in practice, there is no reason for this value to be larger than it should be. 64 bytes is the size of a cache line in most machines, and we can fit a full 512-bit vector in it.

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Event Timeline

cota created this revision.Dec 6 2022, 7:43 AM
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cota requested review of this revision.Dec 6 2022, 7:43 AM
Herald added a project: Restricted Project. · View Herald TranscriptDec 6 2022, 7:43 AM
cota edited the summary of this revision. (Show Details)Dec 6 2022, 7:55 AM
springerm accepted this revision.Dec 7 2022, 2:37 AM
This revision is now accepted and ready to land.Dec 7 2022, 2:37 AM