[AMDGPU] Change handling of s_endpgm's optional operand. NFC.

[foad]

Summary

s_endpgm is a special SOPP instruction in that its operand is optional
and if it is not present then we don't want to print a space after the
mnemonic.

Previously this was handled by defaulting real_name to the mnemonic with
a trailing space, and having s_endpgm override it to be the mnemonic
with no trailing space.

This patch implements a different approach where the separator between
Mnemonic and AsmOperands defaults to a space, but s_endpgm overrides it
to be the empty string.

[foad]

llvm/lib/Target/AMDGPU/SOPInstructions.td

1943–1944

@dp what do you think of this patch? Personally I like it because it simplifies all these SOPP_Real multiclasses, by removing all the machinery for passing around and overriding real_name. But I am open to other opinions.

[dp]

llvm/lib/Target/AMDGPU/SOPInstructions.td

1943–1944

Your patch is definitely an improvement.

After looking at the original code I noticed that SOP opcodes without operands have a space after mnemonic. I only checked s_endpgm_saved and s_set_gpr_idx_off but it looks like other opcodes w/o operands have a similar issue. Your patch seems to address this issue though it is not mentioned in the description.

Most definitions use SOPP_Pseudo with an operand starting from a space. Shouldn't SOPP_Pseudo add a space automatically? This looks feasible; endpgm case may be handled by a subclass of SOPP_Pseudo.

[foad]

llvm/lib/Target/AMDGPU/SOPInstructions.td

1943–1944

I only checked endpgm because there is a special strict-whitespace test for it: test/MC/AMDGPU/s_endpgm.s

[foad]

Change approach based on @dp's comments.

[dp]

LGTM.

llvm/lib/Target/AMDGPU/SOPInstructions.td

 }
 
 //===----------------------------------------------------------------------===//
 // SOP1 Instructions
 //===----------------------------------------------------------------------===//
 
 class SOP1_Pseudo <string opName, dag outs, dag ins,
                    string asmOps, list<dag> pattern=[]> :
-  SOP_Pseudo<opName, outs, ins, asmOps, pattern> {
+  SOP_Pseudo<opName, outs, ins, " " # asmOps, pattern> {
 
   let mayLoad = 0;
   let mayStore = 0;
   let hasSideEffects = 0;
   let SALU = 1;
   let SOP1 = 1;
   let SchedRW = [WriteSALU];
   let Size = 4;
   let UseNamedOperandTable = 1;
 
   bits<1> has_src0 = 1;
   bits<1> has_sdst = 1;
 }
 
 class SOP1_Real<bits<8> op, SOP1_Pseudo ps, string real_name = ps.Mnemonic> :
   InstSI <ps.OutOperandList, ps.InOperandList,
-          real_name # " " # ps.AsmOperands, []>,
+          real_name # ps.AsmOperands>,
   Enc32 {
 
   let SALU = 1;
   let SOP1 = 1;
   let isPseudo = 0;
   let isCodeGenOnly = 0;
   let Size = 4;
 

 } // End SubtargetPredicate = isGFX11Plus
 
 //===----------------------------------------------------------------------===//
 // SOP2 Instructions
 //===----------------------------------------------------------------------===//
 
 class SOP2_Pseudo<string opName, dag outs, dag ins,
                   string asmOps, list<dag> pattern=[]> :
-  SOP_Pseudo<opName, outs, ins, asmOps, pattern> {
+  SOP_Pseudo<opName, outs, ins, " " # asmOps, pattern> {
 
   let mayLoad = 0;
   let mayStore = 0;
   let hasSideEffects = 0;
   let SALU = 1;
   let SOP2 = 1;
   let SchedRW = [WriteSALU];
   let UseNamedOperandTable = 1;
 
   let has_sdst = 1;
 
   // Pseudo instructions have no encodings, but adding this field here allows
   // us to do:
   // let sdst = xxx in {
   // for multiclasses that include both real and pseudo instructions.
   // field bits<7> sdst = 0;
   // let Size = 4; // Do we need size here?
 }
 
 class SOP2_Real<bits<7> op, SOP_Pseudo ps, string real_name = ps.Mnemonic> :
   InstSI <ps.OutOperandList, ps.InOperandList,
-          real_name # " " # ps.AsmOperands, []>,
+          real_name # ps.AsmOperands>,
   Enc32 {
   let SALU = 1;
   let SOP2 = 1;
   let isPseudo = 0;
   let isCodeGenOnly = 0;
 
   // copy relevant pseudo op flags
   let SubtargetPredicate   = ps.SubtargetPredicate;
class SOPK_Pseudo <string opName, dag outs, dag ins,
   let mayStore = 0;
   let hasSideEffects = 0;
   let SALU = 1;
   let SOPK = 1;
   let FixedSize = 1;
   let SchedRW = [WriteSALU];
   let UseNamedOperandTable = 1;
   string Mnemonic = opName;
-  string AsmOperands = asmOps;
+  string AsmOperands = " " # asmOps;
 
   bits<1> has_sdst = 1;
 }
 
 class SOPK_Real<SOPK_Pseudo ps> :
   InstSI <ps.OutOperandList, ps.InOperandList,
-          ps.Mnemonic # " " # ps.AsmOperands, []> {
+          ps.Mnemonic # ps.AsmOperands> {
   let SALU = 1;
   let SOPK = 1;
   let isPseudo = 0;
   let isCodeGenOnly = 0;
   let UseNamedOperandTable = 1;
 
   // copy relevant pseudo op flags
   let SubtargetPredicate = ps.SubtargetPredicate;

 }
 
 class SOPK_SCC <string opName, string base_op, bit isSignExt> : SOPK_Pseudo <
   opName,
   (outs),
   !if(isSignExt,
       (ins SReg_32:$sdst, s16imm:$simm16),
       (ins SReg_32:$sdst, u16imm:$simm16)),
-  "$sdst, $simm16", []>,
+  "$sdst, $simm16">,
   SOPKInstTable<1, base_op>{
   let Defs = [SCC];
 }
 
 class SOPK_32TIE <string opName, list<dag> pattern=[]> : SOPK_Pseudo <
   opName,
   (outs SReg_32:$sdst),
   (ins SReg_32:$src0, s16imm:$simm16),

 } // End SubtargetPredicate = isGFX10Plus
 
 //===----------------------------------------------------------------------===//
 // SOPC Instructions
 //===----------------------------------------------------------------------===//
 
 class SOPC_Pseudo<string opName, dag outs, dag ins,
                   string asmOps, list<dag> pattern=[]> :
-  SOP_Pseudo<opName, outs, ins, asmOps, pattern> {
+  SOP_Pseudo<opName, outs, ins, " " # asmOps, pattern> {
   let mayLoad = 0;
   let mayStore = 0;
   let hasSideEffects = 0;
   let SALU = 1;
   let SOPC = 1;
   let Defs = [SCC];
   let SchedRW = [WriteSALU];
   let UseNamedOperandTable = 1;
 }
 
-class SOPC_Real<bits<7> op, SOPC_Pseudo ps, string real_name = ps.Mnemonic> :
+class SOPC_Real<bits<7> op, SOPC_Pseudo ps> :
   InstSI <ps.OutOperandList, ps.InOperandList,
-          real_name # " " # ps.AsmOperands, []>,
+          ps.Mnemonic # ps.AsmOperands>,
   Enc32 {
   let SALU = 1;
   let SOPC = 1;
   let isPseudo = 0;
   let isCodeGenOnly = 0;
 
   // copy relevant pseudo op flags
   let SubtargetPredicate   = ps.SubtargetPredicate;

 }
 }
 
 //===----------------------------------------------------------------------===//
 // SOPP Instructions
 //===----------------------------------------------------------------------===//
 
 class SOPP_Pseudo<string opName, dag ins,
-                  string asmOps = "", list<dag> pattern=[], string keyName = opName> :
-  SOP_Pseudo<opName, (outs), ins, asmOps, pattern> {
+                  string asmOps = "", list<dag> pattern=[],
+                  string sep = !if(!empty(asmOps), "", " "),
+                  string keyName = opName> :
+  SOP_Pseudo<opName, (outs), ins, sep # asmOps, pattern> {
   let isPseudo = 1;
   let isCodeGenOnly = 1;
   let mayLoad = 0;
   let mayStore = 0;
   let hasSideEffects = 0;
   let SALU = 1;
   let SOPP = 1;
   let FixedSize = 1;
   let SchedRW = [WriteSALU];
   let UseNamedOperandTable = 1;
   bits <16> simm16;
   bits <1> fixed_imm = 0;
   string KeyName = keyName;
 }
 
 class SOPPRelaxTable <bit isRelaxed, string keyName, string gfxip> {
   bit IsRelaxed = isRelaxed;
   string KeyName = keyName # gfxip;
 }
 
-//spaces inserted in realname on instantiation of this record to allow s_endpgm to omit whitespace
 class SOPP_Real<SOPP_Pseudo ps, string real_name = ps.Mnemonic> :
   InstSI <ps.OutOperandList, ps.InOperandList,
-          real_name # ps.AsmOperands, []> {
+          real_name # ps.AsmOperands> {
   let SALU = 1;
   let SOPP = 1;
   let isPseudo = 0;
   let isCodeGenOnly = 0;
 
   // copy relevant pseudo op flags
   let SubtargetPredicate   = ps.SubtargetPredicate;
   let OtherPredicates      = ps.OtherPredicates;
Enc64 {
   let Inst{47-32} = 0x0;
   let Inst{54-48} = 0x0;
   let Inst{63-55} = 0x17f;
 }
 
 multiclass SOPP_With_Relaxation <string opName, dag ins,
                   string asmOps, list<dag> pattern=[]> {
   def "" : SOPP_Pseudo <opName, ins, asmOps, pattern>;
-  def _pad_s_nop : SOPP_Pseudo <opName # "_pad_s_nop", ins, asmOps, pattern, opName>;
+  def _pad_s_nop : SOPP_Pseudo <opName # "_pad_s_nop", ins, asmOps, pattern, " ", opName>;
 }
 
 def S_NOP : SOPP_Pseudo<"s_nop" , (ins i16imm:$simm16), "$simm16">;
 
 let isTerminator = 1 in {
-def S_ENDPGM : SOPP_Pseudo<"s_endpgm", (ins EndpgmImm:$simm16), "$simm16"> {
+def S_ENDPGM : SOPP_Pseudo<"s_endpgm", (ins EndpgmImm:$simm16), "$simm16", [], ""> {
   let isBarrier = 1;
   let isReturn = 1;
   let hasSideEffects = 1;
 }
 
 def S_ENDPGM_SAVED : SOPP_Pseudo<"s_endpgm_saved", (ins)> {
   let SubtargetPredicate = isGFX8Plus;
   let simm16 = 0;

 }
 
 let SubtargetPredicate = isGFX10Plus in {
   def S_INST_PREFETCH :
     SOPP_Pseudo<"s_inst_prefetch", (ins s16imm:$simm16), "$simm16">;
   def S_CLAUSE :
     SOPP_Pseudo<"s_clause", (ins s16imm:$simm16), "$simm16">;
   def S_WAIT_IDLE :
-    SOPP_Pseudo <"s_wait_idle", (ins), ""> {
+    SOPP_Pseudo <"s_wait_idle", (ins)> {
       let simm16 = 0;
       let fixed_imm = 1;
     }
   def S_WAITCNT_DEPCTR :
     SOPP_Pseudo <"s_waitcnt_depctr" , (ins DepCtrImm:$simm16), "$simm16">;
 
   let hasSideEffects = 0, Uses = [MODE], Defs = [MODE] in {
     def S_ROUND_MODE :

 defm S_GETREG_B32       : SOPK_Real32_gfx6_gfx7_gfx10<0x012>;
 defm S_SETREG_B32       : SOPK_Real32_gfx6_gfx7_gfx10<0x013>;
 defm S_SETREG_IMM32_B32 : SOPK_Real64_gfx6_gfx7_gfx10<0x015>;
 
 //===----------------------------------------------------------------------===//
 // SOPP - GFX11
 //===----------------------------------------------------------------------===//
 
-multiclass SOPP_Real_32_gfx11<bits<7> op, string real_name = !cast<SOPP_Pseudo>(NAME).Mnemonic # " "> {
-  def _gfx11 : SOPP_Real_32<op, !cast<SOPP_Pseudo>(NAME), real_name>,
+multiclass SOPP_Real_32_gfx11<bits<7> op> {
+  def _gfx11 : SOPP_Real_32<op, !cast<SOPP_Pseudo>(NAME), !cast<SOPP_Pseudo>(NAME).Mnemonic>,
                Select_gfx11<!cast<SOPP_Pseudo>(NAME).Mnemonic>,
                SOPPRelaxTable<0, !cast<SOPP_Pseudo>(NAME).KeyName, "_gfx11">;
 }
 
-multiclass SOPP_Real_64_gfx11<bits<7> op, string real_name = !cast<SOPP_Pseudo>(NAME).Mnemonic # " "> {
-  def _gfx11 : SOPP_Real_64<op, !cast<SOPP_Pseudo>(NAME), real_name>,
+multiclass SOPP_Real_64_gfx11<bits<7> op> {
+  def _gfx11 : SOPP_Real_64<op, !cast<SOPP_Pseudo>(NAME), !cast<SOPP_Pseudo>(NAME).Mnemonic>,
                Select_gfx11<!cast<SOPP_Pseudo>(NAME).Mnemonic>,
                SOPPRelaxTable<1, !cast<SOPP_Pseudo>(NAME).KeyName, "_gfx11">;
 }
 
 multiclass SOPP_Real_32_Renamed_gfx11<bits<7> op, SOPP_Pseudo backing_pseudo, string real_name> {
-  def _gfx11 : SOPP_Real_32<op, backing_pseudo, real_name # " ">,
+  def _gfx11 : SOPP_Real_32<op, backing_pseudo, real_name>,
                Select_gfx11<backing_pseudo.Mnemonic>,
                MnemonicAlias<backing_pseudo.Mnemonic, real_name>, Requires<[isGFX11Plus]>;
 }
 
 multiclass SOPP_Real_With_Relaxation_gfx11<bits<7> op> {
   defm "" : SOPP_Real_32_gfx11<op>;
   defm _pad_s_nop : SOPP_Real_64_gfx11<op>;
 }

 defm S_CBRANCH_VCCZ               : SOPP_Real_With_Relaxation_gfx11<0x023>;
 defm S_CBRANCH_VCCNZ              : SOPP_Real_With_Relaxation_gfx11<0x024>;
 defm S_CBRANCH_EXECZ              : SOPP_Real_With_Relaxation_gfx11<0x025>;
 defm S_CBRANCH_EXECNZ             : SOPP_Real_With_Relaxation_gfx11<0x026>;
 defm S_CBRANCH_CDBGSYS            : SOPP_Real_With_Relaxation_gfx11<0x027>;
 defm S_CBRANCH_CDBGUSER           : SOPP_Real_With_Relaxation_gfx11<0x028>;
 defm S_CBRANCH_CDBGSYS_OR_USER    : SOPP_Real_With_Relaxation_gfx11<0x029>;
 defm S_CBRANCH_CDBGSYS_AND_USER   : SOPP_Real_With_Relaxation_gfx11<0x02a>;
-defm S_ENDPGM                     : SOPP_Real_32_gfx11<0x030, "s_endpgm">;
+defm S_ENDPGM                     : SOPP_Real_32_gfx11<0x030>;
 defm S_ENDPGM_SAVED               : SOPP_Real_32_gfx11<0x031>;
 defm S_WAKEUP                     : SOPP_Real_32_gfx11<0x034>;
 defm S_SETPRIO                    : SOPP_Real_32_gfx11<0x035>;
 defm S_SENDMSG                    : SOPP_Real_32_gfx11<0x036>;
 defm S_SENDMSGHALT                : SOPP_Real_32_gfx11<0x037>;
 defm S_INCPERFLEVEL               : SOPP_Real_32_gfx11<0x038>;
 defm S_DECPERFLEVEL               : SOPP_Real_32_gfx11<0x039>;
 defm S_TTRACEDATA                 : SOPP_Real_32_gfx11<0x03a>;
 defm S_TTRACEDATA_IMM             : SOPP_Real_32_gfx11<0x03b>;
 defm S_ICACHE_INV                 : SOPP_Real_32_gfx11<0x03c>;
 defm S_BARRIER                    : SOPP_Real_32_gfx11<0x03d>;
 
 //===----------------------------------------------------------------------===//
 // SOPP - GFX6, GFX7, GFX8, GFX9, GFX10
 //===----------------------------------------------------------------------===//
 
-multiclass SOPP_Real_32_gfx6_gfx7<bits<7> op, string real_name = !cast<SOPP_Pseudo>(NAME).Mnemonic> {
+multiclass SOPP_Real_32_gfx6_gfx7<bits<7> op> {
   defvar ps = !cast<SOPP_Pseudo>(NAME);
-  def _gfx6_gfx7 : SOPP_Real_32<op, ps, real_name>,
+  def _gfx6_gfx7 : SOPP_Real_32<op, ps, !cast<SOPP_Pseudo>(NAME).Mnemonic>,
                    Select_gfx6_gfx7<ps.Mnemonic>,
                    SOPPRelaxTable<0, ps.KeyName, "_gfx6_gfx7">;
 }
 
-multiclass SOPP_Real_32_gfx8_gfx9<bits<7> op, string real_name = !cast<SOPP_Pseudo>(NAME).Mnemonic # " "> {
+multiclass SOPP_Real_32_gfx8_gfx9<bits<7> op> {
   defvar ps = !cast<SOPP_Pseudo>(NAME);
-  def _vi : SOPP_Real_32<op, ps, real_name>,
+  def _vi : SOPP_Real_32<op, ps>,
             Select_vi<ps.Mnemonic>,
             SOPPRelaxTable<0, ps.KeyName, "_vi">;
 }
 
-multiclass SOPP_Real_32_gfx10<bits<7> op, string real_name = !cast<SOPP_Pseudo>(NAME).Mnemonic # " "> {
+multiclass SOPP_Real_32_gfx10<bits<7> op> {
   defvar ps = !cast<SOPP_Pseudo>(NAME);
-  def _gfx10 : SOPP_Real_32<op, ps, real_name>,
+  def _gfx10 : SOPP_Real_32<op, ps>,
                Select_gfx10<ps.Mnemonic>,
                SOPPRelaxTable<0, ps.KeyName, "_gfx10">;
 }
 
-multiclass SOPP_Real_32_gfx8_gfx9_gfx10<bits<7> op, string real_name = !cast<SOPP_Pseudo>(NAME).Mnemonic # " "> :
-  SOPP_Real_32_gfx8_gfx9<op, real_name>, SOPP_Real_32_gfx10<op, real_name>;
+multiclass SOPP_Real_32_gfx8_gfx9_gfx10<bits<7> op> :
+  SOPP_Real_32_gfx8_gfx9<op>, SOPP_Real_32_gfx10<op>;
 
-multiclass SOPP_Real_32_gfx6_gfx7_gfx8_gfx9<bits<7> op, string real_name = !cast<SOPP_Pseudo>(NAME).Mnemonic # " "> :
-  SOPP_Real_32_gfx6_gfx7<op, real_name>, SOPP_Real_32_gfx8_gfx9<op, real_name>;
+multiclass SOPP_Real_32_gfx6_gfx7_gfx8_gfx9<bits<7> op> :
+  SOPP_Real_32_gfx6_gfx7<op>, SOPP_Real_32_gfx8_gfx9<op>;
 
-multiclass SOPP_Real_32_gfx6_gfx7_gfx8_gfx9_gfx10<bits<7> op, string real_name = !cast<SOPP_Pseudo>(NAME).Mnemonic # " "> :
-  SOPP_Real_32_gfx6_gfx7_gfx8_gfx9<op, real_name>, SOPP_Real_32_gfx10<op, real_name>;
+multiclass SOPP_Real_32_gfx6_gfx7_gfx8_gfx9_gfx10<bits<7> op> :
+  SOPP_Real_32_gfx6_gfx7_gfx8_gfx9<op>, SOPP_Real_32_gfx10<op>;
 
-multiclass SOPP_Real_32_gfx6_gfx7_gfx8_gfx9_gfx10_gfx11<bits<7> op, string real_name = !cast<SOPP_Pseudo>(NAME).Mnemonic # " "> :
-  SOPP_Real_32_gfx6_gfx7_gfx8_gfx9_gfx10<op, real_name>, SOPP_Real_32_gfx11<op, real_name>;
+multiclass SOPP_Real_32_gfx6_gfx7_gfx8_gfx9_gfx10_gfx11<bits<7> op> :
+  SOPP_Real_32_gfx6_gfx7_gfx8_gfx9_gfx10<op>, SOPP_Real_32_gfx11<op>;
 
-multiclass SOPP_Real_32_gfx10_gfx11<bits<7> op, string real_name = !cast<SOPP_Pseudo>(NAME).Mnemonic # " "> :
-  SOPP_Real_32_gfx10<op, real_name>, SOPP_Real_32_gfx11<op, real_name>;
+multiclass SOPP_Real_32_gfx10_gfx11<bits<7> op> :
+  SOPP_Real_32_gfx10<op>, SOPP_Real_32_gfx11<op>;
 
 //64 bit encodings, for Relaxation
-multiclass SOPP_Real_64_gfx6_gfx7<bits<7> op, string real_name = !cast<SOPP_Pseudo>(NAME).Mnemonic # " "> {
+multiclass SOPP_Real_64_gfx6_gfx7<bits<7> op> {
   defvar ps = !cast<SOPP_Pseudo>(NAME);
-  def _gfx6_gfx7 : SOPP_Real_64<op, ps, real_name>,
+  def _gfx6_gfx7 : SOPP_Real_64<op, ps>,
                    Select_gfx6_gfx7<ps.Mnemonic>,
                    SOPPRelaxTable<1, ps.KeyName, "_gfx6_gfx7">;
 }
 
-multiclass SOPP_Real_64_gfx8_gfx9<bits<7> op, string real_name = !cast<SOPP_Pseudo>(NAME).Mnemonic # " "> {
+multiclass SOPP_Real_64_gfx8_gfx9<bits<7> op> {
   defvar ps = !cast<SOPP_Pseudo>(NAME);
-  def _vi : SOPP_Real_64<op, ps, real_name>,
+  def _vi : SOPP_Real_64<op, ps>,
             Select_vi<ps.Mnemonic>,
             SOPPRelaxTable<1, ps.KeyName, "_vi">;
 }
 
-multiclass SOPP_Real_64_gfx10<bits<7> op, string real_name = !cast<SOPP_Pseudo>(NAME).Mnemonic # " "> {
+multiclass SOPP_Real_64_gfx10<bits<7> op> {
   defvar ps = !cast<SOPP_Pseudo>(NAME);
-  def _gfx10 : SOPP_Real_64<op, ps, real_name>,
+  def _gfx10 : SOPP_Real_64<op, ps>,
                Select_gfx10<ps.Mnemonic>,
                SOPPRelaxTable<1, ps.KeyName, "_gfx10">;
 }
 
-multiclass SOPP_Real_64_gfx8_gfx9_gfx10<bits<7> op, string real_name = !cast<SOPP_Pseudo>(NAME).Mnemonic # " "> :
-  SOPP_Real_64_gfx8_gfx9<op, real_name>, SOPP_Real_64_gfx10<op, real_name>;
+multiclass SOPP_Real_64_gfx8_gfx9_gfx10<bits<7> op> :
+  SOPP_Real_64_gfx8_gfx9<op>, SOPP_Real_64_gfx10<op>;
 
-multiclass SOPP_Real_64_gfx6_gfx7_gfx8_gfx9<bits<7> op, string real_name = !cast<SOPP_Pseudo>(NAME).Mnemonic # " "> :
-  SOPP_Real_64_gfx6_gfx7<op, real_name>, SOPP_Real_64_gfx8_gfx9<op, real_name>;
+multiclass SOPP_Real_64_gfx6_gfx7_gfx8_gfx9<bits<7> op> :
+  SOPP_Real_64_gfx6_gfx7<op>, SOPP_Real_64_gfx8_gfx9<op>;
 
-multiclass SOPP_Real_64_gfx6_gfx7_gfx8_gfx9_gfx10<bits<7> op, string real_name = !cast<SOPP_Pseudo>(NAME).Mnemonic # " "> :
-  SOPP_Real_64_gfx6_gfx7_gfx8_gfx9<op, real_name>, SOPP_Real_64_gfx10<op, real_name>;
+multiclass SOPP_Real_64_gfx6_gfx7_gfx8_gfx9_gfx10<bits<7> op> :
+  SOPP_Real_64_gfx6_gfx7_gfx8_gfx9<op>, SOPP_Real_64_gfx10<op>;
 
-multiclass SOPP_Real_64_gfx6_gfx7_gfx8_gfx9_gfx10_gfx11<bits<7> op, string real_name = !cast<SOPP_Pseudo>(NAME).Mnemonic # " "> :
-  SOPP_Real_64_gfx6_gfx7_gfx8_gfx9_gfx10<op, real_name>, SOPP_Real_64_gfx11<op, real_name>;
+multiclass SOPP_Real_64_gfx6_gfx7_gfx8_gfx9_gfx10_gfx11<bits<7> op> :
+  SOPP_Real_64_gfx6_gfx7_gfx8_gfx9_gfx10<op>, SOPP_Real_64_gfx11<op>;
 
 //relaxation for insts with no operands not implemented
 multiclass SOPP_Real_With_Relaxation_gfx6_gfx7_gfx8_gfx9_gfx10<bits<7> op> {
   defm "" : SOPP_Real_32_gfx6_gfx7_gfx8_gfx9_gfx10<op>;
   defm _pad_s_nop : SOPP_Real_64_gfx6_gfx7_gfx8_gfx9_gfx10<op>;
 }
 
 defm S_NOP                      : SOPP_Real_32_gfx6_gfx7_gfx8_gfx9_gfx10_gfx11<0x000>;
-defm S_ENDPGM                   : SOPP_Real_32_gfx6_gfx7_gfx8_gfx9_gfx10<0x001, "s_endpgm">;
+defm S_ENDPGM                   : SOPP_Real_32_gfx6_gfx7_gfx8_gfx9_gfx10<0x001>;
 defm S_WAKEUP                   : SOPP_Real_32_gfx8_gfx9_gfx10<0x003>;
 defm S_BARRIER                  : SOPP_Real_32_gfx6_gfx7_gfx8_gfx9_gfx10<0x00a>;
 defm S_WAITCNT                  : SOPP_Real_32_gfx6_gfx7_gfx8_gfx9_gfx10<0x00c>;
 defm S_SETHALT                  : SOPP_Real_32_gfx6_gfx7_gfx8_gfx9_gfx10<0x00d>;
 defm S_SETKILL                  : SOPP_Real_32_gfx6_gfx7_gfx8_gfx9_gfx10<0x00b>;
 defm S_SLEEP                    : SOPP_Real_32_gfx6_gfx7_gfx8_gfx9_gfx10<0x00e>;
 defm S_SETPRIO                  : SOPP_Real_32_gfx6_gfx7_gfx8_gfx9_gfx10<0x00f>;
 defm S_SENDMSG                  : SOPP_Real_32_gfx6_gfx7_gfx8_gfx9_gfx10<0x010>;