[AMDGPU][NFC] Remove isLegalVOP3PShuffleMask

[Pierre-vh]

Summary

Unused function since D134967

llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.h

 
 namespace AMDGPU {
 
 /// Returns base register and constant offset.
 std::pair<Register, unsigned>
 getBaseWithConstantOffset(MachineRegisterInfo &MRI, Register Reg,
                           GISelKnownBits *KnownBits = nullptr);
 
-bool isLegalVOP3PShuffleMask(ArrayRef<int> Mask);
 bool hasAtomicFaddRtnForTy(const GCNSubtarget &Subtarget, const LLT &Ty);
 }
 }
 
 #endif

llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.cpp

if (mi_match(Def->getOperand(1).getReg(), MRI,
       // Register returned here will be of pointer type.
       return std::make_pair(Base->getOperand(0).getReg(), Offset);
     }
   }
 
   return std::make_pair(Reg, 0);
 }
 
-bool AMDGPU::isLegalVOP3PShuffleMask(ArrayRef<int> Mask) {
-  assert(Mask.size() == 2);
-
-  // If one half is undef, the other is trivially in the same reg.
-  if (Mask[0] == -1 || Mask[1] == -1)
-    return true;
-  return (Mask[0] & 2) == (Mask[1] & 2);
-}
-
 bool AMDGPU::hasAtomicFaddRtnForTy(const GCNSubtarget &Subtarget,
                                    const LLT &Ty) {
   if (Ty == LLT::scalar(32))
     return Subtarget.hasAtomicFaddRtnInsts();
   if (Ty == LLT::fixed_vector(2, 16) || Ty == LLT::scalar(64))
     return Subtarget.hasGFX90AInsts();
   return false;
 }