[AMDGPU] Stop looking for implicit M0 uses on MOV instructions

[foad]

Summary

Before D114230, indirect moves used regular MOV opcodes and were
identified by having an implicit use of M0. Since D114230 they use
dedicated opcodes instead, so remove some old code that checks for
implicit uses of M0. NFCI.

llvm/lib/Target/AMDGPU/SIFoldOperands.cpp

if (!OpToFold->isReg() && !TII->isInlineConstant(*OpToFold, OpInfo)) {
       }
     }
   }
 
   appendFoldCandidate(FoldList, MI, OpNo, OpToFold);
   return true;
 }
 
-// If the use operand doesn't care about the value, this may be an operand only
-// used for register indexing, in which case it is unsafe to fold.
 bool SIFoldOperands::isUseSafeToFold(const MachineInstr &MI,
                                      const MachineOperand &UseMO) const {
-  if (UseMO.isUndef() || TII->isSDWA(MI))
-    return false;
-
-  switch (MI.getOpcode()) {
-  case AMDGPU::V_MOV_B32_e32:
-  case AMDGPU::V_MOV_B32_e64:
-  case AMDGPU::V_MOV_B64_PSEUDO:
-  case AMDGPU::V_MOV_B64_e32:
-  case AMDGPU::V_MOV_B64_e64:
-    // Do not fold into an indirect mov.
-    return !MI.hasRegisterImplicitUseOperand(AMDGPU::M0);
-  }
-
-  return true;
+  // Operands of SDWA instructions must be registers.
+  return !TII->isSDWA(MI);
 }
 
 // Find a def of the UseReg, check if it is a reg_sequence and find initializers
 // for each subreg, tracking it to foldable inline immediate if possible.
 // Returns true on success.
 bool SIFoldOperands::getRegSeqInit(
     SmallVectorImpl<std::pair<MachineOperand *, unsigned>> &Defs,
     Register UseReg, uint8_t OpTy) const {

llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp

MachineInstr *SIShrinkInstructions::matchSwap(MachineInstr &MovT) const {
   Register X = Xop.getReg();
   unsigned Xsub = Xop.getSubReg();
 
   unsigned Size = TII->getOpSize(MovT, 0) / 4;
 
   if (!TRI->isVGPR(*MRI, X))
     return nullptr;
 
-  if (MovT.hasRegisterImplicitUseOperand(AMDGPU::M0))
-    return nullptr;
-
   const unsigned SearchLimit = 16;
   unsigned Count = 0;
   bool KilledT = false;
   for (auto Iter = std::next(MovT.getIterator()),
             E = MovT.getParent()->instr_end();
        Iter != E && Count < SearchLimit && !KilledT; ++Iter, ++Count) {
 
     MachineInstr *MovY = &*Iter;
     KilledT = MovY->killsRegister(T, TRI);
 
     if ((MovY->getOpcode() != AMDGPU::V_MOV_B32_e32 &&
          MovY->getOpcode() != AMDGPU::COPY) ||
         !MovY->getOperand(1).isReg()        ||
         MovY->getOperand(1).getReg() != T   ||
-        MovY->getOperand(1).getSubReg() != Tsub ||
-        MovY->hasRegisterImplicitUseOperand(AMDGPU::M0))
+        MovY->getOperand(1).getSubReg() != Tsub)
       continue;
 
     Register Y = MovY->getOperand(0).getReg();
     unsigned Ysub = MovY->getOperand(0).getSubReg();
 
     if (!TRI->isVGPR(*MRI, Y))
       continue;
 
for (auto IY = MovY->getIterator(), I = std::next(MovT.getIterator());
       if (MovX ||
           (I->getOpcode() != AMDGPU::V_MOV_B32_e32 &&
            I->getOpcode() != AMDGPU::COPY) ||
           I->getOperand(0).getReg() != X ||
           I->getOperand(0).getSubReg() != Xsub) {
         MovX = nullptr;
         break;
       }
-      // Implicit use of M0 is an indirect move.
-      if (I->hasRegisterImplicitUseOperand(AMDGPU::M0))
-        continue;
 
       if (Size > 1 && (I->getNumImplicitOperands() > (I->isCopy() ? 0U : 1U)))
         continue;
 
       MovX = &*I;
     }
 
     if (!MovX)

llvm/test/CodeGen/AMDGPU/v_swap_b32.mir

bb.0:
     $vgpr3 = V_MOV_B32_e32 killed $vgpr4, implicit $exec
     $vgpr0 = V_MOV_B32_e32 killed $vgpr1, implicit $exec
     $vgpr5 = V_MOV_B32_e32 killed $vgpr6, implicit $exec, implicit killed $vgpr0
     $vgpr1 = V_MOV_B32_e32 killed $vgpr2, implicit $exec
     S_SETPC_B64_return $sgpr30_sgpr31, implicit $vgpr1
 ...
 
 # GCN-LABEL: name: indirect_mov_t
-# GCN:      $vgpr2 = V_MOV_B32_e32 killed $vgpr0, implicit $exec, implicit $m0
+# GCN:      $vgpr2 = V_MOV_B32_indirect_read killed $vgpr0, implicit $exec, implicit $m0
 # GCN-NEXT: $vgpr0 = V_MOV_B32_e32 killed $vgpr1, implicit $exec
 # GCN-NEXT: $vgpr1 = V_MOV_B32_e32 killed $vgpr2, implicit $exec
 # GCN-NEXT: S_SETPC_B64_return $sgpr30_sgpr31, implicit $vgpr0, implicit $vgpr1
 
 ---
 name:            indirect_mov_t
 tracksRegLiveness: true
 body:             |
   bb.0:
     liveins: $vgpr0, $vgpr1, $sgpr30_sgpr31
-    $vgpr2 = V_MOV_B32_e32 killed $vgpr0, implicit $exec, implicit $m0
+    $vgpr2 = V_MOV_B32_indirect_read killed $vgpr0, implicit $exec, implicit $m0
     $vgpr0 = V_MOV_B32_e32 killed $vgpr1, implicit $exec
     $vgpr1 = V_MOV_B32_e32 killed $vgpr2, implicit $exec
     S_SETPC_B64_return $sgpr30_sgpr31, implicit $vgpr0, implicit $vgpr1
 ...
 
 # GCN-LABEL: name: indirect_mov_x
 # GCN:      $vgpr2 = V_MOV_B32_e32 killed $vgpr0, implicit $exec
-# GCN-NEXT: $vgpr0 = V_MOV_B32_e32 killed $vgpr1, implicit $exec, implicit $m0
+# GCN-NEXT: $vgpr0 = V_MOV_B32_indirect_read killed $vgpr1, implicit $exec, implicit $m0
 # GCN-NEXT: $vgpr1 = V_MOV_B32_e32 killed $vgpr2, implicit $exec
 # GCN-NEXT: S_SETPC_B64_return $sgpr30_sgpr31, implicit $vgpr0, implicit $vgpr1
 
 ---
 name:            indirect_mov_x
 tracksRegLiveness: true
 body:             |
   bb.0:
     liveins: $vgpr0, $vgpr1, $sgpr30_sgpr31
     $vgpr2 = V_MOV_B32_e32 killed $vgpr0, implicit $exec
-    $vgpr0 = V_MOV_B32_e32 killed $vgpr1, implicit $exec, implicit $m0
+    $vgpr0 = V_MOV_B32_indirect_read killed $vgpr1, implicit $exec, implicit $m0
     $vgpr1 = V_MOV_B32_e32 killed $vgpr2, implicit $exec
     S_SETPC_B64_return $sgpr30_sgpr31, implicit $vgpr0, implicit $vgpr1
 ...
 
 # GCN-LABEL: name: indirect_mov_y
 # GCN:      $vgpr2 = V_MOV_B32_e32 killed $vgpr0, implicit $exec
 # GCN-NEXT: $vgpr0 = V_MOV_B32_e32 killed $vgpr1, implicit $exec
-# GCN-NEXT: $vgpr1 = V_MOV_B32_e32 killed $vgpr2, implicit $exec, implicit $m0
+# GCN-NEXT: $vgpr1 = V_MOV_B32_indirect_read killed $vgpr2, implicit $exec, implicit $m0
 # GCN-NEXT: S_SETPC_B64_return $sgpr30_sgpr31, implicit $vgpr0, implicit $vgpr1
 
 ---
 name:            indirect_mov_y
 tracksRegLiveness: true
 body:             |
   bb.0:
     liveins: $vgpr0, $vgpr1, $sgpr30_sgpr31
     $vgpr2 = V_MOV_B32_e32 killed $vgpr0, implicit $exec
     $vgpr0 = V_MOV_B32_e32 killed $vgpr1, implicit $exec
-    $vgpr1 = V_MOV_B32_e32 killed $vgpr2, implicit $exec, implicit $m0
+    $vgpr1 = V_MOV_B32_indirect_read killed $vgpr2, implicit $exec, implicit $m0
     S_SETPC_B64_return $sgpr30_sgpr31, implicit $vgpr0, implicit $vgpr1
 ...
 
 # GCN-LABEL: name: implicit_ops_mov_x_swap_b32
 # GCN: $vgpr0, $vgpr1 = V_SWAP_B32 $vgpr1, $vgpr0, implicit $exec, implicit $vgpr2, implicit killed $vgpr1_vgpr2
 
 ---
 name:            implicit_ops_mov_x_swap_b32