[LoongArch] Implement assembler branches pseudo instructions

[wangleiat]

Summary

These instructions always output the canonical mnemonic. The GNU tools
emit the canonical mnemonic for the branch pseudo instructions as well
(e.g. "bgt" will be recognised by the assembler but never printed by
objdump).

[xen0n]

Trivial enough.

Although I'd still argue that in fact the gt/le variants are the "canonical" ones, due to the correct ordering of rd, rj ;-) But again the manual isn't amended yet (somebody's still holding strong it seems) so let's just first achieve feature parity...

llvm/lib/Target/LoongArch/LoongArchInstrInfo.td

 
 def : InstAlias<"nop", (ANDI R0, R0, 0)>;
 def : InstAlias<"move $dst, $src", (OR GPR:$dst, GPR:$src, R0)>;
 // `ret` is supported since binutils commit 20f2e2686c79a5ac (version 2.40 and
 // later).
 def : InstAlias<"ret", (JIRL R0, R1, 0)>;
 def : InstAlias<"jr $rj", (JIRL R0, GPR:$rj, 0)>;
 
+// Branches implemented with alias.
+// Always output the canonical mnemonic for the pseudo branch instructions.
+// The GNU tools emit the canonical mnemonic for the branch pseudo instructions
+// as well (e.g. "bgt" will be recognised by the assembler but never printed by
+// objdump). Match this behaviour by setting a zero weight.
+def : InstAlias<"bgt $rj, $rd, $imm16",
+                (BLT GPR:$rd, GPR:$rj, simm16_lsl2_br:$imm16), 0>;
+def : InstAlias<"bgtu $rj, $rd, $imm16",
+                (BLTU GPR:$rd, GPR:$rj, simm16_lsl2_br:$imm16), 0>;
+def : InstAlias<"ble $rj, $rd, $imm16",
+                (BGE GPR:$rd, GPR:$rj, simm16_lsl2_br:$imm16), 0>;
+def : InstAlias<"bleu $rj, $rd, $imm16",
+                (BGEU GPR:$rd, GPR:$rj, simm16_lsl2_br:$imm16), 0>;
+def : InstAlias<"bltz $rd, $imm16",
+                (BLT GPR:$rd, R0, simm16_lsl2_br:$imm16), 0>;
+def : InstAlias<"bgtz $rj, $imm16",
+                (BLT R0, GPR:$rj, simm16_lsl2_br:$imm16), 0>;
+def : InstAlias<"blez $rj, $imm16",
+                (BGE R0, GPR:$rj, simm16_lsl2_br:$imm16), 0>;
+def : InstAlias<"bgez $rd, $imm16",
+                (BGE GPR:$rd, R0, simm16_lsl2_br:$imm16), 0>;
+
 //===----------------------------------------------------------------------===//
 // Basic Floating-Point Instructions
 //===----------------------------------------------------------------------===//
 
 include "LoongArchFloat32InstrInfo.td"
 include "LoongArchFloat64InstrInfo.td"
 
 //===----------------------------------------------------------------------===//

llvm/test/MC/LoongArch/Macros/aliases-br.s

+# RUN: llvm-mc --triple=loongarch64 %s | FileCheck %s
+
+bgt   $a1, $a0, 16
+# CHECK:      blt     $a0, $a1, 16
+bgtu  $a1, $a0, 16
+# CHECK-NEXT: bltu    $a0, $a1, 16
+ble   $a1, $a0, 16
+# CHECK-NEXT: bge     $a0, $a1, 16
+bleu  $a1, $a0, 16
+# CHECK-NEXT: bgeu    $a0, $a1, 16
+bltz   $a0, 16
+# CHECK-NEXT: blt     $a0, $zero, 16
+bgtz   $a0, 16
+# CHECK-NEXT: blt     $zero, $a0, 16
+blez   $a0, 16
+# CHECK-NEXT: bge     $zero, $a0, 16
+bgez   $a0, 16
+# CHECK-NEXT: bge     $a0, $zero, 16