[ARM][AArch64] Move common code into ARMTargetParserCommon

[pratlucas]

LGTM.

llvm/include/llvm/Support/ARMTargetParser.h

 //
 //===----------------------------------------------------------------------===//
 
 #ifndef LLVM_SUPPORT_ARMTARGETPARSER_H
 #define LLVM_SUPPORT_ARMTARGETPARSER_H
 
 #include "llvm/ADT/StringRef.h"
 #include "llvm/Support/ARMBuildAttributes.h"
+#include "llvm/Support/ARMTargetParserCommon.h"
 #include <vector>
 
 namespace llvm {
 
 class Triple;
 
 namespace ARM {
 

 
 // An FPU name implies one of three levels of Neon support:
 enum class NeonSupportLevel {
   None = 0, ///< No Neon
   Neon,     ///< Neon
   Crypto    ///< Neon with Crypto
 };
 
-// ISA kinds.
-enum class ISAKind { INVALID = 0, ARM, THUMB, AARCH64 };
-
-// Endianness
-// FIXME: BE8 vs. BE32?
-enum class EndianKind { INVALID = 0, LITTLE, BIG };
-
 // v6/v7/v8 Profile
 enum class ProfileKind { INVALID = 0, A, R, M };
 
 // List of canonical FPU names (use getFPUSynonym) and which architectural
 // features they correspond to (use getFPUFeatures).
 // FIXME: TableGen this.
 // The entries must appear in the order listed in ARM::FPUKind for correct
 // indexing
template <typename T> struct ArchNames {
   }
 
   // Arch Feature name.
   StringRef getArchFeature() const {
     return StringRef(SubArchCStr, SubArchLength);
   }
 };
 
-static const ArchNames<ArchKind> ARCHNames[] = {
+static const ArchNames<ArchKind> ARMArchNames[] = {
 #define ARM_ARCH(NAME, ID, CPU_ATTR, SUB_ARCH, ARCH_ATTR, ARCH_FPU,            \
                  ARCH_BASE_EXT)                                                \
   {NAME,         sizeof(NAME) - 1,                                             \
    CPU_ATTR,     sizeof(CPU_ATTR) - 1,                                         \
    "+" SUB_ARCH, sizeof(SUB_ARCH),                                             \
    ARCH_FPU,     ARCH_BASE_EXT,                                                \
    ArchKind::ID, ARCH_ATTR},
 #include "llvm/Support/ARMTargetParser.def"

 StringRef getFPUSynonym(StringRef FPU);
 
 // Parser
 uint64_t parseHWDiv(StringRef HWDiv);
 unsigned parseFPU(StringRef FPU);
 ArchKind parseArch(StringRef Arch);
 uint64_t parseArchExt(StringRef ArchExt);
 ArchKind parseCPUArch(StringRef CPU);
-ISAKind parseArchISA(StringRef Arch);
-EndianKind parseArchEndian(StringRef Arch);
 ProfileKind parseArchProfile(StringRef Arch);
 unsigned parseArchVersion(StringRef Arch);
 
 void fillValidCPUArchList(SmallVectorImpl<StringRef> &Values);
 StringRef computeDefaultTargetABI(const Triple &TT, StringRef CPU);
 
 /// Get the (LLVM) name of the minimum ARM CPU for the arch we are targeting.
 ///
 /// \param Arch the architecture name (e.g., "armv7s"). If it is an empty
 /// string then the triple's arch name is used.
 StringRef getARMCPUForArch(const llvm::Triple &Triple, StringRef MArch = {});
 
 } // namespace ARM
 } // namespace llvm
 
 #endif

llvm/include/llvm/Support/ARMTargetParserCommon.h

 #ifndef LLVM_SUPPORT_ARMTARGETPARSERCOMMON_H
 #define LLVM_SUPPORT_ARMTARGETPARSERCOMMON_H
 
 #include "llvm/ADT/StringRef.h"
 
 namespace llvm {
 namespace ARM {
 
+enum class ISAKind { INVALID = 0, ARM, THUMB, AARCH64 };
+
+enum class EndianKind { INVALID = 0, LITTLE, BIG };
+
 /// Converts e.g. "armv8" -> "armv8-a"
 StringRef getArchSynonym(StringRef Arch);
 
 /// MArch is expected to be of the form (arm|thumb)?(eb)?(v.+)?(eb)?, but
 /// (iwmmxt|xscale)(eb)? is also permitted. If the former, return
 /// "v.+", if the latter, return unmodified string, minus 'eb'.
 /// If invalid, return empty string.
 StringRef getCanonicalArchName(StringRef Arch);
 
+// ARM, Thumb, AArch64
+ISAKind parseArchISA(StringRef Arch);
+
+// Little/Big endian
+EndianKind parseArchEndian(StringRef Arch);
+
 } // namespace ARM
 } // namespace llvm
 #endif

llvm/lib/Support/ARMTargetParser.cpp

return StringSwitch<StringRef>(HWDiv)
       .Case("thumb,arm", "arm,thumb")
       .Default(HWDiv);
 }
 
 // Allows partial match, ex. "v7a" matches "armv7a".
 ARM::ArchKind ARM::parseArch(StringRef Arch) {
   Arch = getCanonicalArchName(Arch);
   StringRef Syn = getArchSynonym(Arch);
-  for (const auto &A : ARCHNames) {
+  for (const auto &A : ARMArchNames) {
     if (A.getName().endswith(Syn))
       return A.ID;
   }
   return ArchKind::INVALID;
 }
 
 // Version number (ex. v7 = 7).
 unsigned ARM::parseArchVersion(StringRef Arch) {
if (FPUNames[FPUKind].NeonSupport >= Info.MinSupportLevel)
       Features.push_back(Info.PlusName);
     else
       Features.push_back(Info.MinusName);
   }
 
   return true;
 }
 
-// Little/Big endian
-ARM::EndianKind ARM::parseArchEndian(StringRef Arch) {
-  if (Arch.startswith("armeb") || Arch.startswith("thumbeb") ||
-      Arch.startswith("aarch64_be"))
-    return EndianKind::BIG;
-
-  if (Arch.startswith("arm") || Arch.startswith("thumb")) {
-    if (Arch.endswith("eb"))
-      return EndianKind::BIG;
-    else
-      return EndianKind::LITTLE;
-  }
-
-  if (Arch.startswith("aarch64") || Arch.startswith("aarch64_32"))
-    return EndianKind::LITTLE;
-
-  return EndianKind::INVALID;
-}
-
-// ARM, Thumb, AArch64
-ARM::ISAKind ARM::parseArchISA(StringRef Arch) {
-  return StringSwitch<ISAKind>(Arch)
-      .StartsWith("aarch64", ISAKind::AARCH64)
-      .StartsWith("arm64", ISAKind::AARCH64)
-      .StartsWith("thumb", ISAKind::THUMB)
-      .StartsWith("arm", ISAKind::ARM)
-      .Default(ISAKind::INVALID);
-}
-
 unsigned ARM::parseFPU(StringRef FPU) {
   StringRef Syn = getFPUSynonym(FPU);
   for (const auto &F : FPUNames) {
     if (Syn == F.getName())
       return F.ID;
   }
   return FK_INVALID;
 }

 ARM::FPURestriction ARM::getFPURestriction(unsigned FPUKind) {
   if (FPUKind >= FK_LAST)
     return FPURestriction::None;
   return FPUNames[FPUKind].Restriction;
 }
 
 unsigned ARM::getDefaultFPU(StringRef CPU, ARM::ArchKind AK) {
   if (CPU == "generic")
-    return ARM::ARCHNames[static_cast<unsigned>(AK)].DefaultFPU;
+    return ARM::ARMArchNames[static_cast<unsigned>(AK)].DefaultFPU;
 
   return StringSwitch<unsigned>(CPU)
 #define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT)           \
   .Case(NAME, DEFAULT_FPU)
 #include "llvm/Support/ARMTargetParser.def"
    .Default(ARM::FK_INVALID);
 }
 
 uint64_t ARM::getDefaultExtensions(StringRef CPU, ARM::ArchKind AK) {
   if (CPU == "generic")
-    return ARM::ARCHNames[static_cast<unsigned>(AK)].ArchBaseExtensions;
+    return ARM::ARMArchNames[static_cast<unsigned>(AK)].ArchBaseExtensions;
 
   return StringSwitch<uint64_t>(CPU)
 #define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT)           \
   .Case(NAME,                                                                  \
-        ARCHNames[static_cast<unsigned>(ArchKind::ID)].ArchBaseExtensions |    \
+        ARMArchNames[static_cast<unsigned>(ArchKind::ID)].ArchBaseExtensions | \
             DEFAULT_EXT)
 #include "llvm/Support/ARMTargetParser.def"
   .Default(ARM::AEK_INVALID);
 }
 
 bool ARM::getHWDivFeatures(uint64_t HWDivKind,
                            std::vector<StringRef> &Features) {
 
for (const auto &AE : ARCHExtNames) {
     else if (AE.NegFeature)
       Features.push_back(AE.NegFeature);
   }
 
   return getHWDivFeatures(Extensions, Features);
 }
 
 StringRef ARM::getArchName(ARM::ArchKind AK) {
-  return ARCHNames[static_cast<unsigned>(AK)].getName();
+  return ARMArchNames[static_cast<unsigned>(AK)].getName();
 }
 
 StringRef ARM::getCPUAttr(ARM::ArchKind AK) {
-  return ARCHNames[static_cast<unsigned>(AK)].getCPUAttr();
+  return ARMArchNames[static_cast<unsigned>(AK)].getCPUAttr();
 }
 
 StringRef ARM::getSubArch(ARM::ArchKind AK) {
-  return ARCHNames[static_cast<unsigned>(AK)].getSubArch();
+  return ARMArchNames[static_cast<unsigned>(AK)].getSubArch();
 }
 
 unsigned ARM::getArchAttr(ARM::ArchKind AK) {
-  return ARCHNames[static_cast<unsigned>(AK)].ArchAttr;
+  return ARMArchNames[static_cast<unsigned>(AK)].ArchAttr;
 }
 
 StringRef ARM::getArchExtName(uint64_t ArchExtKind) {
   for (const auto &AE : ARCHExtNames) {
     if (ArchExtKind == AE.ID)
       return AE.getName();
   }
   return StringRef();

llvm/lib/Support/ARMTargetParserCommon.cpp

if (offset != StringRef::npos) {
     // Can't have an extra 'eb'.
     if (A.contains("eb"))
       return Error;
   }
 
   // Arch will either be a 'v' name (v7a) or a marketing name (xscale).
   return A;
 }
+
+ARM::ISAKind ARM::parseArchISA(StringRef Arch) {
+  return StringSwitch<ISAKind>(Arch)
+      .StartsWith("aarch64", ISAKind::AARCH64)
+      .StartsWith("arm64", ISAKind::AARCH64)
+      .StartsWith("thumb", ISAKind::THUMB)
+      .StartsWith("arm", ISAKind::ARM)
+      .Default(ISAKind::INVALID);
+}
+
+ARM::EndianKind ARM::parseArchEndian(StringRef Arch) {
+  if (Arch.startswith("armeb") || Arch.startswith("thumbeb") ||
+      Arch.startswith("aarch64_be"))
+    return EndianKind::BIG;
+
+  if (Arch.startswith("arm") || Arch.startswith("thumb")) {
+    if (Arch.endswith("eb"))
+      return EndianKind::BIG;
+    else
+      return EndianKind::LITTLE;
+  }
+
+  if (Arch.startswith("aarch64") || Arch.startswith("aarch64_32"))
+    return EndianKind::LITTLE;
+
+  return EndianKind::INVALID;
+}

llvm/lib/Support/Triple.cpp

 //===--- Triple.cpp - Target triple helper class --------------------------===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 
 #include "llvm/ADT/Triple.h"
 #include "llvm/ADT/SmallString.h"
 #include "llvm/ADT/StringExtras.h"
 #include "llvm/ADT/StringSwitch.h"
 #include "llvm/Support/ARMTargetParser.h"
+#include "llvm/Support/ARMTargetParserCommon.h"
 #include "llvm/Support/ErrorHandling.h"
 #include "llvm/Support/Host.h"
 #include "llvm/Support/SwapByteOrder.h"
 #include "llvm/Support/VersionTuple.h"
 #include <cassert>
 #include <cstring>
 using namespace llvm;