[LLDB] Add LoongArch software breakpoint trap opcode

[seehearfeel]

Summary

Use break 0x5 for LoongArch software breakpoint traps.
The magic number 0x5 means BRK_SSTEPBP as defined in
the kernel header asm/break.h on LoongArch.

[xen0n]

I think eventually the upstream Linux would gain support for hardware single-stepping, before the architecture is widely adopted (to be frank, if at all), so it's probably not necessary to mention this point in the commit message. Focus on the code changes being made right here.

Also the commit message is a bit unnatural (the English "take" feels very different than Chinese "取" in this context). Let me tweak it a little bit and please check if it's still conveying the message you intended.

lldb/source/Host/common/NativeProcessProtocol.cpp

510

This is not a plain break, but rather break 0x5 or break BRK_SSTEPBP as the constant/magic 5 comes from Linux/LoongArch asm/break.h. Better reflect this in the comment.

lldb/source/Target/Platform.cpp

1945

Same here.

[seehearfeel]

Use "break 0x5" in the code comment.

[xen0n]

You removed the formatting in the commit message and added an extra space in front of the patch title, all fixed for you.

The changes look good LoongArch-wise now. Thanks!

[SixWeining]

LGTM.

lldb/source/Host/common/NativeProcessProtocol.cpp

NativeProcessProtocol::GetSoftwareBreakpointTrapOpcode(size_t size_hint) {
   static const uint8_t g_i386_opcode[] = {0xCC};
   static const uint8_t g_mips64_opcode[] = {0x00, 0x00, 0x00, 0x0d};
   static const uint8_t g_mips64el_opcode[] = {0x0d, 0x00, 0x00, 0x00};
   static const uint8_t g_s390x_opcode[] = {0x00, 0x01};
   static const uint8_t g_ppc_opcode[] = {0x7f, 0xe0, 0x00, 0x08};   // trap
   static const uint8_t g_ppcle_opcode[] = {0x08, 0x00, 0xe0, 0x7f}; // trap
   static const uint8_t g_riscv_opcode[] = {0x73, 0x00, 0x10, 0x00}; // ebreak
   static const uint8_t g_riscv_opcode_c[] = {0x02, 0x90};           // c.ebreak
+  static const uint8_t g_loongarch_opcode[] = {0x05, 0x00, 0x2a,
+                                               0x00}; // break 0x5
 
   switch (GetArchitecture().GetMachine()) {
   case llvm::Triple::aarch64:
   case llvm::Triple::aarch64_32:
     return llvm::makeArrayRef(g_aarch64_opcode);
 
   case llvm::Triple::x86:
   case llvm::Triple::x86_64:
case llvm::Triple::ppc64le:
     return llvm::makeArrayRef(g_ppcle_opcode);
 
   case llvm::Triple::riscv32:
   case llvm::Triple::riscv64: {
     return size_hint == 2 ? llvm::makeArrayRef(g_riscv_opcode_c)
                           : llvm::makeArrayRef(g_riscv_opcode);
   }
 
+  case llvm::Triple::loongarch32:
+  case llvm::Triple::loongarch64:
+    return llvm::makeArrayRef(g_loongarch_opcode);
+
   default:
     return llvm::createStringError(llvm::inconvertibleErrorCode(),
                                    "CPU type not supported!");
   }
 }
 
 size_t NativeProcessProtocol::GetSoftwareBreakpointPCOffset() {
   switch (GetArchitecture().GetMachine()) {
size_t NativeProcessProtocol::GetSoftwareBreakpointPCOffset() {
   case llvm::Triple::mips64el:
   case llvm::Triple::mips:
   case llvm::Triple::mipsel:
   case llvm::Triple::ppc:
   case llvm::Triple::ppc64:
   case llvm::Triple::ppc64le:
   case llvm::Triple::riscv32:
   case llvm::Triple::riscv64:
+  case llvm::Triple::loongarch32:
+  case llvm::Triple::loongarch64:
     // On these architectures the PC doesn't get updated for breakpoint hits.
     return 0;
 
   default:
     llvm_unreachable("CPU type not supported!");
   }
 }
 

lldb/source/Target/Platform.cpp

if (arch.GetFlags() & ArchSpec::eRISCV_rvc) {
       trap_opcode = g_riscv_opcode_c;
       trap_opcode_size = sizeof(g_riscv_opcode_c);
     } else {
       trap_opcode = g_riscv_opcode;
       trap_opcode_size = sizeof(g_riscv_opcode);
     }
   } break;
 
+  case llvm::Triple::loongarch32:
+  case llvm::Triple::loongarch64: {
+    static const uint8_t g_loongarch_opcode[] = {0x05, 0x00, 0x2a,
+                                                 0x00}; // break 0x5
+    trap_opcode = g_loongarch_opcode;
+    trap_opcode_size = sizeof(g_loongarch_opcode);
+  } break;
+
   default:
     return 0;
   }
 
   assert(bp_site);
   if (bp_site->SetTrapOpcode(trap_opcode, trap_opcode_size))
     return trap_opcode_size;