[TableGen] Fix sub-operand counting bug in PseudoLoweringEmitter

[barannikov88]

Summary

When generating expansion for instruction with complex operands, the
BaseIdx variable was not properly updated. This resulted in
spurious error messages about mismatched operands.
The reworked algorithm simply walks through operands mapping their
logical indices into MI indices.

[barannikov88]

llvm/utils/TableGen/PseudoLoweringEmitter.cpp

125

Copied from here.

[barannikov88]

OK, this does not work. This triggers assert(BaseIdx == 0 && "Named subargument in pseudo expansion?!"); in some cases. Need to dive deeper into this indexing logic.

[barannikov88]

Simplify operand index calculation

[barannikov88]

llvm/utils/TableGen/PseudoLoweringEmitter.cpp

125

The comment is no longer relevant.

[barannikov88]

Abandoning as no one seems to be interested, and it is no longer relevant for our target.

llvm/test/TableGen/pseudo-inst-expansion.td

def INSTR : Instruction {
   let Pattern = [];
 }
 
 def PSEUDO : Pseudo<(outs GPR:$rd), (ins),
                     [(set GPR:$rd, (i32 SR.Encoding))]>,
              PseudoInstExpansion<(INSTR GPR:$rd, SR.Encoding)>;
 
 // CHECK: .addOperand(MCOperand::createImm(3855));
+
+def ComplexOp : Operand<i32> { let MIOperandInfo = (ops GPR, i32imm); }
+
+def INSTR2 : Instruction {
+  let OutOperandList = (outs);
+  let InOperandList = (ins ComplexOp:$cop, GPR:$r);
+}
+
+def PSEUDO2 : Pseudo<(outs), (ins ComplexOp:$cop), []>,
+              PseudoInstExpansion<(INSTR2 ComplexOp:$cop, REG)>;
+
+// CHECK:      TmpInst.setOpcode(::INSTR2);
+// CHECK-NEXT: // Operand: cop
+// CHECK-NEXT: lowerOperand(MI->getOperand(0), MCOp);
+// CHECK-NEXT: TmpInst.addOperand(MCOp);
+// CHECK-NEXT: lowerOperand(MI->getOperand(1), MCOp);
+// CHECK-NEXT: TmpInst.addOperand(MCOp);
+// CHECK-NEXT: // Operand: r
+// CHECK-NEXT: TmpInst.addOperand(MCOperand::createReg(::REG));
+// CHECK-NEXT: EmitToStreamer(OutStreamer, TmpInst);

llvm/utils/TableGen/PseudoLoweringEmitter.cpp

if (DefInit *DI = dyn_cast<DefInit>(Dag->getArg(i))) {
                        "Value was assigned at the following location:");
       }
       // Source operand maps to destination operand. The Data element
       // will be filled in later, just set the Kind for now. Do it
       // for each corresponding MachineInstr operand, not just the first.
       for (unsigned I = 0, E = Insn.Operands[i].MINumOperands; I != E; ++I)
         OperandMap[BaseIdx + i + I].Kind = OpData::Operand;
       OpsAdded += Insn.Operands[i].MINumOperands;
+      // Since we added more than one, we also need to adjust the base.
+      BaseIdx += Insn.Operands[i].MINumOperands - 1;
     } else if (IntInit *II = dyn_cast<IntInit>(Dag->getArg(i))) {
       OperandMap[BaseIdx + i].Kind = OpData::Imm;
       OperandMap[BaseIdx + i].Data.Imm = II->getValue();
       ++OpsAdded;
     } else if (auto *BI = dyn_cast<BitsInit>(Dag->getArg(i))) {
       auto *II =
           cast<IntInit>(BI->convertInitializerTo(IntRecTy::get(Records)));
       OperandMap[BaseIdx + i].Kind = OpData::Imm;
       OperandMap[BaseIdx + i].Data.Imm = II->getValue();
       ++OpsAdded;
     } else if (DagInit *SubDag = dyn_cast<DagInit>(Dag->getArg(i))) {
       // Just add the operands recursively. This is almost certainly
       // a constant value for a complex operand (> 1 MI operand).
       unsigned NewOps =
         addDagOperandMapping(Rec, SubDag, Insn, OperandMap, BaseIdx + i);
       OpsAdded += NewOps;
       // Since we added more than one, we also need to adjust the base.
       BaseIdx += NewOps - 1;
     } else
       llvm_unreachable("Unhandled pseudo-expansion argument type!");
   }
   return OpsAdded;
 }
 
 void PseudoLoweringEmitter::evaluateExpansion(Record *Rec) {