[LoongArch] Add support for ISD::FRAMEADDR and ISD::RETURNADDR

[gonglingqin]

Summary

For now, only support lowering frame/return address for current frame.

[xen0n]

llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp

241–246

Why this limitation? I can't seem to find similar guard in AArch64, CSKY, RISCV or VE, but it is indeed present for MIPS and SystemZ.

llvm/test/CodeGen/LoongArch/frameaddr-returnaddr.ll

7

Please convert to opaque pointers throughout.

[gonglingqin]

llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp

241–246

Good question! When the depth!=0 and the caller function does not use FP to save the current stack frame, causing an illegal address call, as in the following example:

#include <stdio.h>

void __attribute__((noinline)) foo() {

  printf("foo\n");
  printf("return address: %p\n", __builtin_return_address(2));
}
void __attribute__((noinline)) bar() {

  foo();
  printf("bar\n");
  printf("return address: %p\n", __builtin_return_address(0));
}
int main() {

  bar();
  return 0;
}

Compiling this test case with O2 on riscv64 reproduces this problem.
In reference to 'https://llvm.org/docs/LangRef.html#llvm-frameaddress-intrinsic' and 'https://llvm.org/docs/LangRef.html#llvm-returnaddress', this limitation is increased and returns 0 if depth is not equal to 0.

llvm/test/CodeGen/LoongArch/frameaddr-returnaddr.ll

7

Thanks, I will modify it.

[gonglingqin]

Address @xen0n's comments.

[SixWeining]

LGTM.

[SixWeining]

llvm/test/CodeGen/LoongArch/frameaddr-returnaddr.ll

51

For an assertion build, this will crash.

[SixWeining]

llvm/test/CodeGen/LoongArch/frameaddr-returnaddr.ll

51

Maybe this test can be removed before ; REQUIRES: noasserts getting supported by llvm-lit?

[gonglingqin]

llvm/test/CodeGen/LoongArch/frameaddr-returnaddr.ll

51

Thanks, I will remove it.

[gonglingqin]

Remove test cases test_frameaddress_2() and test_returnaddress_2()

[SixWeining]

llvm/test/CodeGen/LoongArch/frameaddr-returnaddr-error.ll

7

The _0 suffix is needless as you don't have _1 or _2.

[SixWeining]

llvm/test/CodeGen/LoongArch/frameaddr-returnaddr-error.ll

7

Perhaps non_const_depth_frameaddress?

[gonglingqin]

llvm/test/CodeGen/LoongArch/frameaddr-returnaddr-error.ll

7

Thanks, I will modify it.

[gonglingqin]

Rename the test case

[SixWeining]

Seems that depth > 0 should also be supported (but not guarantee correctness). See D137541.

llvm/lib/Target/LoongArch/LoongArchISelLowering.h

EmitInstrWithCustomInserter(MachineInstr &MI,
                               MachineBasicBlock *BB) const override;
   SDValue lowerConstantPool(SDValue Op, SelectionDAG &DAG) const;
   SDValue lowerEH_DWARF_CFA(SDValue Op, SelectionDAG &DAG) const;
   SDValue lowerFP_TO_SINT(SDValue Op, SelectionDAG &DAG) const;
   SDValue lowerBITCAST(SDValue Op, SelectionDAG &DAG) const;
   SDValue lowerUINT_TO_FP(SDValue Op, SelectionDAG &DAG) const;
   SDValue lowerVASTART(SDValue Op, SelectionDAG &DAG) const;
   SDValue lowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG) const;
+  SDValue lowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) const;
+  SDValue lowerRETURNADDR(SDValue Op, SelectionDAG &DAG) const;
 
   bool isFPImmLegal(const APFloat &Imm, EVT VT,
                     bool ForCodeSize) const override;
 
   bool shouldInsertFencesForAtomic(const Instruction *I) const override;
 
   ConstraintType getConstraintType(StringRef Constraint) const override;
 

llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp

SDValue LoongArchTargetLowering::LowerOperation(SDValue Op,
   case ISD::FP_TO_SINT:
     return lowerFP_TO_SINT(Op, DAG);
   case ISD::BITCAST:
     return lowerBITCAST(Op, DAG);
   case ISD::UINT_TO_FP:
     return lowerUINT_TO_FP(Op, DAG);
   case ISD::VASTART:
     return lowerVASTART(Op, DAG);
+  case ISD::FRAMEADDR:
+    return lowerFRAMEADDR(Op, DAG);
+  case ISD::RETURNADDR:
+    return lowerRETURNADDR(Op, DAG);
   }
   return SDValue();
 }
 
+SDValue LoongArchTargetLowering::lowerFRAMEADDR(SDValue Op,
+                                                SelectionDAG &DAG) const {
+  if (!isa<ConstantSDNode>(Op.getOperand(0))) {
+    DAG.getContext()->emitError("argument to '__builtin_frame_address' must "
+                                "be a constant integer");
+    return SDValue();
+  }
+
+  // Currently only support lowering frame address for current frame.
+  unsigned Depth = cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue();
+  assert((Depth == 0) &&
+         "Frame address can only be determined for current frame.");
+  if (Depth != 0)
+    return SDValue();
+
+  MachineFunction &MF = DAG.getMachineFunction();
+  MF.getFrameInfo().setFrameAddressIsTaken(true);
+
+  return DAG.getCopyFromReg(DAG.getEntryNode(), SDLoc(Op),
+                            Subtarget.getRegisterInfo()->getFrameRegister(MF),
+                            Op.getValueType());
+}
+
+SDValue LoongArchTargetLowering::lowerRETURNADDR(SDValue Op,
+                                                 SelectionDAG &DAG) const {
+  if (verifyReturnAddressArgumentIsConstant(Op, DAG))
+    return SDValue();
+
+  // Currently only support lowering return address for current frame.
+  unsigned Depth = cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue();
+  assert((Depth == 0) &&
+         "Return address can only be determined for current frame.");
+  if (Depth != 0)
+    return SDValue();
+
+  MachineFunction &MF = DAG.getMachineFunction();
+  MF.getFrameInfo().setReturnAddressIsTaken(true);
+  MVT GRLenVT = Subtarget.getGRLenVT();
+
+  // Return the value of the return address register, marking it an implicit
+  // live-in.
+  Register Reg = MF.addLiveIn(Subtarget.getRegisterInfo()->getRARegister(),
+                              getRegClassFor(GRLenVT));
+  return DAG.getCopyFromReg(DAG.getEntryNode(), SDLoc(Op), Reg, GRLenVT);
+}
+
 SDValue LoongArchTargetLowering::lowerEH_DWARF_CFA(SDValue Op,
                                                    SelectionDAG &DAG) const {
   MachineFunction &MF = DAG.getMachineFunction();
   auto Size = Subtarget.getGRLen() / 8;
   auto FI = MF.getFrameInfo().CreateFixedObject(Size, 0, false);
   return DAG.getFrameIndex(FI, getPointerTy(DAG.getDataLayout()));
 }
 

llvm/test/CodeGen/LoongArch/frameaddr-returnaddr-error.ll

+; RUN: not llc --mtriple=loongarch64 --disable-verify < %s 2>&1 | FileCheck %s
+
+declare ptr @llvm.frameaddress(i32)
+declare ptr @llvm.returnaddress(i32)
+
+define ptr @non_const_depth_frameaddress(i32 %x) nounwind {
+; CHECK: argument to '__builtin_frame_address' must be a constant integer
+  %1 = call ptr @llvm.frameaddress(i32 %x)
+  ret ptr %1
+}
+
+
+define ptr @non_const_depth_returnaddress(i32 %x) nounwind {
+; CHECK: argument to '__builtin_return_address' must be a constant integer
+  %1 = call ptr @llvm.returnaddress(i32 %x)
+  ret ptr %1
+}
+

llvm/test/CodeGen/LoongArch/frameaddr-returnaddr.ll

+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc --mtriple=loongarch32 < %s | FileCheck %s --check-prefix=LA32
+; RUN: llc --mtriple=loongarch64 < %s | FileCheck %s --check-prefix=LA64
+
+declare ptr @llvm.frameaddress(i32)
+declare ptr @llvm.returnaddress(i32)
+
+define ptr @test_frameaddress_0() nounwind {
+; LA32-LABEL: test_frameaddress_0:
+; LA32:       # %bb.0:
+; LA32-NEXT:    addi.w $sp, $sp, -16
+; LA32-NEXT:    st.w $ra, $sp, 12 # 4-byte Folded Spill
+; LA32-NEXT:    st.w $fp, $sp, 8 # 4-byte Folded Spill
+; LA32-NEXT:    addi.w $fp, $sp, 16
+; LA32-NEXT:    move $a0, $fp
+; LA32-NEXT:    ld.w $fp, $sp, 8 # 4-byte Folded Reload
+; LA32-NEXT:    ld.w $ra, $sp, 12 # 4-byte Folded Reload
+; LA32-NEXT:    addi.w $sp, $sp, 16
+; LA32-NEXT:    ret
+;
+; LA64-LABEL: test_frameaddress_0:
+; LA64:       # %bb.0:
+; LA64-NEXT:    addi.d $sp, $sp, -16
+; LA64-NEXT:    st.d $ra, $sp, 8 # 8-byte Folded Spill
+; LA64-NEXT:    st.d $fp, $sp, 0 # 8-byte Folded Spill
+; LA64-NEXT:    addi.d $fp, $sp, 16
+; LA64-NEXT:    move $a0, $fp
+; LA64-NEXT:    ld.d $fp, $sp, 0 # 8-byte Folded Reload
+; LA64-NEXT:    ld.d $ra, $sp, 8 # 8-byte Folded Reload
+; LA64-NEXT:    addi.d $sp, $sp, 16
+; LA64-NEXT:    ret
+  %1 = call ptr @llvm.frameaddress(i32 0)
+  ret ptr %1
+}
+
+define ptr @test_returnaddress_0() nounwind {
+; LA32-LABEL: test_returnaddress_0:
+; LA32:       # %bb.0:
+; LA32-NEXT:    move $a0, $ra
+; LA32-NEXT:    ret
+;
+; LA64-LABEL: test_returnaddress_0:
+; LA64:       # %bb.0:
+; LA64-NEXT:    move $a0, $ra
+; LA64-NEXT:    ret
+  %1 = call ptr @llvm.returnaddress(i32 0)
+  ret ptr %1
+}