[LLDB][Reliability] Fix register value unpacking

[fixathon]

Summary

Fix incorrect direction for bit-shifting.

Coverity warning 1355603 (scan.coverity.com)

[DavidSpickett]

Thanks!

I'm bothered that no test hit this but I deal with that (it's probably because no instruction you'd need to emulate uses these registers).

[clayborg]

Can we add a test for this?

[DavidSpickett]

So I looked into what *should* be testing this and if it was done comprehensively it would have been testing it. However the Arm emulation tests:

• Don't check D registers directly, only S (which is why we didn't miss the upper 32 bits).
• Don't verify that memory expected matches memory got (memory is mostly used as an input to registers).
• Don't specify the final state of memory anyway.

I got some way into fixing that and found ~50 tests that use memory but don't verify the content.

Which is to say, yes this can and should have been tested :)

I will put up some patches shortly to build on this and maybe make the memory checking optional. Then this can be tested, and I'll work towards adding memory checks to the other tests over time.

So hold off on landing while I come up with that.

[DavidSpickett]

I've stacked some reviews onto this that end in a new test that covers this change.

[fixathon]

Thanks for review and for adding unit tests

lldb/source/Plugins/Instruction/ARM/EmulationStateARM.cpp

if (reg_num <= dwarf_cpsr)
     value = m_gpr[reg_num - dwarf_r0];
   else if ((dwarf_s0 <= reg_num) && (reg_num <= dwarf_s31)) {
     uint32_t idx = reg_num - dwarf_s0;
     value = m_vfp_regs.d_regs[idx];
   } else if ((dwarf_d0 <= reg_num) && (reg_num <= dwarf_d31)) {
     uint32_t idx = reg_num - dwarf_d0;
     if (idx < 16)
       value = (uint64_t)m_vfp_regs.s_regs[idx * 2] |
-              ((uint64_t)m_vfp_regs.s_regs[idx * 2 + 1] >> 32);
+              ((uint64_t)m_vfp_regs.s_regs[idx * 2 + 1] << 32);
     else
       value = m_vfp_regs.d_regs[idx - 16];
   } else
     success = false;
 
   return value;
 }