[MipsInstPrinter] Introduce markup tags emission

[antoniofrighetto]

Summary

MIPS assembly syntax emission now leverages markup tags, if enabled.

[MaskRay]

This needs tests in llvm/test/MC/Disassembler/Mips/ using -mdis.

[antoniofrighetto]

@MaskRay, test added!

[MaskRay]

Thanks!

llvm/test/MC/Disassembler/Mips/mips1/marked-up.txt

11

delete blank line

llvm/lib/Target/Mips/MCTargetDesc/MipsInstPrinter.cpp

const char* Mips::MipsFCCToString(Mips::CondCode CC) {
   case FCOND_NLE: return "le";
   case FCOND_NGT:
   case FCOND_GT:  return "ngt";
   }
   llvm_unreachable("Impossible condition code!");
 }
 
 void MipsInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const {
-  OS << '$' << StringRef(getRegisterName(RegNo)).lower();
+  OS << markup("<reg:") << '$' << StringRef(getRegisterName(RegNo)).lower()
+     << markup(">");
 }
 
 void MipsInstPrinter::printInst(const MCInst *MI, uint64_t Address,
                                 StringRef Annot, const MCSubtargetInfo &STI,
                                 raw_ostream &O) {
   switch (MI->getOpcode()) {
   default:
     break;
void MipsInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
                                    const MCSubtargetInfo &STI, raw_ostream &O) {
   const MCOperand &Op = MI->getOperand(OpNo);
   if (Op.isReg()) {
     printRegName(O, Op.getReg());
     return;
   }
 
   if (Op.isImm()) {
-    O << formatImm(Op.getImm());
+    O << markup("<imm:") << formatImm(Op.getImm()) << markup(">");
     return;
   }
 
   assert(Op.isExpr() && "unknown operand kind in printOperand");
   Op.getExpr()->print(O, &MAI, true);
 }
 
 void MipsInstPrinter::printJumpOperand(const MCInst *MI, unsigned OpNo,
                                        const MCSubtargetInfo &STI,
                                        raw_ostream &O) {
   const MCOperand &Op = MI->getOperand(OpNo);
   if (!Op.isImm())
     return printOperand(MI, OpNo, STI, O);
 
   if (PrintBranchImmAsAddress)
-    O << formatHex(Op.getImm());
+    O << markup("<imm:") << formatHex(Op.getImm()) << markup(">");
   else
-    O << formatImm(Op.getImm());
+    O << markup("<imm:") << formatImm(Op.getImm()) << markup(">");
 }
 
 void MipsInstPrinter::printBranchOperand(const MCInst *MI, uint64_t Address,
                                          unsigned OpNo,
                                          const MCSubtargetInfo &STI,
                                          raw_ostream &O) {
   const MCOperand &Op = MI->getOperand(OpNo);
   if (!Op.isImm())
     return printOperand(MI, OpNo, STI, O);
 
   if (PrintBranchImmAsAddress) {
     uint64_t Target = Address + Op.getImm();
     if (STI.hasFeature(Mips::FeatureMips32))
       Target &= 0xffffffff;
     else if (STI.hasFeature(Mips::FeatureMips16))
       Target &= 0xffff;
-    O << formatHex(Target);
+    O << markup("<imm:") << formatHex(Target) << markup(">");
   } else {
-    O << formatImm(Op.getImm());
+    O << markup("<imm:") << formatImm(Op.getImm()) << markup(">");
   }
 }
 
 template <unsigned Bits, unsigned Offset>
 void MipsInstPrinter::printUImm(const MCInst *MI, int opNum,
                                 const MCSubtargetInfo &STI, raw_ostream &O) {
   const MCOperand &MO = MI->getOperand(opNum);
   if (MO.isImm()) {
     uint64_t Imm = MO.getImm();
     Imm -= Offset;
     Imm &= (1 << Bits) - 1;
     Imm += Offset;
-    O << formatImm(Imm);
+    O << markup("<imm:") << formatImm(Imm) << markup(">");
     return;
   }
 
   printOperand(MI, opNum, STI, O);
 }
 
 void MipsInstPrinter::printMemOperand(const MCInst *MI, int opNum,
                                       const MCSubtargetInfo &STI,
void MipsInstPrinter::printMemOperand(const MCInst *MI, int opNum,
   case Mips::SWM16_MM:
   case Mips::SWM16_MMR6:
   case Mips::LWM16_MM:
   case Mips::LWM16_MMR6:
     opNum = MI->getNumOperands() - 2;
     break;
   }
 
+  O << markup("<mem:");
   printOperand(MI, opNum + 1, STI, O);
   O << "(";
   printOperand(MI, opNum, STI, O);
   O << ")";
+  O << markup(">");
 }
 
 void MipsInstPrinter::printMemOperandEA(const MCInst *MI, int opNum,
                                         const MCSubtargetInfo &STI,
                                         raw_ostream &O) {
   // when using stack locations for not load/store instructions
   // print the same way as all normal 3 operand instructions.
   printOperand(MI, opNum, STI, O);

llvm/test/MC/Disassembler/Mips/mips1/marked-up.txt

+# RUN: llvm-mc --mdis %s -triple=mips-unknown-linux -mcpu=mips1 2>&1 | FileCheck %s
+
+# CHECK: j  <imm:80478376>
+0x09 0x33 0x00 0x2a
+# CHECK: addi <reg:$13>, <reg:$9>, <imm:26322>
+0x21 0x2d 0x66 0xd2
+# CHECK: xor  <reg:$18>, <reg:$4>, <reg:$fp>
+0x00 0x9e 0x90 0x26
+# CHECK: lwr  <reg:$zero>, <mem:<imm:-19147>(<reg:$gp>)>
+0x9b 0x80 0xb5 0x35
+