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Differential D126938

[SLP][NFC] Precommit test for followup patch that fixes vector phi poison input.
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Authored by vporpo on Jun 2 2022, 7:46 PM.

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MaskRay
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rG6c6ad5143a56: [SLP][NFC] Precommit test for followup patch that fixes vector phi poison input.

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vporpo created this revision.Jun 2 2022, 7:46 PM
Herald added a project: Restricted Project. · View Herald TranscriptJun 2 2022, 7:46 PM
vporpo requested review of this revision.Jun 2 2022, 7:46 PM
Herald added a project: Restricted Project. · View Herald TranscriptJun 2 2022, 7:46 PM
Herald added a subscriber: llvm-commits. · View Herald Transcript
vporpo added a child revision: D126939: [SLP] Avoid converting undef to poison when gathering..Jun 2 2022, 7:51 PM
Harbormaster completed remote builds in B167657: Diff 433938.Jun 2 2022, 8:30 PM
MaskRay accepted this revision.Jun 2 2022, 8:36 PM
MaskRay added a subscriber: MaskRay.

LGTM.

llvm/test/Transforms/SLPVectorizer/X86/phi-undef-input.ll
3

If this does not use linux-gnu knowledge, use -mtriple=x86_64 to test generic ELF behavior.

This revision is now accepted and ready to land.Jun 2 2022, 8:36 PM
Herald added a subscriber: StephenFan. · View Herald TranscriptJun 2 2022, 8:36 PM
vporpo updated this revision to Diff 434138.Jun 3 2022, 2:04 PM

Added some tests in /X86/diamond_broadcast_extra_shuffle.ll

MaskRay added inline comments.Jun 3 2022, 2:41 PM
llvm/test/Transforms/SLPVectorizer/X86/phi-undef-input.ll
7

Better to change all xxx* to ptr for opaque pointers for new tests.

Harbormaster completed remote builds in B167798: Diff 434138.Jun 3 2022, 2:48 PM
vporpo added inline comments.Jun 3 2022, 5:18 PM
llvm/test/Transforms/SLPVectorizer/X86/phi-undef-input.ll
7

Yeah, this argument is actually not needed, removed.

hvdijk added a child revision: D127073: [SLP] Treat undef as any other constant.Jun 5 2022, 7:51 AM
This revision was landed with ongoing or failed builds.Jun 6 2022, 10:05 AM
Closed by commit rG6c6ad5143a56: [SLP][NFC] Precommit test for followup patch that fixes vector phi poison input. (authored by vporpo). · Explain Why
This revision was automatically updated to reflect the committed changes.
vporpo added a commit: rG6c6ad5143a56: [SLP][NFC] Precommit test for followup patch that fixes vector phi poison input..
hvdijk removed a child revision: D127073: [SLP] Treat undef as any other constant.Jun 7 2022, 11:52 AM

Revision Contents

PathSize
llvm/
test/
Transforms/
SLPVectorizer/
X86/
228 lines

Diff 434515

llvm/test/Transforms/SLPVectorizer/X86/phi-undef-input.ll

  • This file was added.
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -slp-vectorizer -slp-threshold=-1000 -mtriple=x86_64 -S | FileCheck %s
MaskRayUnsubmitted
Not Done
ReplyInline Actions

If this does not use linux-gnu knowledge, use -mtriple=x86_64 to test generic ELF behavior.

MaskRay: If this does not use linux-gnu knowledge, use `-mtriple=x86_64` to test generic ELF behavior.
; The inputs to vector phi should remain undef.
define i32 @phi3UndefInput(i1 %cond, i8 %arg0, i8 %arg1, i8 %arg2, i8 %arg3) {
; CHECK-LABEL: @phi3UndefInput(
MaskRayUnsubmitted
Not Done
ReplyInline Actions

Better to change all xxx* to ptr for opaque pointers for new tests.

MaskRay: Better to change all `xxx*` to `ptr` for opaque pointers for new tests.
vporpoAuthorUnsubmitted
Done
ReplyInline Actions

Yeah, this argument is actually not needed, removed.

vporpo: Yeah, this argument is actually not needed, removed.
; CHECK-NEXT: entry:
; CHECK-NEXT: br i1 [[COND:%.*]], label [[BB2:%.*]], label [[BB3:%.*]]
; CHECK: bb2:
; CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x i8> poison, i8 [[ARG0:%.*]], i32 0
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x i8> [[TMP0]], i8 [[ARG1:%.*]], i32 1
; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x i8> [[TMP1]], i8 [[ARG2:%.*]], i32 2
; CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x i8> [[TMP2]], i8 [[ARG3:%.*]], i32 3
; CHECK-NEXT: br label [[BB3]]
; CHECK: bb3:
; CHECK-NEXT: [[TMP4:%.*]] = phi <4 x i8> [ [[TMP3]], [[BB2]] ], [ <i8 0, i8 poison, i8 poison, i8 poison>, [[ENTRY:%.*]] ]
; CHECK-NEXT: [[TMP5:%.*]] = zext <4 x i8> [[TMP4]] to <4 x i32>
; CHECK-NEXT: [[TMP6:%.*]] = call i32 @llvm.vector.reduce.or.v4i32(<4 x i32> [[TMP5]])
; CHECK-NEXT: ret i32 [[TMP6]]
;
entry:
br i1 %cond, label %bb2, label %bb3
bb2:
br label %bb3
bb3:
%phi0 = phi i8 [ %arg0, %bb2 ], [ 0, %entry ]
%phi1 = phi i8 [ %arg1, %bb2 ], [ undef, %entry ]
%phi2 = phi i8 [ %arg2, %bb2 ], [ undef, %entry ]
%phi3 = phi i8 [ %arg3, %bb2 ], [ undef, %entry ]
%zext0 = zext i8 %phi0 to i32
%zext1 = zext i8 %phi1 to i32
%zext2 = zext i8 %phi2 to i32
%zext3 = zext i8 %phi3 to i32
%or1 = or i32 %zext0, %zext1
%or2 = or i32 %or1, %zext2
%or3 = or i32 %or2, %zext3
ret i32 %or3
}
define i32 @phi2UndefInput(i1 %cond, i8 %arg0, i8 %arg1, i8 %arg2, i8 %arg3) {
; CHECK-LABEL: @phi2UndefInput(
; CHECK-NEXT: entry:
; CHECK-NEXT: br i1 [[COND:%.*]], label [[BB2:%.*]], label [[BB3:%.*]]
; CHECK: bb2:
; CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x i8> poison, i8 [[ARG0:%.*]], i32 0
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x i8> [[TMP0]], i8 [[ARG1:%.*]], i32 1
; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x i8> [[TMP1]], i8 [[ARG2:%.*]], i32 2
; CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x i8> [[TMP2]], i8 [[ARG3:%.*]], i32 3
; CHECK-NEXT: br label [[BB3]]
; CHECK: bb3:
; CHECK-NEXT: [[TMP4:%.*]] = phi <4 x i8> [ [[TMP3]], [[BB2]] ], [ <i8 0, i8 0, i8 poison, i8 poison>, [[ENTRY:%.*]] ]
; CHECK-NEXT: [[TMP5:%.*]] = zext <4 x i8> [[TMP4]] to <4 x i32>
; CHECK-NEXT: [[TMP6:%.*]] = call i32 @llvm.vector.reduce.or.v4i32(<4 x i32> [[TMP5]])
; CHECK-NEXT: ret i32 [[TMP6]]
;
entry:
br i1 %cond, label %bb2, label %bb3
bb2:
br label %bb3
bb3:
%phi0 = phi i8 [ %arg0, %bb2 ], [ 0, %entry ]
%phi1 = phi i8 [ %arg1, %bb2 ], [ 0, %entry ]
%phi2 = phi i8 [ %arg2, %bb2 ], [ undef, %entry ]
%phi3 = phi i8 [ %arg3, %bb2 ], [ undef, %entry ]
%zext0 = zext i8 %phi0 to i32
%zext1 = zext i8 %phi1 to i32
%zext2 = zext i8 %phi2 to i32
%zext3 = zext i8 %phi3 to i32
%or1 = or i32 %zext0, %zext1
%or2 = or i32 %or1, %zext2
%or3 = or i32 %or2, %zext3
ret i32 %or3
}
define i32 @phi1UndefInput(i1 %cond, i8 %arg0, i8 %arg1, i8 %arg2, i8 %arg3) {
; CHECK-LABEL: @phi1UndefInput(
; CHECK-NEXT: entry:
; CHECK-NEXT: br i1 [[COND:%.*]], label [[BB2:%.*]], label [[BB3:%.*]]
; CHECK: bb2:
; CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x i8> poison, i8 [[ARG0:%.*]], i32 0
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x i8> [[TMP0]], i8 [[ARG1:%.*]], i32 1
; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x i8> [[TMP1]], i8 [[ARG2:%.*]], i32 2
; CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x i8> [[TMP2]], i8 [[ARG3:%.*]], i32 3
; CHECK-NEXT: br label [[BB3]]
; CHECK: bb3:
; CHECK-NEXT: [[TMP4:%.*]] = phi <4 x i8> [ [[TMP3]], [[BB2]] ], [ <i8 0, i8 0, i8 0, i8 poison>, [[ENTRY:%.*]] ]
; CHECK-NEXT: [[TMP5:%.*]] = zext <4 x i8> [[TMP4]] to <4 x i32>
; CHECK-NEXT: [[TMP6:%.*]] = call i32 @llvm.vector.reduce.or.v4i32(<4 x i32> [[TMP5]])
; CHECK-NEXT: ret i32 [[TMP6]]
;
entry:
br i1 %cond, label %bb2, label %bb3
bb2:
br label %bb3
bb3:
%phi0 = phi i8 [ %arg0, %bb2 ], [ 0, %entry ]
%phi1 = phi i8 [ %arg1, %bb2 ], [ 0, %entry ]
%phi2 = phi i8 [ %arg2, %bb2 ], [ 0, %entry ]
%phi3 = phi i8 [ %arg3, %bb2 ], [ undef, %entry ]
%zext0 = zext i8 %phi0 to i32
%zext1 = zext i8 %phi1 to i32
%zext2 = zext i8 %phi2 to i32
%zext3 = zext i8 %phi3 to i32
%or1 = or i32 %zext0, %zext1
%or2 = or i32 %or1, %zext2
%or3 = or i32 %or2, %zext3
ret i32 %or3
}
define i32 @phi1Undef1PoisonInput(i1 %cond, i8 %arg0, i8 %arg1, i8 %arg2, i8 %arg3) {
; CHECK-LABEL: @phi1Undef1PoisonInput(
; CHECK-NEXT: entry:
; CHECK-NEXT: br i1 [[COND:%.*]], label [[BB2:%.*]], label [[BB3:%.*]]
; CHECK: bb2:
; CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x i8> poison, i8 [[ARG0:%.*]], i32 0
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x i8> [[TMP0]], i8 [[ARG1:%.*]], i32 1
; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x i8> [[TMP1]], i8 [[ARG2:%.*]], i32 2
; CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x i8> [[TMP2]], i8 [[ARG3:%.*]], i32 3
; CHECK-NEXT: br label [[BB3]]
; CHECK: bb3:
; CHECK-NEXT: [[TMP4:%.*]] = phi <4 x i8> [ [[TMP3]], [[BB2]] ], [ <i8 0, i8 0, i8 poison, i8 poison>, [[ENTRY:%.*]] ]
; CHECK-NEXT: [[TMP5:%.*]] = zext <4 x i8> [[TMP4]] to <4 x i32>
; CHECK-NEXT: [[TMP6:%.*]] = call i32 @llvm.vector.reduce.or.v4i32(<4 x i32> [[TMP5]])
; CHECK-NEXT: ret i32 [[TMP6]]
;
entry:
br i1 %cond, label %bb2, label %bb3
bb2:
br label %bb3
bb3:
%phi0 = phi i8 [ %arg0, %bb2 ], [ 0, %entry ]
%phi1 = phi i8 [ %arg1, %bb2 ], [ 0, %entry ]
%phi2 = phi i8 [ %arg2, %bb2 ], [ poison, %entry ]
%phi3 = phi i8 [ %arg3, %bb2 ], [ undef, %entry ]
%zext0 = zext i8 %phi0 to i32
%zext1 = zext i8 %phi1 to i32
%zext2 = zext i8 %phi2 to i32
%zext3 = zext i8 %phi3 to i32
%or1 = or i32 %zext0, %zext1
%or2 = or i32 %or1, %zext2
%or3 = or i32 %or2, %zext3
ret i32 %or3
}
define i32 @phi1Undef2PoisonInputs(i1 %cond, i8 %arg0, i8 %arg1, i8 %arg2, i8 %arg3) {
; CHECK-LABEL: @phi1Undef2PoisonInputs(
; CHECK-NEXT: entry:
; CHECK-NEXT: br i1 [[COND:%.*]], label [[BB2:%.*]], label [[BB3:%.*]]
; CHECK: bb2:
; CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x i8> poison, i8 [[ARG1:%.*]], i32 0
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x i8> [[TMP0]], i8 [[ARG0:%.*]], i32 1
; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x i8> [[TMP1]], i8 [[ARG2:%.*]], i32 2
; CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x i8> [[TMP2]], i8 [[ARG3:%.*]], i32 3
; CHECK-NEXT: br label [[BB3]]
; CHECK: bb3:
; CHECK-NEXT: [[TMP4:%.*]] = phi <4 x i8> [ [[TMP3]], [[BB2]] ], [ <i8 0, i8 poison, i8 poison, i8 poison>, [[ENTRY:%.*]] ]
; CHECK-NEXT: [[TMP5:%.*]] = zext <4 x i8> [[TMP4]] to <4 x i32>
; CHECK-NEXT: [[TMP6:%.*]] = call i32 @llvm.vector.reduce.or.v4i32(<4 x i32> [[TMP5]])
; CHECK-NEXT: ret i32 [[TMP6]]
;
entry:
br i1 %cond, label %bb2, label %bb3
bb2:
br label %bb3
bb3:
%phi0 = phi i8 [ %arg0, %bb2 ], [ poison, %entry ]
%phi1 = phi i8 [ %arg1, %bb2 ], [ 0, %entry ]
%phi2 = phi i8 [ %arg2, %bb2 ], [ poison, %entry ]
%phi3 = phi i8 [ %arg3, %bb2 ], [ undef, %entry ]
%zext0 = zext i8 %phi0 to i32
%zext1 = zext i8 %phi1 to i32
%zext2 = zext i8 %phi2 to i32
%zext3 = zext i8 %phi3 to i32
%or1 = or i32 %zext0, %zext1
%or2 = or i32 %or1, %zext2
%or3 = or i32 %or2, %zext3
ret i32 %or3
}
define i32 @phi1Undef1PoisonGapInput(i1 %cond, i8 %arg0, i8 %arg1, i8 %arg2, i8 %arg3) {
; CHECK-LABEL: @phi1Undef1PoisonGapInput(
; CHECK-NEXT: entry:
; CHECK-NEXT: br i1 [[COND:%.*]], label [[BB2:%.*]], label [[BB3:%.*]]
; CHECK: bb2:
; CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x i8> poison, i8 [[ARG1:%.*]], i32 0
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x i8> [[TMP0]], i8 [[ARG3:%.*]], i32 1
; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x i8> [[TMP1]], i8 [[ARG0:%.*]], i32 2
; CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x i8> [[TMP2]], i8 [[ARG2:%.*]], i32 3
; CHECK-NEXT: br label [[BB3]]
; CHECK: bb3:
; CHECK-NEXT: [[TMP4:%.*]] = phi <4 x i8> [ [[TMP3]], [[BB2]] ], [ <i8 0, i8 0, i8 poison, i8 poison>, [[ENTRY:%.*]] ]
; CHECK-NEXT: [[TMP5:%.*]] = zext <4 x i8> [[TMP4]] to <4 x i32>
; CHECK-NEXT: [[TMP6:%.*]] = call i32 @llvm.vector.reduce.or.v4i32(<4 x i32> [[TMP5]])
; CHECK-NEXT: ret i32 [[TMP6]]
;
entry:
br i1 %cond, label %bb2, label %bb3
bb2:
br label %bb3
bb3:
%phi0 = phi i8 [ %arg0, %bb2 ], [ poison, %entry ]
%phi1 = phi i8 [ %arg1, %bb2 ], [ 0, %entry ]
%phi2 = phi i8 [ %arg2, %bb2 ], [ undef, %entry ]
%phi3 = phi i8 [ %arg3, %bb2 ], [ 0, %entry ]
%zext0 = zext i8 %phi0 to i32
%zext1 = zext i8 %phi1 to i32
%zext2 = zext i8 %phi2 to i32
%zext3 = zext i8 %phi3 to i32
%or1 = or i32 %zext0, %zext1
%or2 = or i32 %or1, %zext2
%or3 = or i32 %or2, %zext3
ret i32 %or3
}