llvm-reduce: Fix asserting on undef virtual registers

[arsenm]

Summary

This was only populating the virtual register map for def operands
that appeared in the function, but that may not exist if there are
only undef uses.

[aeubanks]

llvm/test/tools/llvm-reduce/mir/undef-virt-reg.mir

9

extra the

[arsenm]

b4ace5da45672bbfa36c9adc74f5399d1ccd8a65

llvm/test/tools/llvm-reduce/mir/undef-virt-reg.mir

+# REQUIRES: amdgpu-registered-target
+# RUN: llvm-reduce -mtriple=amdgcn-amd-amdhsa --test FileCheck --test-arg --check-prefix=CHECK-INTERESTINGNESS --test-arg %s --test-arg --input-file %s -o %t 2> %t.log
+# RUN: FileCheck --match-full-lines --check-prefix=RESULT %s < %t
+
+# CHECK-INTERESTINGNESS: S_NOP 0
+
+# RESULT: S_ENDPGM 0, implicit undef %0:vgpr_32
+
+# Previously the the function clone would assert due to not preserving
+# virtual registers which had no defs.
+
+---
+name: undef_vreg_operand
+tracksRegLiveness: true
+body:             |
+  bb.0:
+    S_NOP 0
+    S_ENDPGM 0, implicit undef %0:vgpr_32
+
+...

llvm/tools/llvm-reduce/ReducerWorkItem.cpp

static std::unique_ptr<MachineFunction> cloneMF(MachineFunction *SrcMF) {
   auto *SrcMRI = &SrcMF->getRegInfo();
   auto *DstMRI = &DstMF->getRegInfo();
 
   // Create vregs.
   for (auto &SrcMBB : *SrcMF) {
     for (auto &SrcMI : SrcMBB) {
       for (unsigned I = 0, E = SrcMI.getNumOperands(); I < E; ++I) {
         auto &DMO = SrcMI.getOperand(I);
-        if (!DMO.isReg() || !DMO.isDef())
+        if (!DMO.isReg())
           continue;
         Register SrcReg = DMO.getReg();
         if (Register::isPhysicalRegister(SrcReg))
           continue;
         Register DstReg = DstMRI->createIncompleteVirtualRegister(
             SrcMRI->getVRegName(SrcReg));
         DstMRI->setRegClassOrRegBank(DstReg,
                                      SrcMRI->getRegClassOrRegBank(SrcReg));