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Differential D120337

[InstCombine] Remove one-use limitation from X-Y==0 fold
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Authored by nikic on Feb 22 2022, 9:04 AM.

Details

Reviewers
spatel
lebedev.ri
Commits
rG61580d0949fd: Reapply [InstCombine] Remove one-use limitation from X-Y==0 fold
rG65dc78d63ee2: [InstCombine] Remove one-use limitation from X-Y==0 fold
Summary

This one-use limitation is artificial, we do not increase instruction count if we fold it with multiple uses. The motivating case is shown in @sub_eq_zero_select, where the one-use limitation causes us to miss a subsequent select fold.

I believe the backend is pretty good about reusing flag-producing subs for cmps with same operands, so I think doing this is fine.

Diff Detail

Event Timeline

nikic created this revision.Feb 22 2022, 9:04 AM
Herald added a subscriber: hiraditya. · View Herald TranscriptFeb 22 2022, 9:04 AM
nikic requested review of this revision.Feb 22 2022, 9:04 AM
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spatel accepted this revision.Feb 22 2022, 10:09 AM

LGTM.

I think previous changes like this have exposed some shortcomings in IR analysis or possibly LSR, so I'd watch for fallout there too. No way to know for certain until we try. :)

This revision is now accepted and ready to land.Feb 22 2022, 10:09 AM
Harbormaster completed remote builds in B150888: Diff 410555.Feb 22 2022, 10:18 AM
This revision was landed with ongoing or failed builds.Feb 23 2022, 12:37 AM
Closed by commit rG65dc78d63ee2: [InstCombine] Remove one-use limitation from X-Y==0 fold (authored by nikic). · Explain Why
This revision was automatically updated to reflect the committed changes.
nikic added a commit: rG65dc78d63ee2: [InstCombine] Remove one-use limitation from X-Y==0 fold.
rnk added a subscriber: rnk.Feb 23 2022, 11:04 AM

We noticed that this change pushed a BPF probe program over the Linux kernel's BPF program size limit. I think that's fine, we don't make guarantees about the size of the final program, but it does indicate that your change may have increased code size more generally. I haven't done extensive performance testing, but I wouldn't be surprised if we find something during that process.

nikic added a comment.Feb 23 2022, 12:16 PM

It looks like this also causes a 7% code-size regression on tramp3d-v4: https://llvm-compile-time-tracker.com/compare.php?from=79353f940cf441e69f32af0a78a48baee89e8517&to=65dc78d63ee2eb20fbed54401091f08a685ef8c1&stat=size-text

So yeah, this clearly has some negative interactions that need to be addressed.

nikic added a reverting change: rGaa551ad19842: Revert "[InstCombine] Remove one-use limitation from X-Y==0 fold".Feb 23 2022, 11:59 PM
nikic added a comment.Feb 24 2022, 12:46 AM

I just looked into the code-size regression for tramp3d-v4, and what happens is that we're performing additional (desirable) jump-threading in many places, and in particular in @_ZN6EngineILi3Ed10MultiPatchI7GridTag6RemoteI5BrickEEED2Ev a redundant branch is eliminated entirely and the function shrinks by just enough to be eligible for inlining at hot call sites -- of which there are a lot, or at least LLVM thinks so.

As such, at least for the tramp3d-v4 case, it looks like this change is having a positive effect and just ends up crossing an inlining threshold.

nikic added a commit: rG61580d0949fd: Reapply [InstCombine] Remove one-use limitation from X-Y==0 fold.Mar 2 2022, 7:43 AM
Herald added a project: Restricted Project. · View Herald TranscriptMar 2 2022, 7:43 AM

Revision Contents

PathSize
llvm/
lib/
Transforms/
InstCombine/
10 lines
test/
Transforms/
InstCombine/
8 lines
6 lines
56 lines

Diff 410734

llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp

  • This file is larger than 256 KB, so syntax highlighting is disabled by default.
Show First 20 Lines • Show All 2,587 Lines • ▼ Show 20 LinesInstruction *InstCombinerImpl::foldICmpSubConstant(ICmpInst &Cmp,
ICmpInst::Predicate SwappedPred = Cmp.getSwappedPredicate(); ICmpInst::Predicate SwappedPred = Cmp.getSwappedPredicate();
bool HasNSW = Sub->hasNoSignedWrap(); bool HasNSW = Sub->hasNoSignedWrap();
bool HasNUW = Sub->hasNoUnsignedWrap(); bool HasNUW = Sub->hasNoUnsignedWrap();
if (match(X, m_APInt(C2)) && if (match(X, m_APInt(C2)) &&
((Cmp.isUnsigned() && HasNUW) || (Cmp.isSigned() && HasNSW)) && ((Cmp.isUnsigned() && HasNUW) || (Cmp.isSigned() && HasNSW)) &&
!subWithOverflow(SubResult, *C2, C, Cmp.isSigned())) !subWithOverflow(SubResult, *C2, C, Cmp.isSigned()))
return new ICmpInst(SwappedPred, Y, ConstantInt::get(Ty, SubResult)); return new ICmpInst(SwappedPred, Y, ConstantInt::get(Ty, SubResult));
// X - Y == 0 --> X == Y.
// X - Y != 0 --> X != Y.
if (Cmp.isEquality() && C.isZero())
return new ICmpInst(Pred, X, Y);
// The following transforms are only worth it if the only user of the subtract // The following transforms are only worth it if the only user of the subtract
// is the icmp. // is the icmp.
// TODO: This is an artificial restriction for all of the transforms below // TODO: This is an artificial restriction for all of the transforms below
// that only need a single replacement icmp. // that only need a single replacement icmp.
if (!Sub->hasOneUse()) if (!Sub->hasOneUse())
return nullptr; return nullptr;
// X - Y == 0 --> X == Y.
// X - Y != 0 --> X != Y.
if (Cmp.isEquality() && C.isZero())
return new ICmpInst(Pred, X, Y);
if (Sub->hasNoSignedWrap()) { if (Sub->hasNoSignedWrap()) {
// (icmp sgt (sub nsw X, Y), -1) -> (icmp sge X, Y) // (icmp sgt (sub nsw X, Y), -1) -> (icmp sge X, Y)
if (Pred == ICmpInst::ICMP_SGT && C.isAllOnes()) if (Pred == ICmpInst::ICMP_SGT && C.isAllOnes())
return new ICmpInst(ICmpInst::ICMP_SGE, X, Y); return new ICmpInst(ICmpInst::ICMP_SGE, X, Y);
// (icmp sgt (sub nsw X, Y), 0) -> (icmp sgt X, Y) // (icmp sgt (sub nsw X, Y), 0) -> (icmp sgt X, Y)
if (Pred == ICmpInst::ICMP_SGT && C.isZero()) if (Pred == ICmpInst::ICMP_SGT && C.isZero())
return new ICmpInst(ICmpInst::ICMP_SGT, X, Y); return new ICmpInst(ICmpInst::ICMP_SGT, X, Y);
▲ Show 20 Lines • Show All 4,088 Lines • Show Last 20 Lines

llvm/test/Transforms/InstCombine/icmp-sub.ll

Show First 20 Lines • Show All 461 Lines • ▼ Show 20 Lines;
%r = icmp sgt i8 %negx, 1 %r = icmp sgt i8 %negx, 1
ret i1 %r ret i1 %r
} }
define i1 @sub_eq_zero_use(i32 %x, i32 %y) { define i1 @sub_eq_zero_use(i32 %x, i32 %y) {
; CHECK-LABEL: @sub_eq_zero_use( ; CHECK-LABEL: @sub_eq_zero_use(
; CHECK-NEXT: [[SUB:%.*]] = sub i32 [[X:%.*]], [[Y:%.*]] ; CHECK-NEXT: [[SUB:%.*]] = sub i32 [[X:%.*]], [[Y:%.*]]
; CHECK-NEXT: call void @use(i32 [[SUB]]) ; CHECK-NEXT: call void @use(i32 [[SUB]])
; CHECK-NEXT: [[R:%.*]] = icmp eq i32 [[SUB]], 0 ; CHECK-NEXT: [[R:%.*]] = icmp eq i32 [[X]], [[Y]]
; CHECK-NEXT: ret i1 [[R]] ; CHECK-NEXT: ret i1 [[R]]
; ;
%sub = sub i32 %x, %y %sub = sub i32 %x, %y
call void @use(i32 %sub) call void @use(i32 %sub)
%r = icmp eq i32 %sub, 0 %r = icmp eq i32 %sub, 0
ret i1 %r ret i1 %r
} }
define <2 x i1> @sub_ne_zero_use(<2 x i8> %x, <2 x i8> %y) { define <2 x i1> @sub_ne_zero_use(<2 x i8> %x, <2 x i8> %y) {
; CHECK-LABEL: @sub_ne_zero_use( ; CHECK-LABEL: @sub_ne_zero_use(
; CHECK-NEXT: [[SUB:%.*]] = sub <2 x i8> [[X:%.*]], [[Y:%.*]] ; CHECK-NEXT: [[SUB:%.*]] = sub <2 x i8> [[X:%.*]], [[Y:%.*]]
; CHECK-NEXT: call void @use_vec(<2 x i8> [[SUB]]) ; CHECK-NEXT: call void @use_vec(<2 x i8> [[SUB]])
; CHECK-NEXT: [[R:%.*]] = icmp eq <2 x i8> [[SUB]], zeroinitializer ; CHECK-NEXT: [[R:%.*]] = icmp eq <2 x i8> [[X]], [[Y]]
; CHECK-NEXT: ret <2 x i1> [[R]] ; CHECK-NEXT: ret <2 x i1> [[R]]
; ;
%sub = sub <2 x i8> %x, %y %sub = sub <2 x i8> %x, %y
call void @use_vec(<2 x i8> %sub) call void @use_vec(<2 x i8> %sub)
%r = icmp eq <2 x i8> %sub, zeroinitializer %r = icmp eq <2 x i8> %sub, zeroinitializer
ret <2 x i1> %r ret <2 x i1> %r
} }
define i32 @sub_eq_zero_select(i32 %a, i32 %b, i32* %p) { define i32 @sub_eq_zero_select(i32 %a, i32 %b, i32* %p) {
; CHECK-LABEL: @sub_eq_zero_select( ; CHECK-LABEL: @sub_eq_zero_select(
; CHECK-NEXT: [[SUB:%.*]] = sub i32 [[A:%.*]], [[B:%.*]] ; CHECK-NEXT: [[SUB:%.*]] = sub i32 [[A:%.*]], [[B:%.*]]
; CHECK-NEXT: store i32 [[SUB]], i32* [[P:%.*]], align 4 ; CHECK-NEXT: store i32 [[SUB]], i32* [[P:%.*]], align 4
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[SUB]], 0 ; CHECK-NEXT: ret i32 [[B]]
; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i32 [[A]], i32 [[B]]
; CHECK-NEXT: ret i32 [[SEL]]
; ;
%sub = sub i32 %a, %b %sub = sub i32 %a, %b
store i32 %sub, i32* %p store i32 %sub, i32* %p
%cmp = icmp eq i32 %sub, 0 %cmp = icmp eq i32 %sub, 0
%sel = select i1 %cmp, i32 %a, i32 %b %sel = select i1 %cmp, i32 %a, i32 %b
ret i32 %sel ret i32 %sel
} }

llvm/test/Transforms/InstCombine/prevent-cmp-merge.ll

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%cmp2 = icmp eq i32 %xor, 32 %cmp2 = icmp eq i32 %xor, 32
%sel = xor i1 %cmp1, %cmp2 %sel = xor i1 %cmp1, %cmp2
ret i1 %sel ret i1 %sel
} }
define zeroext i1 @test3(i32 %lhs, i32 %rhs) { define zeroext i1 @test3(i32 %lhs, i32 %rhs) {
; CHECK-LABEL: @test3( ; CHECK-LABEL: @test3(
; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 [[LHS:%.*]], [[RHS:%.*]] ; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 [[LHS:%.*]], [[RHS:%.*]]
; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i32 [[SUB]], 0 ; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i32 [[LHS]], [[RHS]]
; CHECK-NEXT: [[CMP2:%.*]] = icmp eq i32 [[SUB]], 31 ; CHECK-NEXT: [[CMP2:%.*]] = icmp eq i32 [[SUB]], 31
; CHECK-NEXT: [[SEL:%.*]] = or i1 [[CMP1]], [[CMP2]] ; CHECK-NEXT: [[SEL:%.*]] = or i1 [[CMP1]], [[CMP2]]
; CHECK-NEXT: ret i1 [[SEL]] ; CHECK-NEXT: ret i1 [[SEL]]
; ;
%sub = sub nsw i32 %lhs, %rhs %sub = sub nsw i32 %lhs, %rhs
%cmp1 = icmp eq i32 %sub, 0 %cmp1 = icmp eq i32 %sub, 0
%cmp2 = icmp eq i32 %sub, 31 %cmp2 = icmp eq i32 %sub, 31
%sel = or i1 %cmp1, %cmp2 %sel = or i1 %cmp1, %cmp2
ret i1 %sel ret i1 %sel
} }
define zeroext i1 @test3_logical(i32 %lhs, i32 %rhs) { define zeroext i1 @test3_logical(i32 %lhs, i32 %rhs) {
; CHECK-LABEL: @test3_logical( ; CHECK-LABEL: @test3_logical(
; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 [[LHS:%.*]], [[RHS:%.*]] ; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 [[LHS:%.*]], [[RHS:%.*]]
; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i32 [[SUB]], 0 ; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i32 [[LHS]], [[RHS]]
; CHECK-NEXT: [[CMP2:%.*]] = icmp eq i32 [[SUB]], 31 ; CHECK-NEXT: [[CMP2:%.*]] = icmp eq i32 [[SUB]], 31
; CHECK-NEXT: [[SEL:%.*]] = or i1 [[CMP1]], [[CMP2]] ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP1]], i1 true, i1 [[CMP2]]
; CHECK-NEXT: ret i1 [[SEL]] ; CHECK-NEXT: ret i1 [[SEL]]
; ;
%sub = sub nsw i32 %lhs, %rhs %sub = sub nsw i32 %lhs, %rhs
%cmp1 = icmp eq i32 %sub, 0 %cmp1 = icmp eq i32 %sub, 0
%cmp2 = icmp eq i32 %sub, 31 %cmp2 = icmp eq i32 %sub, 31
%sel = select i1 %cmp1, i1 true, i1 %cmp2 %sel = select i1 %cmp1, i1 true, i1 %cmp2
ret i1 %sel ret i1 %sel
} }

llvm/test/Transforms/InstCombine/result-of-usub-is-non-zero-and-no-overflow.ll

Show All 16 Lines
; There is a number of base patterns.. ; There is a number of base patterns..
define i1 @t0_noncanonical_ignoreme(i8 %base, i8 %offset) { define i1 @t0_noncanonical_ignoreme(i8 %base, i8 %offset) {
; CHECK-LABEL: @t0_noncanonical_ignoreme( ; CHECK-LABEL: @t0_noncanonical_ignoreme(
; CHECK-NEXT: [[ADJUSTED:%.*]] = sub i8 [[BASE:%.*]], [[OFFSET:%.*]] ; CHECK-NEXT: [[ADJUSTED:%.*]] = sub i8 [[BASE:%.*]], [[OFFSET:%.*]]
; CHECK-NEXT: call void @use8(i8 [[ADJUSTED]]) ; CHECK-NEXT: call void @use8(i8 [[ADJUSTED]])
; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = icmp uge i8 [[BASE]], [[OFFSET]] ; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = icmp uge i8 [[BASE]], [[OFFSET]]
; CHECK-NEXT: call void @use1(i1 [[NO_UNDERFLOW]]) ; CHECK-NEXT: call void @use1(i1 [[NO_UNDERFLOW]])
; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i8 [[ADJUSTED]], 0 ; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i8 [[BASE]], [[OFFSET]]
; CHECK-NEXT: call void @use1(i1 [[NOT_NULL]]) ; CHECK-NEXT: call void @use1(i1 [[NOT_NULL]])
; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i8 [[BASE]], [[OFFSET]] ; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i8 [[BASE]], [[OFFSET]]
; CHECK-NEXT: ret i1 [[TMP1]] ; CHECK-NEXT: ret i1 [[TMP1]]
; ;
%adjusted = sub i8 %base, %offset %adjusted = sub i8 %base, %offset
call void @use8(i8 %adjusted) call void @use8(i8 %adjusted)
%no_underflow = icmp ule i8 %adjusted, %base %no_underflow = icmp ule i8 %adjusted, %base
call void @use1(i1 %no_underflow) call void @use1(i1 %no_underflow)
%not_null = icmp ne i8 %adjusted, 0 %not_null = icmp ne i8 %adjusted, 0
call void @use1(i1 %not_null) call void @use1(i1 %not_null)
%r = and i1 %not_null, %no_underflow %r = and i1 %not_null, %no_underflow
ret i1 %r ret i1 %r
} }
define i1 @t0_noncanonical_ignoreme_logical(i8 %base, i8 %offset) { define i1 @t0_noncanonical_ignoreme_logical(i8 %base, i8 %offset) {
; CHECK-LABEL: @t0_noncanonical_ignoreme_logical( ; CHECK-LABEL: @t0_noncanonical_ignoreme_logical(
; CHECK-NEXT: [[ADJUSTED:%.*]] = sub i8 [[BASE:%.*]], [[OFFSET:%.*]] ; CHECK-NEXT: [[ADJUSTED:%.*]] = sub i8 [[BASE:%.*]], [[OFFSET:%.*]]
; CHECK-NEXT: call void @use8(i8 [[ADJUSTED]]) ; CHECK-NEXT: call void @use8(i8 [[ADJUSTED]])
; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = icmp uge i8 [[BASE]], [[OFFSET]] ; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = icmp uge i8 [[BASE]], [[OFFSET]]
; CHECK-NEXT: call void @use1(i1 [[NO_UNDERFLOW]]) ; CHECK-NEXT: call void @use1(i1 [[NO_UNDERFLOW]])
; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i8 [[ADJUSTED]], 0 ; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i8 [[BASE]], [[OFFSET]]
; CHECK-NEXT: call void @use1(i1 [[NOT_NULL]]) ; CHECK-NEXT: call void @use1(i1 [[NOT_NULL]])
; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i8 [[BASE]], [[OFFSET]] ; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i8 [[BASE]], [[OFFSET]]
; CHECK-NEXT: ret i1 [[TMP1]] ; CHECK-NEXT: ret i1 [[TMP1]]
; ;
%adjusted = sub i8 %base, %offset %adjusted = sub i8 %base, %offset
call void @use8(i8 %adjusted) call void @use8(i8 %adjusted)
%no_underflow = icmp ule i8 %adjusted, %base %no_underflow = icmp ule i8 %adjusted, %base
call void @use1(i1 %no_underflow) call void @use1(i1 %no_underflow)
%not_null = icmp ne i8 %adjusted, 0 %not_null = icmp ne i8 %adjusted, 0
call void @use1(i1 %not_null) call void @use1(i1 %not_null)
%r = select i1 %not_null, i1 %no_underflow, i1 false %r = select i1 %not_null, i1 %no_underflow, i1 false
ret i1 %r ret i1 %r
} }
define i1 @t1(i8 %base, i8 %offset) { define i1 @t1(i8 %base, i8 %offset) {
; CHECK-LABEL: @t1( ; CHECK-LABEL: @t1(
; CHECK-NEXT: [[ADJUSTED:%.*]] = sub i8 [[BASE:%.*]], [[OFFSET:%.*]] ; CHECK-NEXT: [[ADJUSTED:%.*]] = sub i8 [[BASE:%.*]], [[OFFSET:%.*]]
; CHECK-NEXT: call void @use8(i8 [[ADJUSTED]]) ; CHECK-NEXT: call void @use8(i8 [[ADJUSTED]])
; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = icmp uge i8 [[BASE]], [[OFFSET]] ; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = icmp uge i8 [[BASE]], [[OFFSET]]
; CHECK-NEXT: call void @use1(i1 [[NO_UNDERFLOW]]) ; CHECK-NEXT: call void @use1(i1 [[NO_UNDERFLOW]])
; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i8 [[ADJUSTED]], 0 ; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i8 [[BASE]], [[OFFSET]]
; CHECK-NEXT: call void @use1(i1 [[NOT_NULL]]) ; CHECK-NEXT: call void @use1(i1 [[NOT_NULL]])
; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i8 [[BASE]], [[OFFSET]] ; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i8 [[BASE]], [[OFFSET]]
; CHECK-NEXT: ret i1 [[TMP1]] ; CHECK-NEXT: ret i1 [[TMP1]]
; ;
%adjusted = sub i8 %base, %offset %adjusted = sub i8 %base, %offset
call void @use8(i8 %adjusted) call void @use8(i8 %adjusted)
%no_underflow = icmp uge i8 %base, %offset %no_underflow = icmp uge i8 %base, %offset
call void @use1(i1 %no_underflow) call void @use1(i1 %no_underflow)
%not_null = icmp ne i8 %adjusted, 0 %not_null = icmp ne i8 %adjusted, 0
call void @use1(i1 %not_null) call void @use1(i1 %not_null)
%r = and i1 %not_null, %no_underflow %r = and i1 %not_null, %no_underflow
ret i1 %r ret i1 %r
} }
define i1 @t1_logical(i8 %base, i8 %offset) { define i1 @t1_logical(i8 %base, i8 %offset) {
; CHECK-LABEL: @t1_logical( ; CHECK-LABEL: @t1_logical(
; CHECK-NEXT: [[ADJUSTED:%.*]] = sub i8 [[BASE:%.*]], [[OFFSET:%.*]] ; CHECK-NEXT: [[ADJUSTED:%.*]] = sub i8 [[BASE:%.*]], [[OFFSET:%.*]]
; CHECK-NEXT: call void @use8(i8 [[ADJUSTED]]) ; CHECK-NEXT: call void @use8(i8 [[ADJUSTED]])
; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = icmp uge i8 [[BASE]], [[OFFSET]] ; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = icmp uge i8 [[BASE]], [[OFFSET]]
; CHECK-NEXT: call void @use1(i1 [[NO_UNDERFLOW]]) ; CHECK-NEXT: call void @use1(i1 [[NO_UNDERFLOW]])
; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i8 [[ADJUSTED]], 0 ; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i8 [[BASE]], [[OFFSET]]
; CHECK-NEXT: call void @use1(i1 [[NOT_NULL]]) ; CHECK-NEXT: call void @use1(i1 [[NOT_NULL]])
; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i8 [[BASE]], [[OFFSET]] ; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i8 [[BASE]], [[OFFSET]]
; CHECK-NEXT: ret i1 [[TMP1]] ; CHECK-NEXT: ret i1 [[TMP1]]
; ;
%adjusted = sub i8 %base, %offset %adjusted = sub i8 %base, %offset
call void @use8(i8 %adjusted) call void @use8(i8 %adjusted)
%no_underflow = icmp uge i8 %base, %offset %no_underflow = icmp uge i8 %base, %offset
call void @use1(i1 %no_underflow) call void @use1(i1 %no_underflow)
%not_null = icmp ne i8 %adjusted, 0 %not_null = icmp ne i8 %adjusted, 0
call void @use1(i1 %not_null) call void @use1(i1 %not_null)
%r = select i1 %not_null, i1 %no_underflow, i1 false %r = select i1 %not_null, i1 %no_underflow, i1 false
ret i1 %r ret i1 %r
} }
define i1 @t1_strict(i8 %base, i8 %offset) { define i1 @t1_strict(i8 %base, i8 %offset) {
; CHECK-LABEL: @t1_strict( ; CHECK-LABEL: @t1_strict(
; CHECK-NEXT: [[ADJUSTED:%.*]] = sub i8 [[BASE:%.*]], [[OFFSET:%.*]] ; CHECK-NEXT: [[ADJUSTED:%.*]] = sub i8 [[BASE:%.*]], [[OFFSET:%.*]]
; CHECK-NEXT: call void @use8(i8 [[ADJUSTED]]) ; CHECK-NEXT: call void @use8(i8 [[ADJUSTED]])
; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = icmp ugt i8 [[BASE]], [[OFFSET]] ; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = icmp ugt i8 [[BASE]], [[OFFSET]]
; CHECK-NEXT: call void @use1(i1 [[NO_UNDERFLOW]]) ; CHECK-NEXT: call void @use1(i1 [[NO_UNDERFLOW]])
; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i8 [[ADJUSTED]], 0 ; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i8 [[BASE]], [[OFFSET]]
; CHECK-NEXT: call void @use1(i1 [[NOT_NULL]]) ; CHECK-NEXT: call void @use1(i1 [[NOT_NULL]])
; CHECK-NEXT: ret i1 [[NO_UNDERFLOW]] ; CHECK-NEXT: ret i1 [[NO_UNDERFLOW]]
; ;
%adjusted = sub i8 %base, %offset %adjusted = sub i8 %base, %offset
call void @use8(i8 %adjusted) call void @use8(i8 %adjusted)
%no_underflow = icmp ugt i8 %base, %offset ; same is valid for strict predicate %no_underflow = icmp ugt i8 %base, %offset ; same is valid for strict predicate
call void @use1(i1 %no_underflow) call void @use1(i1 %no_underflow)
%not_null = icmp ne i8 %adjusted, 0 %not_null = icmp ne i8 %adjusted, 0
call void @use1(i1 %not_null) call void @use1(i1 %not_null)
%r = and i1 %not_null, %no_underflow %r = and i1 %not_null, %no_underflow
ret i1 %r ret i1 %r
} }
define i1 @t1_strict_logical(i8 %base, i8 %offset) { define i1 @t1_strict_logical(i8 %base, i8 %offset) {
; CHECK-LABEL: @t1_strict_logical( ; CHECK-LABEL: @t1_strict_logical(
; CHECK-NEXT: [[ADJUSTED:%.*]] = sub i8 [[BASE:%.*]], [[OFFSET:%.*]] ; CHECK-NEXT: [[ADJUSTED:%.*]] = sub i8 [[BASE:%.*]], [[OFFSET:%.*]]
; CHECK-NEXT: call void @use8(i8 [[ADJUSTED]]) ; CHECK-NEXT: call void @use8(i8 [[ADJUSTED]])
; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = icmp ugt i8 [[BASE]], [[OFFSET]] ; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = icmp ugt i8 [[BASE]], [[OFFSET]]
; CHECK-NEXT: call void @use1(i1 [[NO_UNDERFLOW]]) ; CHECK-NEXT: call void @use1(i1 [[NO_UNDERFLOW]])
; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i8 [[ADJUSTED]], 0 ; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i8 [[BASE]], [[OFFSET]]
; CHECK-NEXT: call void @use1(i1 [[NOT_NULL]]) ; CHECK-NEXT: call void @use1(i1 [[NOT_NULL]])
; CHECK-NEXT: ret i1 [[NO_UNDERFLOW]] ; CHECK-NEXT: ret i1 [[NO_UNDERFLOW]]
; ;
%adjusted = sub i8 %base, %offset %adjusted = sub i8 %base, %offset
call void @use8(i8 %adjusted) call void @use8(i8 %adjusted)
%no_underflow = icmp ugt i8 %base, %offset ; same is valid for strict predicate %no_underflow = icmp ugt i8 %base, %offset ; same is valid for strict predicate
call void @use1(i1 %no_underflow) call void @use1(i1 %no_underflow)
%not_null = icmp ne i8 %adjusted, 0 %not_null = icmp ne i8 %adjusted, 0
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; Commutativity ; Commutativity
define i1 @t3_commutability0(i8 %base, i8 %offset) { define i1 @t3_commutability0(i8 %base, i8 %offset) {
; CHECK-LABEL: @t3_commutability0( ; CHECK-LABEL: @t3_commutability0(
; CHECK-NEXT: [[ADJUSTED:%.*]] = sub i8 [[BASE:%.*]], [[OFFSET:%.*]] ; CHECK-NEXT: [[ADJUSTED:%.*]] = sub i8 [[BASE:%.*]], [[OFFSET:%.*]]
; CHECK-NEXT: call void @use8(i8 [[ADJUSTED]]) ; CHECK-NEXT: call void @use8(i8 [[ADJUSTED]])
; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = icmp uge i8 [[BASE]], [[OFFSET]] ; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = icmp uge i8 [[BASE]], [[OFFSET]]
; CHECK-NEXT: call void @use1(i1 [[NO_UNDERFLOW]]) ; CHECK-NEXT: call void @use1(i1 [[NO_UNDERFLOW]])
; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i8 [[ADJUSTED]], 0 ; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i8 [[BASE]], [[OFFSET]]
; CHECK-NEXT: call void @use1(i1 [[NOT_NULL]]) ; CHECK-NEXT: call void @use1(i1 [[NOT_NULL]])
; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i8 [[BASE]], [[OFFSET]] ; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i8 [[BASE]], [[OFFSET]]
; CHECK-NEXT: ret i1 [[TMP1]] ; CHECK-NEXT: ret i1 [[TMP1]]
; ;
%adjusted = sub i8 %base, %offset %adjusted = sub i8 %base, %offset
call void @use8(i8 %adjusted) call void @use8(i8 %adjusted)
%no_underflow = icmp ule i8 %offset, %base ; swapped %no_underflow = icmp ule i8 %offset, %base ; swapped
call void @use1(i1 %no_underflow) call void @use1(i1 %no_underflow)
%not_null = icmp ne i8 %adjusted, 0 %not_null = icmp ne i8 %adjusted, 0
call void @use1(i1 %not_null) call void @use1(i1 %not_null)
%r = and i1 %not_null, %no_underflow %r = and i1 %not_null, %no_underflow
ret i1 %r ret i1 %r
} }
define i1 @t3_commutability0_logical(i8 %base, i8 %offset) { define i1 @t3_commutability0_logical(i8 %base, i8 %offset) {
; CHECK-LABEL: @t3_commutability0_logical( ; CHECK-LABEL: @t3_commutability0_logical(
; CHECK-NEXT: [[ADJUSTED:%.*]] = sub i8 [[BASE:%.*]], [[OFFSET:%.*]] ; CHECK-NEXT: [[ADJUSTED:%.*]] = sub i8 [[BASE:%.*]], [[OFFSET:%.*]]
; CHECK-NEXT: call void @use8(i8 [[ADJUSTED]]) ; CHECK-NEXT: call void @use8(i8 [[ADJUSTED]])
; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = icmp uge i8 [[BASE]], [[OFFSET]] ; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = icmp uge i8 [[BASE]], [[OFFSET]]
; CHECK-NEXT: call void @use1(i1 [[NO_UNDERFLOW]]) ; CHECK-NEXT: call void @use1(i1 [[NO_UNDERFLOW]])
; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i8 [[ADJUSTED]], 0 ; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i8 [[BASE]], [[OFFSET]]
; CHECK-NEXT: call void @use1(i1 [[NOT_NULL]]) ; CHECK-NEXT: call void @use1(i1 [[NOT_NULL]])
; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i8 [[BASE]], [[OFFSET]] ; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i8 [[BASE]], [[OFFSET]]
; CHECK-NEXT: ret i1 [[TMP1]] ; CHECK-NEXT: ret i1 [[TMP1]]
; ;
%adjusted = sub i8 %base, %offset %adjusted = sub i8 %base, %offset
call void @use8(i8 %adjusted) call void @use8(i8 %adjusted)
%no_underflow = icmp ule i8 %offset, %base ; swapped %no_underflow = icmp ule i8 %offset, %base ; swapped
call void @use1(i1 %no_underflow) call void @use1(i1 %no_underflow)
%not_null = icmp ne i8 %adjusted, 0 %not_null = icmp ne i8 %adjusted, 0
call void @use1(i1 %not_null) call void @use1(i1 %not_null)
%r = select i1 %not_null, i1 %no_underflow, i1 false %r = select i1 %not_null, i1 %no_underflow, i1 false
ret i1 %r ret i1 %r
} }
define i1 @t4_commutability1(i8 %base, i8 %offset) { define i1 @t4_commutability1(i8 %base, i8 %offset) {
; CHECK-LABEL: @t4_commutability1( ; CHECK-LABEL: @t4_commutability1(
; CHECK-NEXT: [[ADJUSTED:%.*]] = sub i8 [[BASE:%.*]], [[OFFSET:%.*]] ; CHECK-NEXT: [[ADJUSTED:%.*]] = sub i8 [[BASE:%.*]], [[OFFSET:%.*]]
; CHECK-NEXT: call void @use8(i8 [[ADJUSTED]]) ; CHECK-NEXT: call void @use8(i8 [[ADJUSTED]])
; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = icmp uge i8 [[BASE]], [[OFFSET]] ; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = icmp uge i8 [[BASE]], [[OFFSET]]
; CHECK-NEXT: call void @use1(i1 [[NO_UNDERFLOW]]) ; CHECK-NEXT: call void @use1(i1 [[NO_UNDERFLOW]])
; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i8 [[ADJUSTED]], 0 ; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i8 [[BASE]], [[OFFSET]]
; CHECK-NEXT: call void @use1(i1 [[NOT_NULL]]) ; CHECK-NEXT: call void @use1(i1 [[NOT_NULL]])
; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i8 [[BASE]], [[OFFSET]] ; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i8 [[BASE]], [[OFFSET]]
; CHECK-NEXT: ret i1 [[TMP1]] ; CHECK-NEXT: ret i1 [[TMP1]]
; ;
%adjusted = sub i8 %base, %offset %adjusted = sub i8 %base, %offset
call void @use8(i8 %adjusted) call void @use8(i8 %adjusted)
%no_underflow = icmp uge i8 %base, %offset %no_underflow = icmp uge i8 %base, %offset
call void @use1(i1 %no_underflow) call void @use1(i1 %no_underflow)
%not_null = icmp ne i8 %adjusted, 0 %not_null = icmp ne i8 %adjusted, 0
call void @use1(i1 %not_null) call void @use1(i1 %not_null)
%r = and i1 %no_underflow, %not_null ; swapped %r = and i1 %no_underflow, %not_null ; swapped
ret i1 %r ret i1 %r
} }
define i1 @t4_commutability1_logical(i8 %base, i8 %offset) { define i1 @t4_commutability1_logical(i8 %base, i8 %offset) {
; CHECK-LABEL: @t4_commutability1_logical( ; CHECK-LABEL: @t4_commutability1_logical(
; CHECK-NEXT: [[ADJUSTED:%.*]] = sub i8 [[BASE:%.*]], [[OFFSET:%.*]] ; CHECK-NEXT: [[ADJUSTED:%.*]] = sub i8 [[BASE:%.*]], [[OFFSET:%.*]]
; CHECK-NEXT: call void @use8(i8 [[ADJUSTED]]) ; CHECK-NEXT: call void @use8(i8 [[ADJUSTED]])
; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = icmp uge i8 [[BASE]], [[OFFSET]] ; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = icmp uge i8 [[BASE]], [[OFFSET]]
; CHECK-NEXT: call void @use1(i1 [[NO_UNDERFLOW]]) ; CHECK-NEXT: call void @use1(i1 [[NO_UNDERFLOW]])
; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i8 [[ADJUSTED]], 0 ; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i8 [[BASE]], [[OFFSET]]
; CHECK-NEXT: call void @use1(i1 [[NOT_NULL]]) ; CHECK-NEXT: call void @use1(i1 [[NOT_NULL]])
; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i8 [[BASE]], [[OFFSET]] ; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i8 [[BASE]], [[OFFSET]]
; CHECK-NEXT: ret i1 [[TMP1]] ; CHECK-NEXT: ret i1 [[TMP1]]
; ;
%adjusted = sub i8 %base, %offset %adjusted = sub i8 %base, %offset
call void @use8(i8 %adjusted) call void @use8(i8 %adjusted)
%no_underflow = icmp uge i8 %base, %offset %no_underflow = icmp uge i8 %base, %offset
call void @use1(i1 %no_underflow) call void @use1(i1 %no_underflow)
%not_null = icmp ne i8 %adjusted, 0 %not_null = icmp ne i8 %adjusted, 0
call void @use1(i1 %not_null) call void @use1(i1 %not_null)
%r = select i1 %no_underflow, i1 %not_null, i1 false ; swapped %r = select i1 %no_underflow, i1 %not_null, i1 false ; swapped
ret i1 %r ret i1 %r
} }
define i1 @t5_commutability2(i8 %base, i8 %offset) { define i1 @t5_commutability2(i8 %base, i8 %offset) {
; CHECK-LABEL: @t5_commutability2( ; CHECK-LABEL: @t5_commutability2(
; CHECK-NEXT: [[ADJUSTED:%.*]] = sub i8 [[BASE:%.*]], [[OFFSET:%.*]] ; CHECK-NEXT: [[ADJUSTED:%.*]] = sub i8 [[BASE:%.*]], [[OFFSET:%.*]]
; CHECK-NEXT: call void @use8(i8 [[ADJUSTED]]) ; CHECK-NEXT: call void @use8(i8 [[ADJUSTED]])
; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = icmp uge i8 [[BASE]], [[OFFSET]] ; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = icmp uge i8 [[BASE]], [[OFFSET]]
; CHECK-NEXT: call void @use1(i1 [[NO_UNDERFLOW]]) ; CHECK-NEXT: call void @use1(i1 [[NO_UNDERFLOW]])
; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i8 [[ADJUSTED]], 0 ; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i8 [[BASE]], [[OFFSET]]
; CHECK-NEXT: call void @use1(i1 [[NOT_NULL]]) ; CHECK-NEXT: call void @use1(i1 [[NOT_NULL]])
; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i8 [[BASE]], [[OFFSET]] ; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i8 [[BASE]], [[OFFSET]]
; CHECK-NEXT: ret i1 [[TMP1]] ; CHECK-NEXT: ret i1 [[TMP1]]
; ;
%adjusted = sub i8 %base, %offset %adjusted = sub i8 %base, %offset
call void @use8(i8 %adjusted) call void @use8(i8 %adjusted)
%no_underflow = icmp ule i8 %offset, %base ; swapped %no_underflow = icmp ule i8 %offset, %base ; swapped
call void @use1(i1 %no_underflow) call void @use1(i1 %no_underflow)
%not_null = icmp ne i8 %adjusted, 0 %not_null = icmp ne i8 %adjusted, 0
call void @use1(i1 %not_null) call void @use1(i1 %not_null)
%r = and i1 %no_underflow, %not_null ; swapped %r = and i1 %no_underflow, %not_null ; swapped
ret i1 %r ret i1 %r
} }
define i1 @t5_commutability2_logical(i8 %base, i8 %offset) { define i1 @t5_commutability2_logical(i8 %base, i8 %offset) {
; CHECK-LABEL: @t5_commutability2_logical( ; CHECK-LABEL: @t5_commutability2_logical(
; CHECK-NEXT: [[ADJUSTED:%.*]] = sub i8 [[BASE:%.*]], [[OFFSET:%.*]] ; CHECK-NEXT: [[ADJUSTED:%.*]] = sub i8 [[BASE:%.*]], [[OFFSET:%.*]]
; CHECK-NEXT: call void @use8(i8 [[ADJUSTED]]) ; CHECK-NEXT: call void @use8(i8 [[ADJUSTED]])
; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = icmp uge i8 [[BASE]], [[OFFSET]] ; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = icmp uge i8 [[BASE]], [[OFFSET]]
; CHECK-NEXT: call void @use1(i1 [[NO_UNDERFLOW]]) ; CHECK-NEXT: call void @use1(i1 [[NO_UNDERFLOW]])
; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i8 [[ADJUSTED]], 0 ; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i8 [[BASE]], [[OFFSET]]
; CHECK-NEXT: call void @use1(i1 [[NOT_NULL]]) ; CHECK-NEXT: call void @use1(i1 [[NOT_NULL]])
; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i8 [[BASE]], [[OFFSET]] ; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i8 [[BASE]], [[OFFSET]]
; CHECK-NEXT: ret i1 [[TMP1]] ; CHECK-NEXT: ret i1 [[TMP1]]
; ;
%adjusted = sub i8 %base, %offset %adjusted = sub i8 %base, %offset
call void @use8(i8 %adjusted) call void @use8(i8 %adjusted)
%no_underflow = icmp ule i8 %offset, %base ; swapped %no_underflow = icmp ule i8 %offset, %base ; swapped
call void @use1(i1 %no_underflow) call void @use1(i1 %no_underflow)
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; or overflow happened? ; or overflow happened?
define i1 @t7(i8 %base, i8 %offset) { define i1 @t7(i8 %base, i8 %offset) {
; CHECK-LABEL: @t7( ; CHECK-LABEL: @t7(
; CHECK-NEXT: [[ADJUSTED:%.*]] = sub i8 [[BASE:%.*]], [[OFFSET:%.*]] ; CHECK-NEXT: [[ADJUSTED:%.*]] = sub i8 [[BASE:%.*]], [[OFFSET:%.*]]
; CHECK-NEXT: call void @use8(i8 [[ADJUSTED]]) ; CHECK-NEXT: call void @use8(i8 [[ADJUSTED]])
; CHECK-NEXT: [[UNDERFLOW:%.*]] = icmp ult i8 [[BASE]], [[OFFSET]] ; CHECK-NEXT: [[UNDERFLOW:%.*]] = icmp ult i8 [[BASE]], [[OFFSET]]
; CHECK-NEXT: call void @use1(i1 [[UNDERFLOW]]) ; CHECK-NEXT: call void @use1(i1 [[UNDERFLOW]])
; CHECK-NEXT: [[NULL:%.*]] = icmp eq i8 [[ADJUSTED]], 0 ; CHECK-NEXT: [[NULL:%.*]] = icmp eq i8 [[BASE]], [[OFFSET]]
; CHECK-NEXT: call void @use1(i1 [[NULL]]) ; CHECK-NEXT: call void @use1(i1 [[NULL]])
; CHECK-NEXT: [[TMP1:%.*]] = icmp ule i8 [[BASE]], [[OFFSET]] ; CHECK-NEXT: [[TMP1:%.*]] = icmp ule i8 [[BASE]], [[OFFSET]]
; CHECK-NEXT: ret i1 [[TMP1]] ; CHECK-NEXT: ret i1 [[TMP1]]
; ;
%adjusted = sub i8 %base, %offset %adjusted = sub i8 %base, %offset
call void @use8(i8 %adjusted) call void @use8(i8 %adjusted)
%underflow = icmp ult i8 %base, %offset %underflow = icmp ult i8 %base, %offset
call void @use1(i1 %underflow) call void @use1(i1 %underflow)
%null = icmp eq i8 %adjusted, 0 %null = icmp eq i8 %adjusted, 0
call void @use1(i1 %null) call void @use1(i1 %null)
%r = or i1 %null, %underflow %r = or i1 %null, %underflow
ret i1 %r ret i1 %r
} }
define i1 @t7_logical(i8 %base, i8 %offset) { define i1 @t7_logical(i8 %base, i8 %offset) {
; CHECK-LABEL: @t7_logical( ; CHECK-LABEL: @t7_logical(
; CHECK-NEXT: [[ADJUSTED:%.*]] = sub i8 [[BASE:%.*]], [[OFFSET:%.*]] ; CHECK-NEXT: [[ADJUSTED:%.*]] = sub i8 [[BASE:%.*]], [[OFFSET:%.*]]
; CHECK-NEXT: call void @use8(i8 [[ADJUSTED]]) ; CHECK-NEXT: call void @use8(i8 [[ADJUSTED]])
; CHECK-NEXT: [[UNDERFLOW:%.*]] = icmp ult i8 [[BASE]], [[OFFSET]] ; CHECK-NEXT: [[UNDERFLOW:%.*]] = icmp ult i8 [[BASE]], [[OFFSET]]
; CHECK-NEXT: call void @use1(i1 [[UNDERFLOW]]) ; CHECK-NEXT: call void @use1(i1 [[UNDERFLOW]])
; CHECK-NEXT: [[NULL:%.*]] = icmp eq i8 [[ADJUSTED]], 0 ; CHECK-NEXT: [[NULL:%.*]] = icmp eq i8 [[BASE]], [[OFFSET]]
; CHECK-NEXT: call void @use1(i1 [[NULL]]) ; CHECK-NEXT: call void @use1(i1 [[NULL]])
; CHECK-NEXT: [[TMP1:%.*]] = icmp ule i8 [[BASE]], [[OFFSET]] ; CHECK-NEXT: [[TMP1:%.*]] = icmp ule i8 [[BASE]], [[OFFSET]]
; CHECK-NEXT: ret i1 [[TMP1]] ; CHECK-NEXT: ret i1 [[TMP1]]
; ;
%adjusted = sub i8 %base, %offset %adjusted = sub i8 %base, %offset
call void @use8(i8 %adjusted) call void @use8(i8 %adjusted)
%underflow = icmp ult i8 %base, %offset %underflow = icmp ult i8 %base, %offset
call void @use1(i1 %underflow) call void @use1(i1 %underflow)
%null = icmp eq i8 %adjusted, 0 %null = icmp eq i8 %adjusted, 0
call void @use1(i1 %null) call void @use1(i1 %null)
%r = select i1 %null, i1 true, i1 %underflow %r = select i1 %null, i1 true, i1 %underflow
ret i1 %r ret i1 %r
} }
define i1 @t7_nonstrict(i8 %base, i8 %offset) { define i1 @t7_nonstrict(i8 %base, i8 %offset) {
; CHECK-LABEL: @t7_nonstrict( ; CHECK-LABEL: @t7_nonstrict(
; CHECK-NEXT: [[ADJUSTED:%.*]] = sub i8 [[BASE:%.*]], [[OFFSET:%.*]] ; CHECK-NEXT: [[ADJUSTED:%.*]] = sub i8 [[BASE:%.*]], [[OFFSET:%.*]]
; CHECK-NEXT: call void @use8(i8 [[ADJUSTED]]) ; CHECK-NEXT: call void @use8(i8 [[ADJUSTED]])
; CHECK-NEXT: [[UNDERFLOW:%.*]] = icmp ule i8 [[BASE]], [[OFFSET]] ; CHECK-NEXT: [[UNDERFLOW:%.*]] = icmp ule i8 [[BASE]], [[OFFSET]]
; CHECK-NEXT: call void @use1(i1 [[UNDERFLOW]]) ; CHECK-NEXT: call void @use1(i1 [[UNDERFLOW]])
; CHECK-NEXT: [[NULL:%.*]] = icmp eq i8 [[ADJUSTED]], 0 ; CHECK-NEXT: [[NULL:%.*]] = icmp eq i8 [[BASE]], [[OFFSET]]
; CHECK-NEXT: call void @use1(i1 [[NULL]]) ; CHECK-NEXT: call void @use1(i1 [[NULL]])
; CHECK-NEXT: ret i1 [[UNDERFLOW]] ; CHECK-NEXT: ret i1 [[UNDERFLOW]]
; ;
%adjusted = sub i8 %base, %offset %adjusted = sub i8 %base, %offset
call void @use8(i8 %adjusted) call void @use8(i8 %adjusted)
%underflow = icmp ule i8 %base, %offset ; same is valid for non-strict predicate %underflow = icmp ule i8 %base, %offset ; same is valid for non-strict predicate
call void @use1(i1 %underflow) call void @use1(i1 %underflow)
%null = icmp eq i8 %adjusted, 0 %null = icmp eq i8 %adjusted, 0
call void @use1(i1 %null) call void @use1(i1 %null)
%r = or i1 %null, %underflow %r = or i1 %null, %underflow
ret i1 %r ret i1 %r
} }
define i1 @t7_nonstrict_logical(i8 %base, i8 %offset) { define i1 @t7_nonstrict_logical(i8 %base, i8 %offset) {
; CHECK-LABEL: @t7_nonstrict_logical( ; CHECK-LABEL: @t7_nonstrict_logical(
; CHECK-NEXT: [[ADJUSTED:%.*]] = sub i8 [[BASE:%.*]], [[OFFSET:%.*]] ; CHECK-NEXT: [[ADJUSTED:%.*]] = sub i8 [[BASE:%.*]], [[OFFSET:%.*]]
; CHECK-NEXT: call void @use8(i8 [[ADJUSTED]]) ; CHECK-NEXT: call void @use8(i8 [[ADJUSTED]])
; CHECK-NEXT: [[UNDERFLOW:%.*]] = icmp ule i8 [[BASE]], [[OFFSET]] ; CHECK-NEXT: [[UNDERFLOW:%.*]] = icmp ule i8 [[BASE]], [[OFFSET]]
; CHECK-NEXT: call void @use1(i1 [[UNDERFLOW]]) ; CHECK-NEXT: call void @use1(i1 [[UNDERFLOW]])
; CHECK-NEXT: [[NULL:%.*]] = icmp eq i8 [[ADJUSTED]], 0 ; CHECK-NEXT: [[NULL:%.*]] = icmp eq i8 [[BASE]], [[OFFSET]]
; CHECK-NEXT: call void @use1(i1 [[NULL]]) ; CHECK-NEXT: call void @use1(i1 [[NULL]])
; CHECK-NEXT: ret i1 [[UNDERFLOW]] ; CHECK-NEXT: ret i1 [[UNDERFLOW]]
; ;
%adjusted = sub i8 %base, %offset %adjusted = sub i8 %base, %offset
call void @use8(i8 %adjusted) call void @use8(i8 %adjusted)
%underflow = icmp ule i8 %base, %offset ; same is valid for non-strict predicate %underflow = icmp ule i8 %base, %offset ; same is valid for non-strict predicate
call void @use1(i1 %underflow) call void @use1(i1 %underflow)
%null = icmp eq i8 %adjusted, 0 %null = icmp eq i8 %adjusted, 0
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; And these patterns also have commutative variants ; And these patterns also have commutative variants
define i1 @t9_commutative(i8 %base, i8 %offset) { define i1 @t9_commutative(i8 %base, i8 %offset) {
; CHECK-LABEL: @t9_commutative( ; CHECK-LABEL: @t9_commutative(
; CHECK-NEXT: [[ADJUSTED:%.*]] = sub i8 [[BASE:%.*]], [[OFFSET:%.*]] ; CHECK-NEXT: [[ADJUSTED:%.*]] = sub i8 [[BASE:%.*]], [[OFFSET:%.*]]
; CHECK-NEXT: call void @use8(i8 [[ADJUSTED]]) ; CHECK-NEXT: call void @use8(i8 [[ADJUSTED]])
; CHECK-NEXT: [[UNDERFLOW:%.*]] = icmp ult i8 [[BASE]], [[OFFSET]] ; CHECK-NEXT: [[UNDERFLOW:%.*]] = icmp ult i8 [[BASE]], [[OFFSET]]
; CHECK-NEXT: call void @use1(i1 [[UNDERFLOW]]) ; CHECK-NEXT: call void @use1(i1 [[UNDERFLOW]])
; CHECK-NEXT: [[NULL:%.*]] = icmp eq i8 [[ADJUSTED]], 0 ; CHECK-NEXT: [[NULL:%.*]] = icmp eq i8 [[BASE]], [[OFFSET]]
; CHECK-NEXT: call void @use1(i1 [[NULL]]) ; CHECK-NEXT: call void @use1(i1 [[NULL]])
; CHECK-NEXT: [[TMP1:%.*]] = icmp ule i8 [[BASE]], [[OFFSET]] ; CHECK-NEXT: [[TMP1:%.*]] = icmp ule i8 [[BASE]], [[OFFSET]]
; CHECK-NEXT: ret i1 [[TMP1]] ; CHECK-NEXT: ret i1 [[TMP1]]
; ;
%adjusted = sub i8 %base, %offset %adjusted = sub i8 %base, %offset
call void @use8(i8 %adjusted) call void @use8(i8 %adjusted)
%underflow = icmp ult i8 %base, %adjusted ; swapped %underflow = icmp ult i8 %base, %adjusted ; swapped
call void @use1(i1 %underflow) call void @use1(i1 %underflow)
%null = icmp eq i8 %adjusted, 0 %null = icmp eq i8 %adjusted, 0
call void @use1(i1 %null) call void @use1(i1 %null)
%r = or i1 %null, %underflow %r = or i1 %null, %underflow
ret i1 %r ret i1 %r
} }
define i1 @t9_commutative_logical(i8 %base, i8 %offset) { define i1 @t9_commutative_logical(i8 %base, i8 %offset) {
; CHECK-LABEL: @t9_commutative_logical( ; CHECK-LABEL: @t9_commutative_logical(
; CHECK-NEXT: [[ADJUSTED:%.*]] = sub i8 [[BASE:%.*]], [[OFFSET:%.*]] ; CHECK-NEXT: [[ADJUSTED:%.*]] = sub i8 [[BASE:%.*]], [[OFFSET:%.*]]
; CHECK-NEXT: call void @use8(i8 [[ADJUSTED]]) ; CHECK-NEXT: call void @use8(i8 [[ADJUSTED]])
; CHECK-NEXT: [[UNDERFLOW:%.*]] = icmp ult i8 [[BASE]], [[OFFSET]] ; CHECK-NEXT: [[UNDERFLOW:%.*]] = icmp ult i8 [[BASE]], [[OFFSET]]
; CHECK-NEXT: call void @use1(i1 [[UNDERFLOW]]) ; CHECK-NEXT: call void @use1(i1 [[UNDERFLOW]])
; CHECK-NEXT: [[NULL:%.*]] = icmp eq i8 [[ADJUSTED]], 0 ; CHECK-NEXT: [[NULL:%.*]] = icmp eq i8 [[BASE]], [[OFFSET]]
; CHECK-NEXT: call void @use1(i1 [[NULL]]) ; CHECK-NEXT: call void @use1(i1 [[NULL]])
; CHECK-NEXT: [[TMP1:%.*]] = icmp ule i8 [[BASE]], [[OFFSET]] ; CHECK-NEXT: [[TMP1:%.*]] = icmp ule i8 [[BASE]], [[OFFSET]]
; CHECK-NEXT: ret i1 [[TMP1]] ; CHECK-NEXT: ret i1 [[TMP1]]
; ;
%adjusted = sub i8 %base, %offset %adjusted = sub i8 %base, %offset
call void @use8(i8 %adjusted) call void @use8(i8 %adjusted)
%underflow = icmp ult i8 %base, %adjusted ; swapped %underflow = icmp ult i8 %base, %adjusted ; swapped
call void @use1(i1 %underflow) call void @use1(i1 %underflow)
%null = icmp eq i8 %adjusted, 0 %null = icmp eq i8 %adjusted, 0
call void @use1(i1 %null) call void @use1(i1 %null)
%r = select i1 %null, i1 true, i1 %underflow %r = select i1 %null, i1 true, i1 %underflow
ret i1 %r ret i1 %r
} }
;------------------------------------------------------------------------------- ;-------------------------------------------------------------------------------
define i1 @t10(i64 %base, i64* nonnull %offsetptr) { define i1 @t10(i64 %base, i64* nonnull %offsetptr) {
; CHECK-LABEL: @t10( ; CHECK-LABEL: @t10(
; CHECK-NEXT: [[OFFSET:%.*]] = ptrtoint i64* [[OFFSETPTR:%.*]] to i64 ; CHECK-NEXT: [[OFFSET:%.*]] = ptrtoint i64* [[OFFSETPTR:%.*]] to i64
; CHECK-NEXT: [[ADJUSTED:%.*]] = sub i64 [[BASE:%.*]], [[OFFSET]] ; CHECK-NEXT: [[ADJUSTED:%.*]] = sub i64 [[BASE:%.*]], [[OFFSET]]
; CHECK-NEXT: call void @use64(i64 [[ADJUSTED]]) ; CHECK-NEXT: call void @use64(i64 [[ADJUSTED]])
; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = icmp ule i64 [[OFFSET]], [[BASE]] ; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = icmp ule i64 [[OFFSET]], [[BASE]]
; CHECK-NEXT: call void @use1(i1 [[NO_UNDERFLOW]]) ; CHECK-NEXT: call void @use1(i1 [[NO_UNDERFLOW]])
; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i64 [[ADJUSTED]], 0 ; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i64 [[OFFSET]], [[BASE]]
; CHECK-NEXT: call void @use1(i1 [[NOT_NULL]]) ; CHECK-NEXT: call void @use1(i1 [[NOT_NULL]])
; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i64 [[OFFSET]], [[BASE]] ; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i64 [[OFFSET]], [[BASE]]
; CHECK-NEXT: ret i1 [[TMP1]] ; CHECK-NEXT: ret i1 [[TMP1]]
; ;
%offset = ptrtoint i64* %offsetptr to i64 %offset = ptrtoint i64* %offsetptr to i64
%adjusted = sub i64 %base, %offset %adjusted = sub i64 %base, %offset
call void @use64(i64 %adjusted) call void @use64(i64 %adjusted)
%no_underflow = icmp ult i64 %adjusted, %base %no_underflow = icmp ult i64 %adjusted, %base
call void @use1(i1 %no_underflow) call void @use1(i1 %no_underflow)
%not_null = icmp ne i64 %adjusted, 0 %not_null = icmp ne i64 %adjusted, 0
call void @use1(i1 %not_null) call void @use1(i1 %not_null)
%r = and i1 %not_null, %no_underflow %r = and i1 %not_null, %no_underflow
ret i1 %r ret i1 %r
} }
define i1 @t10_logical(i64 %base, i64* nonnull %offsetptr) { define i1 @t10_logical(i64 %base, i64* nonnull %offsetptr) {
; CHECK-LABEL: @t10_logical( ; CHECK-LABEL: @t10_logical(
; CHECK-NEXT: [[OFFSET:%.*]] = ptrtoint i64* [[OFFSETPTR:%.*]] to i64 ; CHECK-NEXT: [[OFFSET:%.*]] = ptrtoint i64* [[OFFSETPTR:%.*]] to i64
; CHECK-NEXT: [[ADJUSTED:%.*]] = sub i64 [[BASE:%.*]], [[OFFSET]] ; CHECK-NEXT: [[ADJUSTED:%.*]] = sub i64 [[BASE:%.*]], [[OFFSET]]
; CHECK-NEXT: call void @use64(i64 [[ADJUSTED]]) ; CHECK-NEXT: call void @use64(i64 [[ADJUSTED]])
; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = icmp ule i64 [[OFFSET]], [[BASE]] ; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = icmp ule i64 [[OFFSET]], [[BASE]]
; CHECK-NEXT: call void @use1(i1 [[NO_UNDERFLOW]]) ; CHECK-NEXT: call void @use1(i1 [[NO_UNDERFLOW]])
; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i64 [[ADJUSTED]], 0 ; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i64 [[OFFSET]], [[BASE]]
; CHECK-NEXT: call void @use1(i1 [[NOT_NULL]]) ; CHECK-NEXT: call void @use1(i1 [[NOT_NULL]])
; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i64 [[OFFSET]], [[BASE]] ; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i64 [[OFFSET]], [[BASE]]
; CHECK-NEXT: ret i1 [[TMP1]] ; CHECK-NEXT: ret i1 [[TMP1]]
; ;
%offset = ptrtoint i64* %offsetptr to i64 %offset = ptrtoint i64* %offsetptr to i64
%adjusted = sub i64 %base, %offset %adjusted = sub i64 %base, %offset
call void @use64(i64 %adjusted) call void @use64(i64 %adjusted)
%no_underflow = icmp ult i64 %adjusted, %base %no_underflow = icmp ult i64 %adjusted, %base
call void @use1(i1 %no_underflow) call void @use1(i1 %no_underflow)
%not_null = icmp ne i64 %adjusted, 0 %not_null = icmp ne i64 %adjusted, 0
call void @use1(i1 %not_null) call void @use1(i1 %not_null)
%r = select i1 %not_null, i1 %no_underflow, i1 false %r = select i1 %not_null, i1 %no_underflow, i1 false
ret i1 %r ret i1 %r
} }
define i1 @t11_commutative(i64 %base, i64* nonnull %offsetptr) { define i1 @t11_commutative(i64 %base, i64* nonnull %offsetptr) {
; CHECK-LABEL: @t11_commutative( ; CHECK-LABEL: @t11_commutative(
; CHECK-NEXT: [[OFFSET:%.*]] = ptrtoint i64* [[OFFSETPTR:%.*]] to i64 ; CHECK-NEXT: [[OFFSET:%.*]] = ptrtoint i64* [[OFFSETPTR:%.*]] to i64
; CHECK-NEXT: [[ADJUSTED:%.*]] = sub i64 [[BASE:%.*]], [[OFFSET]] ; CHECK-NEXT: [[ADJUSTED:%.*]] = sub i64 [[BASE:%.*]], [[OFFSET]]
; CHECK-NEXT: call void @use64(i64 [[ADJUSTED]]) ; CHECK-NEXT: call void @use64(i64 [[ADJUSTED]])
; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = icmp ule i64 [[OFFSET]], [[BASE]] ; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = icmp ule i64 [[OFFSET]], [[BASE]]
; CHECK-NEXT: call void @use1(i1 [[NO_UNDERFLOW]]) ; CHECK-NEXT: call void @use1(i1 [[NO_UNDERFLOW]])
; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i64 [[ADJUSTED]], 0 ; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i64 [[OFFSET]], [[BASE]]
; CHECK-NEXT: call void @use1(i1 [[NOT_NULL]]) ; CHECK-NEXT: call void @use1(i1 [[NOT_NULL]])
; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i64 [[OFFSET]], [[BASE]] ; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i64 [[OFFSET]], [[BASE]]
; CHECK-NEXT: ret i1 [[TMP1]] ; CHECK-NEXT: ret i1 [[TMP1]]
; ;
%offset = ptrtoint i64* %offsetptr to i64 %offset = ptrtoint i64* %offsetptr to i64
%adjusted = sub i64 %base, %offset %adjusted = sub i64 %base, %offset
call void @use64(i64 %adjusted) call void @use64(i64 %adjusted)
%no_underflow = icmp ugt i64 %base, %adjusted ; swapped %no_underflow = icmp ugt i64 %base, %adjusted ; swapped
call void @use1(i1 %no_underflow) call void @use1(i1 %no_underflow)
%not_null = icmp ne i64 %adjusted, 0 %not_null = icmp ne i64 %adjusted, 0
call void @use1(i1 %not_null) call void @use1(i1 %not_null)
%r = and i1 %not_null, %no_underflow %r = and i1 %not_null, %no_underflow
ret i1 %r ret i1 %r
} }
define i1 @t11_commutative_logical(i64 %base, i64* nonnull %offsetptr) { define i1 @t11_commutative_logical(i64 %base, i64* nonnull %offsetptr) {
; CHECK-LABEL: @t11_commutative_logical( ; CHECK-LABEL: @t11_commutative_logical(
; CHECK-NEXT: [[OFFSET:%.*]] = ptrtoint i64* [[OFFSETPTR:%.*]] to i64 ; CHECK-NEXT: [[OFFSET:%.*]] = ptrtoint i64* [[OFFSETPTR:%.*]] to i64
; CHECK-NEXT: [[ADJUSTED:%.*]] = sub i64 [[BASE:%.*]], [[OFFSET]] ; CHECK-NEXT: [[ADJUSTED:%.*]] = sub i64 [[BASE:%.*]], [[OFFSET]]
; CHECK-NEXT: call void @use64(i64 [[ADJUSTED]]) ; CHECK-NEXT: call void @use64(i64 [[ADJUSTED]])
; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = icmp ule i64 [[OFFSET]], [[BASE]] ; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = icmp ule i64 [[OFFSET]], [[BASE]]
; CHECK-NEXT: call void @use1(i1 [[NO_UNDERFLOW]]) ; CHECK-NEXT: call void @use1(i1 [[NO_UNDERFLOW]])
; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i64 [[ADJUSTED]], 0 ; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i64 [[OFFSET]], [[BASE]]
; CHECK-NEXT: call void @use1(i1 [[NOT_NULL]]) ; CHECK-NEXT: call void @use1(i1 [[NOT_NULL]])
; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i64 [[OFFSET]], [[BASE]] ; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i64 [[OFFSET]], [[BASE]]
; CHECK-NEXT: ret i1 [[TMP1]] ; CHECK-NEXT: ret i1 [[TMP1]]
; ;
%offset = ptrtoint i64* %offsetptr to i64 %offset = ptrtoint i64* %offsetptr to i64
%adjusted = sub i64 %base, %offset %adjusted = sub i64 %base, %offset
call void @use64(i64 %adjusted) call void @use64(i64 %adjusted)
%no_underflow = icmp ugt i64 %base, %adjusted ; swapped %no_underflow = icmp ugt i64 %base, %adjusted ; swapped
call void @use1(i1 %no_underflow) call void @use1(i1 %no_underflow)
%not_null = icmp ne i64 %adjusted, 0 %not_null = icmp ne i64 %adjusted, 0
call void @use1(i1 %not_null) call void @use1(i1 %not_null)
%r = select i1 %not_null, i1 %no_underflow, i1 false %r = select i1 %not_null, i1 %no_underflow, i1 false
ret i1 %r ret i1 %r
} }
define i1 @t12(i64 %base, i64* nonnull %offsetptr) { define i1 @t12(i64 %base, i64* nonnull %offsetptr) {
; CHECK-LABEL: @t12( ; CHECK-LABEL: @t12(
; CHECK-NEXT: [[OFFSET:%.*]] = ptrtoint i64* [[OFFSETPTR:%.*]] to i64 ; CHECK-NEXT: [[OFFSET:%.*]] = ptrtoint i64* [[OFFSETPTR:%.*]] to i64
; CHECK-NEXT: [[ADJUSTED:%.*]] = sub i64 [[BASE:%.*]], [[OFFSET]] ; CHECK-NEXT: [[ADJUSTED:%.*]] = sub i64 [[BASE:%.*]], [[OFFSET]]
; CHECK-NEXT: call void @use64(i64 [[ADJUSTED]]) ; CHECK-NEXT: call void @use64(i64 [[ADJUSTED]])
; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = icmp ugt i64 [[OFFSET]], [[BASE]] ; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = icmp ugt i64 [[OFFSET]], [[BASE]]
; CHECK-NEXT: call void @use1(i1 [[NO_UNDERFLOW]]) ; CHECK-NEXT: call void @use1(i1 [[NO_UNDERFLOW]])
; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp eq i64 [[ADJUSTED]], 0 ; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp eq i64 [[OFFSET]], [[BASE]]
; CHECK-NEXT: call void @use1(i1 [[NOT_NULL]]) ; CHECK-NEXT: call void @use1(i1 [[NOT_NULL]])
; CHECK-NEXT: [[TMP1:%.*]] = icmp uge i64 [[OFFSET]], [[BASE]] ; CHECK-NEXT: [[TMP1:%.*]] = icmp uge i64 [[OFFSET]], [[BASE]]
; CHECK-NEXT: ret i1 [[TMP1]] ; CHECK-NEXT: ret i1 [[TMP1]]
; ;
%offset = ptrtoint i64* %offsetptr to i64 %offset = ptrtoint i64* %offsetptr to i64
%adjusted = sub i64 %base, %offset %adjusted = sub i64 %base, %offset
call void @use64(i64 %adjusted) call void @use64(i64 %adjusted)
%no_underflow = icmp uge i64 %adjusted, %base %no_underflow = icmp uge i64 %adjusted, %base
call void @use1(i1 %no_underflow) call void @use1(i1 %no_underflow)
%not_null = icmp eq i64 %adjusted, 0 %not_null = icmp eq i64 %adjusted, 0
call void @use1(i1 %not_null) call void @use1(i1 %not_null)
%r = or i1 %not_null, %no_underflow %r = or i1 %not_null, %no_underflow
ret i1 %r ret i1 %r
} }
define i1 @t12_logical(i64 %base, i64* nonnull %offsetptr) { define i1 @t12_logical(i64 %base, i64* nonnull %offsetptr) {
; CHECK-LABEL: @t12_logical( ; CHECK-LABEL: @t12_logical(
; CHECK-NEXT: [[OFFSET:%.*]] = ptrtoint i64* [[OFFSETPTR:%.*]] to i64 ; CHECK-NEXT: [[OFFSET:%.*]] = ptrtoint i64* [[OFFSETPTR:%.*]] to i64
; CHECK-NEXT: [[ADJUSTED:%.*]] = sub i64 [[BASE:%.*]], [[OFFSET]] ; CHECK-NEXT: [[ADJUSTED:%.*]] = sub i64 [[BASE:%.*]], [[OFFSET]]
; CHECK-NEXT: call void @use64(i64 [[ADJUSTED]]) ; CHECK-NEXT: call void @use64(i64 [[ADJUSTED]])
; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = icmp ugt i64 [[OFFSET]], [[BASE]] ; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = icmp ugt i64 [[OFFSET]], [[BASE]]
; CHECK-NEXT: call void @use1(i1 [[NO_UNDERFLOW]]) ; CHECK-NEXT: call void @use1(i1 [[NO_UNDERFLOW]])
; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp eq i64 [[ADJUSTED]], 0 ; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp eq i64 [[OFFSET]], [[BASE]]
; CHECK-NEXT: call void @use1(i1 [[NOT_NULL]]) ; CHECK-NEXT: call void @use1(i1 [[NOT_NULL]])
; CHECK-NEXT: [[TMP1:%.*]] = icmp uge i64 [[OFFSET]], [[BASE]] ; CHECK-NEXT: [[TMP1:%.*]] = icmp uge i64 [[OFFSET]], [[BASE]]
; CHECK-NEXT: ret i1 [[TMP1]] ; CHECK-NEXT: ret i1 [[TMP1]]
; ;
%offset = ptrtoint i64* %offsetptr to i64 %offset = ptrtoint i64* %offsetptr to i64
%adjusted = sub i64 %base, %offset %adjusted = sub i64 %base, %offset
call void @use64(i64 %adjusted) call void @use64(i64 %adjusted)
%no_underflow = icmp uge i64 %adjusted, %base %no_underflow = icmp uge i64 %adjusted, %base
call void @use1(i1 %no_underflow) call void @use1(i1 %no_underflow)
%not_null = icmp eq i64 %adjusted, 0 %not_null = icmp eq i64 %adjusted, 0
call void @use1(i1 %not_null) call void @use1(i1 %not_null)
%r = select i1 %not_null, i1 true, i1 %no_underflow %r = select i1 %not_null, i1 true, i1 %no_underflow
ret i1 %r ret i1 %r
} }
define i1 @t13(i64 %base, i64* nonnull %offsetptr) { define i1 @t13(i64 %base, i64* nonnull %offsetptr) {
; CHECK-LABEL: @t13( ; CHECK-LABEL: @t13(
; CHECK-NEXT: [[OFFSET:%.*]] = ptrtoint i64* [[OFFSETPTR:%.*]] to i64 ; CHECK-NEXT: [[OFFSET:%.*]] = ptrtoint i64* [[OFFSETPTR:%.*]] to i64
; CHECK-NEXT: [[ADJUSTED:%.*]] = sub i64 [[BASE:%.*]], [[OFFSET]] ; CHECK-NEXT: [[ADJUSTED:%.*]] = sub i64 [[BASE:%.*]], [[OFFSET]]
; CHECK-NEXT: call void @use64(i64 [[ADJUSTED]]) ; CHECK-NEXT: call void @use64(i64 [[ADJUSTED]])
; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = icmp ugt i64 [[OFFSET]], [[BASE]] ; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = icmp ugt i64 [[OFFSET]], [[BASE]]
; CHECK-NEXT: call void @use1(i1 [[NO_UNDERFLOW]]) ; CHECK-NEXT: call void @use1(i1 [[NO_UNDERFLOW]])
; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp eq i64 [[ADJUSTED]], 0 ; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp eq i64 [[OFFSET]], [[BASE]]
; CHECK-NEXT: call void @use1(i1 [[NOT_NULL]]) ; CHECK-NEXT: call void @use1(i1 [[NOT_NULL]])
; CHECK-NEXT: [[TMP1:%.*]] = icmp uge i64 [[OFFSET]], [[BASE]] ; CHECK-NEXT: [[TMP1:%.*]] = icmp uge i64 [[OFFSET]], [[BASE]]
; CHECK-NEXT: ret i1 [[TMP1]] ; CHECK-NEXT: ret i1 [[TMP1]]
; ;
%offset = ptrtoint i64* %offsetptr to i64 %offset = ptrtoint i64* %offsetptr to i64
%adjusted = sub i64 %base, %offset %adjusted = sub i64 %base, %offset
call void @use64(i64 %adjusted) call void @use64(i64 %adjusted)
%no_underflow = icmp ule i64 %base, %adjusted ; swapped %no_underflow = icmp ule i64 %base, %adjusted ; swapped
call void @use1(i1 %no_underflow) call void @use1(i1 %no_underflow)
%not_null = icmp eq i64 %adjusted, 0 %not_null = icmp eq i64 %adjusted, 0
call void @use1(i1 %not_null) call void @use1(i1 %not_null)
%r = or i1 %not_null, %no_underflow %r = or i1 %not_null, %no_underflow
ret i1 %r ret i1 %r
} }
define i1 @t13_logical(i64 %base, i64* nonnull %offsetptr) { define i1 @t13_logical(i64 %base, i64* nonnull %offsetptr) {
; CHECK-LABEL: @t13_logical( ; CHECK-LABEL: @t13_logical(
; CHECK-NEXT: [[OFFSET:%.*]] = ptrtoint i64* [[OFFSETPTR:%.*]] to i64 ; CHECK-NEXT: [[OFFSET:%.*]] = ptrtoint i64* [[OFFSETPTR:%.*]] to i64
; CHECK-NEXT: [[ADJUSTED:%.*]] = sub i64 [[BASE:%.*]], [[OFFSET]] ; CHECK-NEXT: [[ADJUSTED:%.*]] = sub i64 [[BASE:%.*]], [[OFFSET]]
; CHECK-NEXT: call void @use64(i64 [[ADJUSTED]]) ; CHECK-NEXT: call void @use64(i64 [[ADJUSTED]])
; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = icmp ugt i64 [[OFFSET]], [[BASE]] ; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = icmp ugt i64 [[OFFSET]], [[BASE]]
; CHECK-NEXT: call void @use1(i1 [[NO_UNDERFLOW]]) ; CHECK-NEXT: call void @use1(i1 [[NO_UNDERFLOW]])
; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp eq i64 [[ADJUSTED]], 0 ; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp eq i64 [[OFFSET]], [[BASE]]
; CHECK-NEXT: call void @use1(i1 [[NOT_NULL]]) ; CHECK-NEXT: call void @use1(i1 [[NOT_NULL]])
; CHECK-NEXT: [[TMP1:%.*]] = icmp uge i64 [[OFFSET]], [[BASE]] ; CHECK-NEXT: [[TMP1:%.*]] = icmp uge i64 [[OFFSET]], [[BASE]]
; CHECK-NEXT: ret i1 [[TMP1]] ; CHECK-NEXT: ret i1 [[TMP1]]
; ;
%offset = ptrtoint i64* %offsetptr to i64 %offset = ptrtoint i64* %offsetptr to i64
%adjusted = sub i64 %base, %offset %adjusted = sub i64 %base, %offset
call void @use64(i64 %adjusted) call void @use64(i64 %adjusted)
%no_underflow = icmp ule i64 %base, %adjusted ; swapped %no_underflow = icmp ule i64 %base, %adjusted ; swapped
call void @use1(i1 %no_underflow) call void @use1(i1 %no_underflow)
%not_null = icmp eq i64 %adjusted, 0 %not_null = icmp eq i64 %adjusted, 0
call void @use1(i1 %not_null) call void @use1(i1 %not_null)
%r = select i1 %not_null, i1 true, i1 %no_underflow %r = select i1 %not_null, i1 true, i1 %no_underflow
ret i1 %r ret i1 %r
} }
define i1 @t14_bad(i64 %base, i64 %offset) { define i1 @t14_bad(i64 %base, i64 %offset) {
; CHECK-LABEL: @t14_bad( ; CHECK-LABEL: @t14_bad(
; CHECK-NEXT: [[ADJUSTED:%.*]] = sub i64 [[BASE:%.*]], [[OFFSET:%.*]] ; CHECK-NEXT: [[ADJUSTED:%.*]] = sub i64 [[BASE:%.*]], [[OFFSET:%.*]]
; CHECK-NEXT: call void @use64(i64 [[ADJUSTED]]) ; CHECK-NEXT: call void @use64(i64 [[ADJUSTED]])
; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = icmp ult i64 [[ADJUSTED]], [[BASE]] ; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = icmp ult i64 [[ADJUSTED]], [[BASE]]
; CHECK-NEXT: call void @use1(i1 [[NO_UNDERFLOW]]) ; CHECK-NEXT: call void @use1(i1 [[NO_UNDERFLOW]])
; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i64 [[ADJUSTED]], 0 ; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i64 [[BASE]], [[OFFSET]]
; CHECK-NEXT: call void @use1(i1 [[NOT_NULL]]) ; CHECK-NEXT: call void @use1(i1 [[NOT_NULL]])
; CHECK-NEXT: [[R:%.*]] = and i1 [[NOT_NULL]], [[NO_UNDERFLOW]] ; CHECK-NEXT: [[R:%.*]] = and i1 [[NOT_NULL]], [[NO_UNDERFLOW]]
; CHECK-NEXT: ret i1 [[R]] ; CHECK-NEXT: ret i1 [[R]]
; ;
%adjusted = sub i64 %base, %offset %adjusted = sub i64 %base, %offset
call void @use64(i64 %adjusted) call void @use64(i64 %adjusted)
%no_underflow = icmp ult i64 %adjusted, %base %no_underflow = icmp ult i64 %adjusted, %base
call void @use1(i1 %no_underflow) call void @use1(i1 %no_underflow)
%not_null = icmp ne i64 %adjusted, 0 %not_null = icmp ne i64 %adjusted, 0
call void @use1(i1 %not_null) call void @use1(i1 %not_null)
%r = and i1 %not_null, %no_underflow %r = and i1 %not_null, %no_underflow
ret i1 %r ret i1 %r
} }
define i1 @t14_bad_logical(i64 %base, i64 %offset) { define i1 @t14_bad_logical(i64 %base, i64 %offset) {
; CHECK-LABEL: @t14_bad_logical( ; CHECK-LABEL: @t14_bad_logical(
; CHECK-NEXT: [[ADJUSTED:%.*]] = sub i64 [[BASE:%.*]], [[OFFSET:%.*]] ; CHECK-NEXT: [[ADJUSTED:%.*]] = sub i64 [[BASE:%.*]], [[OFFSET:%.*]]
; CHECK-NEXT: call void @use64(i64 [[ADJUSTED]]) ; CHECK-NEXT: call void @use64(i64 [[ADJUSTED]])
; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = icmp ult i64 [[ADJUSTED]], [[BASE]] ; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = icmp ult i64 [[ADJUSTED]], [[BASE]]
; CHECK-NEXT: call void @use1(i1 [[NO_UNDERFLOW]]) ; CHECK-NEXT: call void @use1(i1 [[NO_UNDERFLOW]])
; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i64 [[ADJUSTED]], 0 ; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i64 [[BASE]], [[OFFSET]]
; CHECK-NEXT: call void @use1(i1 [[NOT_NULL]]) ; CHECK-NEXT: call void @use1(i1 [[NOT_NULL]])
; CHECK-NEXT: [[R:%.*]] = and i1 [[NOT_NULL]], [[NO_UNDERFLOW]] ; CHECK-NEXT: [[R:%.*]] = and i1 [[NOT_NULL]], [[NO_UNDERFLOW]]
; CHECK-NEXT: ret i1 [[R]] ; CHECK-NEXT: ret i1 [[R]]
; ;
%adjusted = sub i64 %base, %offset %adjusted = sub i64 %base, %offset
call void @use64(i64 %adjusted) call void @use64(i64 %adjusted)
%no_underflow = icmp ult i64 %adjusted, %base %no_underflow = icmp ult i64 %adjusted, %base
call void @use1(i1 %no_underflow) call void @use1(i1 %no_underflow)
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