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Differential D118289

[mlir][amx] fix some whitespace issues in AMX tests
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Authored by aartbik on Jan 26 2022, 3:25 PM.

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nicolasvasilache
dcaballe
Commits
rG19f67ee29e06: [mlir][amx] fix some whitespace issues in AMX tests

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aartbik created this revision.Jan 26 2022, 3:25 PM
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Closed by commit rG19f67ee29e06: [mlir][amx] fix some whitespace issues in AMX tests (authored by aartbik). · Explain Why
This revision was automatically updated to reflect the committed changes.
aartbik added a commit: rG19f67ee29e06: [mlir][amx] fix some whitespace issues in AMX tests.
Harbormaster completed remote builds in B145859: Diff 403420.Jan 27 2022, 6:20 AM

Revision Contents

PathSize
mlir/
test/
Integration/
Dialect/
Vector/
CPU/
AMX/
4 lines
4 lines

Diff 403420

mlir/test/Integration/Dialect/Vector/CPU/AMX/test-mulf.mlir

// RUN: mlir-opt %s -convert-vector-to-scf -lower-affine -convert-scf-to-std -convert-vector-to-llvm="enable-amx" -convert-memref-to-llvm -convert-std-to-llvm -reconcile-unrealized-casts | \ // RUN: mlir-opt %s -convert-vector-to-scf -lower-affine -convert-scf-to-std -convert-vector-to-llvm="enable-amx" -convert-memref-to-llvm -convert-std-to-llvm -reconcile-unrealized-casts | \
// RUN: mlir-translate -mlir-to-llvmir | \ // RUN: mlir-translate -mlir-to-llvmir | \
// RUN: %lli --entry-function=entry --mattr="+amx-tile,+amx-int8,+amx-bf16" --dlopen=%mlir_integration_test_dir/libmlir_c_runner_utils%shlibext | \ // RUN: %lli --entry-function=entry --mattr="+amx-tile,+amx-int8,+amx-bf16" --dlopen=%mlir_integration_test_dir/libmlir_c_runner_utils%shlibext | \
// RUN: FileCheck %s // RUN: FileCheck %s
// Note: To run this test, your CPU must support AMX. // Note: To run this test, your CPU must support AMX.
// Multiply into zeroed destination. // Multiply into zeroed destination.
func @kernel1(%arg0: memref<2x4xbf16>, func @kernel1(%arg0: memref<2x4xbf16>,
%arg1: memref<2x4xbf16>, %arg1: memref<2x4xbf16>,
%arg2: memref<2x2xf32>) { %arg2: memref<2x2xf32>) {
%0 = arith.constant 0 : index %0 = arith.constant 0 : index
%1 = amx.tile_load %arg0[%0, %0] : memref<2x4xbf16> into vector<2x4xbf16> %1 = amx.tile_load %arg0[%0, %0] : memref<2x4xbf16> into vector<2x4xbf16>
%2 = amx.tile_load %arg1[%0, %0] : memref<2x4xbf16> into vector<2x4xbf16> %2 = amx.tile_load %arg1[%0, %0] : memref<2x4xbf16> into vector<2x4xbf16>
%3 = amx.tile_zero : vector<2x2xf32> %3 = amx.tile_zero : vector<2x2xf32>
%4 = amx.tile_mulf %1, %2, %3 : vector<2x4xbf16>, vector<2x4xbf16>, vector<2x2xf32> %4 = amx.tile_mulf %1, %2, %3 : vector<2x4xbf16>, vector<2x4xbf16>, vector<2x2xf32>
amx.tile_store %arg2[%0, %0], %4 : memref<2x2xf32>, vector<2x2xf32> amx.tile_store %arg2[%0, %0], %4 : memref<2x2xf32>, vector<2x2xf32>
return return
} }
// Multiply and update into destination. // Multiply and update into destination.
func @kernel2(%arg0: memref<2x4xbf16>, func @kernel2(%arg0: memref<2x4xbf16>,
%arg1: memref<2x4xbf16>, %arg1: memref<2x4xbf16>,
%arg2: memref<2x2xf32>) { %arg2: memref<2x2xf32>) {
%0 = arith.constant 0 : index %0 = arith.constant 0 : index
%1 = amx.tile_load %arg0[%0, %0] : memref<2x4xbf16> into vector<2x4xbf16> %1 = amx.tile_load %arg0[%0, %0] : memref<2x4xbf16> into vector<2x4xbf16>
%2 = amx.tile_load %arg1[%0, %0] : memref<2x4xbf16> into vector<2x4xbf16> %2 = amx.tile_load %arg1[%0, %0] : memref<2x4xbf16> into vector<2x4xbf16>
%3 = amx.tile_load %arg2[%0, %0] : memref<2x2xf32> into vector<2x2xf32> %3 = amx.tile_load %arg2[%0, %0] : memref<2x2xf32> into vector<2x2xf32>
%4 = amx.tile_mulf %1, %2, %3 : vector<2x4xbf16>, vector<2x4xbf16>, vector<2x2xf32> %4 = amx.tile_mulf %1, %2, %3 : vector<2x4xbf16>, vector<2x4xbf16>, vector<2x2xf32>
amx.tile_store %arg2[%0, %0], %4 : memref<2x2xf32>, vector<2x2xf32> amx.tile_store %arg2[%0, %0], %4 : memref<2x2xf32>, vector<2x2xf32>
return return
} }
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mlir/test/Integration/Dialect/Vector/CPU/AMX/test-muli.mlir

// RUN: mlir-opt %s -convert-vector-to-scf -lower-affine -convert-scf-to-std -convert-vector-to-llvm="enable-amx" -convert-memref-to-llvm -convert-std-to-llvm -reconcile-unrealized-casts | \ // RUN: mlir-opt %s -convert-vector-to-scf -lower-affine -convert-scf-to-std -convert-vector-to-llvm="enable-amx" -convert-memref-to-llvm -convert-std-to-llvm -reconcile-unrealized-casts | \
// RUN: mlir-translate -mlir-to-llvmir | \ // RUN: mlir-translate -mlir-to-llvmir | \
// RUN: %lli --entry-function=entry --mattr="+amx-tile,+amx-int8,+amx-bf16" --dlopen=%mlir_integration_test_dir/libmlir_c_runner_utils%shlibext | \ // RUN: %lli --entry-function=entry --mattr="+amx-tile,+amx-int8,+amx-bf16" --dlopen=%mlir_integration_test_dir/libmlir_c_runner_utils%shlibext | \
// RUN: FileCheck %s // RUN: FileCheck %s
// Note: To run this test, your CPU must support AMX. // Note: To run this test, your CPU must support AMX.
// Multiply into zeroed destination. // Multiply into zeroed destination.
func @kernel1(%arg0: memref<2x8xi8>, func @kernel1(%arg0: memref<2x8xi8>,
%arg1: memref<2x8xi8>, %arg1: memref<2x8xi8>,
%arg2: memref<2x2xi32>) { %arg2: memref<2x2xi32>) {
%0 = arith.constant 0 : index %0 = arith.constant 0 : index
%1 = amx.tile_load %arg0[%0, %0] : memref<2x8xi8> into vector<2x8xi8> %1 = amx.tile_load %arg0[%0, %0] : memref<2x8xi8> into vector<2x8xi8>
%2 = amx.tile_load %arg1[%0, %0] : memref<2x8xi8> into vector<2x8xi8> %2 = amx.tile_load %arg1[%0, %0] : memref<2x8xi8> into vector<2x8xi8>
%3 = amx.tile_zero : vector<2x2xi32> %3 = amx.tile_zero : vector<2x2xi32>
%4 = amx.tile_muli %1 zext, %2 zext, %3 : vector<2x8xi8>, vector<2x8xi8>, vector<2x2xi32> %4 = amx.tile_muli %1 zext, %2 zext, %3 : vector<2x8xi8>, vector<2x8xi8>, vector<2x2xi32>
amx.tile_store %arg2[%0, %0], %4 : memref<2x2xi32>, vector<2x2xi32> amx.tile_store %arg2[%0, %0], %4 : memref<2x2xi32>, vector<2x2xi32>
return return
} }
// Multiply and update into destination. // Multiply and update into destination.
func @kernel2(%arg0: memref<2x8xi8>, func @kernel2(%arg0: memref<2x8xi8>,
%arg1: memref<2x8xi8>, %arg1: memref<2x8xi8>,
%arg2: memref<2x2xi32>) { %arg2: memref<2x2xi32>) {
%0 = arith.constant 0 : index %0 = arith.constant 0 : index
%1 = amx.tile_load %arg0[%0, %0] : memref<2x8xi8> into vector<2x8xi8> %1 = amx.tile_load %arg0[%0, %0] : memref<2x8xi8> into vector<2x8xi8>
%2 = amx.tile_load %arg1[%0, %0] : memref<2x8xi8> into vector<2x8xi8> %2 = amx.tile_load %arg1[%0, %0] : memref<2x8xi8> into vector<2x8xi8>
%3 = amx.tile_load %arg2[%0, %0] : memref<2x2xi32> into vector<2x2xi32> %3 = amx.tile_load %arg2[%0, %0] : memref<2x2xi32> into vector<2x2xi32>
%4 = amx.tile_muli %1 zext, %2 zext, %3 : vector<2x8xi8>, vector<2x8xi8>, vector<2x2xi32> %4 = amx.tile_muli %1 zext, %2 zext, %3 : vector<2x8xi8>, vector<2x8xi8>, vector<2x2xi32>
amx.tile_store %arg2[%0, %0], %4 : memref<2x2xi32>, vector<2x2xi32> amx.tile_store %arg2[%0, %0], %4 : memref<2x2xi32>, vector<2x2xi32>
return return
} }
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