[OpaquePtrs] Add -normalize-opaque-pointers option

[nikic]

Summary

This adds a -normalize-opaque-pointers option to opt, which is intended to allow running most of our test both in typed and opaque pointer mode.

In opaque pointer mode, this option does nothing. In typed pointer mode, before we print the module, we first import it into a new context with opaque pointers enabled, and then print the result. This happens after the IR has been verified with typed pointers.

The idea here is that running the verifier is sufficient to ensure that the typed pointer IR is consistent (has all the necessary bitcasts and matching types), and we can then print it with opaque pointers, so the output is the same as in proper opaque pointer mode.

This will not hold up if the pass does anything fancy with opaque pointers, but I think it will allow us to cover a significant portion of tests while still fully supporting both modes. I've included sample EarlyCSE test changes here.

[dblaikie]

Could this be done by roundtripping through llvm-dis, rather than by having a builtin feature? (even if it can be done that way, not necessarily suggesting it's the better option - adding extra program executions will slow down tests especially on windows, etc - but curious/considering all the options, etc)

[nikic]

In D117778#3259584, @dblaikie wrote:

Could this be done by roundtripping through llvm-dis, rather than by having a builtin feature? (even if it can be done that way, not necessarily suggesting it's the better option - adding extra program executions will slow down tests especially on windows, etc - but curious/considering all the options, etc)

This is actually what I originally proposed in https://reviews.llvm.org/D109290#2988806, and you suggested to integrate the option to save the extra program execution :) Another benefit of the option is that we can also drop the ptr to ptr bitcasts.

[dblaikie]

In D117778#3259627, @nikic wrote:

In D117778#3259584, @dblaikie wrote:

Could this be done by roundtripping through llvm-dis, rather than by having a builtin feature? (even if it can be done that way, not necessarily suggesting it's the better option - adding extra program executions will slow down tests especially on windows, etc - but curious/considering all the options, etc)

This is actually what I originally proposed in https://reviews.llvm.org/D109290#2988806, and you suggested to integrate the option to save the extra program execution :) Another benefit of the option is that we can also drop the ptr to ptr bitcasts.

Ah, thanks for the context/reminder.

I think from that thread I still tend towards "introduce a build mode where it reads into opaque pointers (essentially auto-upgrade), either have a list of known-failing tests in this mode, or some other way to flag on a per-test basis (maybe start with a "passing" list, and eventually move to a "failing" list when that's smaller)" - but I don't feel especially strongly/open to others perspectives.

[nikic]

Fix PM test failures, port all (passing) EarlyCSE tests.

[nikic]

In D117778#3260225, @dblaikie wrote:

I think from that thread I still tend towards "introduce a build mode where it reads into opaque pointers (essentially auto-upgrade),

Flipping the opaque-pointers option to true is effectively that -- we should probably make that default controlled by a cmake option.

either have a list of known-failing tests in this mode, or some other way to flag on a per-test basis (maybe start with a "passing" list, and eventually move to a "failing" list when that's smaller)" - but I don't feel especially strongly/open to others perspectives.

Looking at just Transforms tests, we have about 7k tests, of which 3k fail under opaque pointers, of which 0.5k crash. My primary concern here is that if we don't introduce something like this, we'll need to update 3k tests (in Transforms alone) during the opaque pointers switch. And we'll need to separately maintain those opaque-ified tests prior to the switch.

I think the more changes we can make prior to the atomic "flip the flag" commit, the better.

[dblaikie]

In D117778#3260513, @nikic wrote:

In D117778#3260225, @dblaikie wrote:

I think from that thread I still tend towards "introduce a build mode where it reads into opaque pointers (essentially auto-upgrade),

Flipping the opaque-pointers option to true is effectively that -- we should probably make that default controlled by a cmake option.

Yeah, if that essentially enables the shipped version of opaque pointers (minus later API cleanup) - yeah, having a CMake option for that sounds awesome. Then people can try turning it on early, have a way to opt-out at least for a little while, let us run buildbots in the new mode before it ships, and continue testing in the old mode after it ships (briefly - to keep things passing in case we need to rollback/some users need a bit longer to migrate).

either have a list of known-failing tests in this mode, or some other way to flag on a per-test basis (maybe start with a "passing" list, and eventually move to a "failing" list when that's smaller)" - but I don't feel especially strongly/open to others perspectives.

Looking at just Transforms tests, we have about 7k tests, of which 3k fail under opaque pointers, of which 0.5k crash. My primary concern here is that if we don't introduce something like this, we'll need to update 3k tests (in Transforms alone) during the opaque pointers switch. And we'll need to separately maintain those opaque-ified tests prior to the switch.

I think the more changes we can make prior to the atomic "flip the flag" commit, the better.

Oh, for sure/agreed on this last point.

If we had the CMake flag described, and a buildbot for that config - we would update the CHECKs in these 3k tests to pass with/without opaque pointers, yeah? Ah, with the -normalize-opaque-pointers flag we wouldn't have to update these files to have agnostic (accounting for both typed and opaque pointers) CHECKs, they'd only have opaque pointers CHECKs - which is easier to do and means these don't eventually need to be cleaned up (or be weird/legacy phrasing) after the opaque pointers change is shipped?

Yeah, mixed feelings - happy to hear how other folks feel about what the tradeoffs are between these choices.

[aeubanks]

The issue with the opaque pointer migration is that passes sometimes don't handle them correctly, not that we can't print the final IR. This patch still doesn't test that passes properly handle both typed pointers and opaque pointers, unless the idea is that we'd have RUN lines with both -opaque-pointers and -normalize-opaque-pointers which this patch doesn't do for the modified tests.
As for a flag flip day, it would be per-frontend right? We can already incrementally update tests (including frontend e.g. clang) by adding -opaque-pointers to RUN lines.

llvm/tools/opt/NewPMDriver.cpp

209

not really true when we remove instructions but it's the last pass so whatever

[nikic]

In D117778#3261936, @aeubanks wrote:

The issue with the opaque pointer migration is that passes sometimes don't handle them correctly, not that we can't print the final IR. This patch still doesn't test that passes properly handle both typed pointers and opaque pointers, unless the idea is that we'd have RUN lines with both -opaque-pointers and -normalize-opaque-pointers which this patch doesn't do for the modified tests.

The idea is that the tests can be run with both -opaque-pointers=0 and -opaque-pointers=1. They will use -opaque-pointers=0 by default, but they can be run with -opaque-pointers=1 and will pass -- for now, that would just be manual runs by interested parties, but if we can have a significant fraction of tests passing, that may be a buildbot.

Of course, another possibility would be to add both a -normalize-opaque-pointers and an `-opaque-pointers' RUN line, so that everyone tests both modes. That would double the number of RUN lines (for tests using pointers) though, but maybe it's preferred?

As for a flag flip day, it would be per-frontend right? We can already incrementally update tests (including frontend e.g. clang) by adding -opaque-pointers to RUN lines.

Adding -opaque-pointers to tests means we lose typed pointer test coverage though. I don't think that's a good idea while typed pointers are still the default mode.

[nikic]

Any further thoughts on this? Some options I see:

1. Add -normalize-opaque-pointers to existing RUN lines. This allows them to pass when opaque pointers are enabled, but doesn't test opaque pointers in a default configuration.
2. Add both -opaque-pointers=1 and -opaque-pointers=0 -normalize-opaque-pointers to RUN lines. This makes everyone test both typed and opaque pointers in a default configuration.
3. Add both -opaque-pointers=1 and -opaque-pointers=0 to RUN lines with different FileCheck prefixes.
4. Add -opaque-pointers to RUN lines and stop testing typed pointers.
5. ???

I think all of these are principally viable, with different tradeoffs. This patch currently proposed version 1.

[aeubanks]

In D117778#3305983, @nikic wrote:

Any further thoughts on this? Some options I see:

1. Add -normalize-opaque-pointers to existing RUN lines. This allows them to pass when opaque pointers are enabled, but doesn't test opaque pointers in a default configuration.
2. Add both -opaque-pointers=1 and -opaque-pointers=0 -normalize-opaque-pointers to RUN lines. This makes everyone test both typed and opaque pointers in a default configuration.
3. Add both -opaque-pointers=1 and -opaque-pointers=0 to RUN lines with different FileCheck prefixes.
4. Add -opaque-pointers to RUN lines and stop testing typed pointers.
5. ???

I think all of these are principally viable, with different tradeoffs. This patch currently proposed version 1.

My assumption is that most things work with opaque pointers and we'll fix and add tests for the few things that specifically are broken by opaque pointers.
I think 1) is fine, although I still sorta prefer 4) but waiting until we've completely flushed out all opaque pointer issues mostly because I don't really want to burden people not working on opaque pointers with another thing to worry about (what is this ptr thing? why does the output IR look slightly different than the input IR? why do all these tests have -normalize-opaque-pointers?) during the opaque pointer fixup period which could last a while. It's possible that opaque pointer issues we aren't specifically testing could regress, but IMO that's unlikely and also easy to pinpoint and fix. But I could be convinced to do 1).
Perhaps one issue is testing of typed pointers post-opaque pointers, which is where 1) would be useful. Not sure how much we want to commit to having rigorous testing of typed pointers when opaque pointers are the default for in tree projects.
I don't like 2) and 3), they're too much overhead for not enough value.

[dblaikie]

In D117778#3306336, @aeubanks wrote:

In D117778#3305983, @nikic wrote:

Any further thoughts on this? Some options I see:

1. Add -normalize-opaque-pointers to existing RUN lines. This allows them to pass when opaque pointers are enabled, but doesn't test opaque pointers in a default configuration.
2. Add both -opaque-pointers=1 and -opaque-pointers=0 -normalize-opaque-pointers to RUN lines. This makes everyone test both typed and opaque pointers in a default configuration.
3. Add both -opaque-pointers=1 and -opaque-pointers=0 to RUN lines with different FileCheck prefixes.
4. Add -opaque-pointers to RUN lines and stop testing typed pointers.
5. ???

I think all of these are principally viable, with different tradeoffs. This patch currently proposed version 1.

My assumption is that most things work with opaque pointers and we'll fix and add tests for the few things that specifically are broken by opaque pointers.
I think 1) is fine, although I still sorta prefer 4) but waiting until we've completely flushed out all opaque pointer issues mostly because I don't really want to burden people not working on opaque pointers with another thing to worry about (what is this ptr thing? why does the output IR look slightly different than the input IR? why do all these tests have -normalize-opaque-pointers?) during the opaque pointer fixup period which could last a while. It's possible that opaque pointer issues we aren't specifically testing could regress, but IMO that's unlikely and also easy to pinpoint and fix. But I could be convinced to do 1).
Perhaps one issue is testing of typed pointers post-opaque pointers, which is where 1) would be useful. Not sure how much we want to commit to having rigorous testing of typed pointers when opaque pointers are the default for in tree projects.
I don't like 2) and 3), they're too much overhead for not enough value.

Seems like a 5th option might be a buildbot that builds with opaque pointers on by default & a list of known failures suppressed? But maybe not worth the hassle to setup, not sure.

[nikic]

In D117778#3306336, @aeubanks wrote:

My assumption is that most things work with opaque pointers and we'll fix and add tests for the few things that specifically are broken by opaque pointers.
I think 1) is fine, although I still sorta prefer 4) but waiting until we've completely flushed out all opaque pointer issues mostly because I don't really want to burden people not working on opaque pointers with another thing to worry about (what is this ptr thing? why does the output IR look slightly different than the input IR? why do all these tests have -normalize-opaque-pointers?) during the opaque pointer fixup period which could last a while. It's possible that opaque pointer issues we aren't specifically testing could regress, but IMO that's unlikely and also easy to pinpoint and fix. But I could be convinced to do 1).
Perhaps one issue is testing of typed pointers post-opaque pointers, which is where 1) would be useful. Not sure how much we want to commit to having rigorous testing of typed pointers when opaque pointers are the default for in tree projects.
I don't like 2) and 3), they're too much overhead for not enough value.

Okay, my original thinking here was that we should have most of the llvm lit tests passing with opaque pointers before they get enabled in clang, but on further consideration that may not be particularly valuable. Basically, cases where opaque pointers are improperly handled will either crash outright (which we can easily check), or won't have existing test coverage anyway.

I guess the chicken and egg problem here gets solved by enabling opaque pointers in clang despite having limited direct test coverage in LLVM, and then converting LLVM tests after that has happened (and dropping typed pointer coverage while doing that). That is probably less risky than the other way around (first migrating the tests and then flipping what clang uses) by dint of typed pointers being harder to get right in terms of inserting all the necessary bitcasts.

In that case what I'm proposing here might actually be more useful on the clang side? It would allow us to convert all the clang tests to use opaque pointer output in advance, rather than doing a huge mass change as part of flipping the flag (which is likely going to be reverted a couple of times).

I do think we've reached the point where it's fine to mass-include ptr in tests and make other people deal with opaque pointers. Opaque pointers basically work for end-to-end optimized compiles of C/C++ now, and we're now working on long-tail issues now.

I plan to start a discourse thread soon to get some wider input on how to handle the opaque pointer switch (and make sure that people with out-of-tree code are aware that a switch will happen soon...)

[nikic]

Abandoning this as we decided not to pursue this approach.

llvm/test/Transforms/EarlyCSE/AArch64/intrinsics.ll

-; RUN: opt < %s -S -mtriple=aarch64-none-linux-gnu -mattr=+neon -early-cse -earlycse-debug-hash | FileCheck %s
-; RUN: opt < %s -S -mtriple=aarch64-none-linux-gnu -mattr=+neon -basic-aa -early-cse-memssa | FileCheck %s
-; RUN: opt < %s -S -mtriple=aarch64-none-linux-gnu -mattr=+neon -passes=early-cse | FileCheck %s
-; RUN: opt < %s -S -mtriple=aarch64-none-linux-gnu -mattr=+neon -aa-pipeline=basic-aa -passes='early-cse<memssa>' | FileCheck %s
+; RUN: opt < %s -S -mtriple=aarch64-none-linux-gnu -mattr=+neon -early-cse -earlycse-debug-hash -normalize-opaque-pointers | FileCheck %s
+; RUN: opt < %s -S -mtriple=aarch64-none-linux-gnu -mattr=+neon -basic-aa -early-cse-memssa -normalize-opaque-pointers | FileCheck %s
+; RUN: opt < %s -S -mtriple=aarch64-none-linux-gnu -mattr=+neon -passes=early-cse -normalize-opaque-pointers | FileCheck %s
+; RUN: opt < %s -S -mtriple=aarch64-none-linux-gnu -mattr=+neon -aa-pipeline=basic-aa -passes='early-cse<memssa>' -normalize-opaque-pointers | FileCheck %s
 
 define <4 x i32> @test_cse(i32* %a, [2 x <4 x i32>] %s.coerce, i32 %n) {
 entry:
 ; Check that @llvm.aarch64.neon.ld2 is optimized away by Early CSE.
 ; CHECK-LABEL: @test_cse
-; CHECK-NOT: call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2.v4i32.p0i8
+; CHECK-NOT: call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2.v4i32.p0
   %s.coerce.fca.0.extract = extractvalue [2 x <4 x i32>] %s.coerce, 0
   %s.coerce.fca.1.extract = extractvalue [2 x <4 x i32>] %s.coerce, 1
   br label %for.cond
 
 for.cond:                                         ; preds = %for.body, %entry
   %i.0 = phi i32 [ 0, %entry ], [ %inc, %for.body ]
   %res.0 = phi <4 x i32> [ undef, %entry ], [ %call, %for.body ]
   %cmp = icmp slt i32 %i.0, %n

 for.end:                                          ; preds = %for.cond
   ret <4 x i32> %res.0
 }
 
 define <4 x i32> @test_cse2(i32* %a, [2 x <4 x i32>] %s.coerce, i32 %n) {
 entry:
 ; Check that the first @llvm.aarch64.neon.st2 is optimized away by Early CSE.
 ; CHECK-LABEL: @test_cse2
-; CHECK-NOT: call void @llvm.aarch64.neon.st2.v4i32.p0i8(<4 x i32> %3, <4 x i32> %3, i8* %0)
-; CHECK: call void @llvm.aarch64.neon.st2.v4i32.p0i8(<4 x i32> %s.coerce.fca.0.extract, <4 x i32> %s.coerce.fca.1.extract, i8* %0)
+; CHECK-NOT: call void @llvm.aarch64.neon.st2.v4i32.p0(<4 x i32> %3, <4 x i32> %3, ptr %0)
+; CHECK: call void @llvm.aarch64.neon.st2.v4i32.p0(<4 x i32> %s.coerce.fca.0.extract, <4 x i32> %s.coerce.fca.1.extract, ptr {{.*}})
   %s.coerce.fca.0.extract = extractvalue [2 x <4 x i32>] %s.coerce, 0
   %s.coerce.fca.1.extract = extractvalue [2 x <4 x i32>] %s.coerce, 1
   br label %for.cond
 
 for.cond:                                         ; preds = %for.body, %entry
   %i.0 = phi i32 [ 0, %entry ], [ %inc, %for.body ]
   %res.0 = phi <4 x i32> [ undef, %entry ], [ %call, %for.body ]
   %cmp = icmp slt i32 %i.0, %n

 for.end:                                          ; preds = %for.cond
   ret <4 x i32> %res.0
 }
 
 define <4 x i32> @test_cse3(i32* %a, [2 x <4 x i32>] %s.coerce, i32 %n) #0 {
 entry:
 ; Check that the first @llvm.aarch64.neon.ld2 is optimized away by Early CSE.
 ; CHECK-LABEL: @test_cse3
-; CHECK: call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2.v4i32.p0i8
-; CHECK-NOT: call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2.v4i32.p0i8
+; CHECK: call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2.v4i32.p0
+; CHECK-NOT: call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2.v4i32.p0
   %s.coerce.fca.0.extract = extractvalue [2 x <4 x i32>] %s.coerce, 0
   %s.coerce.fca.1.extract = extractvalue [2 x <4 x i32>] %s.coerce, 1
   br label %for.cond
 
 for.cond:                                         ; preds = %for.body, %entry
   %i.0 = phi i32 [ 0, %entry ], [ %inc, %for.body ]
   %res.0 = phi <4 x i32> [ undef, %entry ], [ %call, %for.body ]
   %cmp = icmp slt i32 %i.0, %n

 }
 
 
 define <4 x i32> @test_nocse(i32* %a, i32* %b, [2 x <4 x i32>] %s.coerce, i32 %n) {
 entry:
 ; Check that the store prevents @llvm.aarch64.neon.ld2 from being optimized
 ; away by Early CSE.
 ; CHECK-LABEL: @test_nocse
-; CHECK: call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2.v4i32.p0i8
+; CHECK: call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2.v4i32.p0
   %s.coerce.fca.0.extract = extractvalue [2 x <4 x i32>] %s.coerce, 0
   %s.coerce.fca.1.extract = extractvalue [2 x <4 x i32>] %s.coerce, 1
   br label %for.cond
 
 for.cond:                                         ; preds = %for.body, %entry
   %i.0 = phi i32 [ 0, %entry ], [ %inc, %for.body ]
   %res.0 = phi <4 x i32> [ undef, %entry ], [ %call, %for.body ]
   %cmp = icmp slt i32 %i.0, %n
for.end:                                          ; preds = %for.cond
   ret <4 x i32> %res.0
 }
 
 define <4 x i32> @test_nocse2(i32* %a, [2 x <4 x i32>] %s.coerce, i32 %n) {
 entry:
 ; Check that @llvm.aarch64.neon.ld3 is not optimized away by Early CSE due
 ; to mismatch between st2 and ld3.
 ; CHECK-LABEL: @test_nocse2
-; CHECK: call { <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld3.v4i32.p0i8
+; CHECK: call { <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld3.v4i32.p0
   %s.coerce.fca.0.extract = extractvalue [2 x <4 x i32>] %s.coerce, 0
   %s.coerce.fca.1.extract = extractvalue [2 x <4 x i32>] %s.coerce, 1
   br label %for.cond
 
 for.cond:                                         ; preds = %for.body, %entry
   %i.0 = phi i32 [ 0, %entry ], [ %inc, %for.body ]
   %res.0 = phi <4 x i32> [ undef, %entry ], [ %call, %for.body ]
   %cmp = icmp slt i32 %i.0, %n
for.end:                                          ; preds = %for.cond
   ret <4 x i32> %res.0
 }
 
 define <4 x i32> @test_nocse3(i32* %a, [2 x <4 x i32>] %s.coerce, i32 %n) {
 entry:
 ; Check that @llvm.aarch64.neon.st3 is not optimized away by Early CSE due to
 ; mismatch between st2 and st3.
 ; CHECK-LABEL: @test_nocse3
-; CHECK: call void @llvm.aarch64.neon.st3.v4i32.p0i8
-; CHECK: call void @llvm.aarch64.neon.st2.v4i32.p0i8
+; CHECK: call void @llvm.aarch64.neon.st3.v4i32.p0
+; CHECK: call void @llvm.aarch64.neon.st2.v4i32.p0
   %s.coerce.fca.0.extract = extractvalue [2 x <4 x i32>] %s.coerce, 0
   %s.coerce.fca.1.extract = extractvalue [2 x <4 x i32>] %s.coerce, 1
   br label %for.cond
 
 for.cond:                                         ; preds = %for.body, %entry
   %i.0 = phi i32 [ 0, %entry ], [ %inc, %for.body ]
   %res.0 = phi <4 x i32> [ undef, %entry ], [ %call, %for.body ]
   %cmp = icmp slt i32 %i.0, %n

llvm/test/Transforms/EarlyCSE/atomics.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt < %s -S -early-cse -earlycse-debug-hash | FileCheck %s
-; RUN: opt < %s -S -basic-aa -early-cse-memssa | FileCheck %s
+; RUN: opt < %s -S -early-cse -earlycse-debug-hash -normalize-opaque-pointers | FileCheck %s
+; RUN: opt < %s -S -basic-aa -early-cse-memssa -normalize-opaque-pointers | FileCheck %s
 
 define i32 @test12(i1 %B, i32* %P1, i32* %P2) {
 ; CHECK-LABEL: @test12(
-; CHECK-NEXT:    [[LOAD0:%.*]] = load i32, i32* [[P1:%.*]], align 4
-; CHECK-NEXT:    [[TMP1:%.*]] = load atomic i32, i32* [[P2:%.*]] seq_cst, align 4
-; CHECK-NEXT:    [[LOAD1:%.*]] = load i32, i32* [[P1]], align 4
+; CHECK-NEXT:    [[LOAD0:%.*]] = load i32, ptr [[P1:%.*]], align 4
+; CHECK-NEXT:    [[TMP1:%.*]] = load atomic i32, ptr [[P2:%.*]] seq_cst, align 4
+; CHECK-NEXT:    [[LOAD1:%.*]] = load i32, ptr [[P1]], align 4
 ; CHECK-NEXT:    [[SEL:%.*]] = select i1 [[B:%.*]], i32 [[LOAD0]], i32 [[LOAD1]]
 ; CHECK-NEXT:    ret i32 [[SEL]]
 ;
   %load0 = load i32, i32* %P1
   %1 = load atomic i32, i32* %P2 seq_cst, align 4
   %load1 = load i32, i32* %P1
   %sel = select i1 %B, i32 %load0, i32 %load1
   ret i32 %sel
 }
 
 ; atomic to non-atomic forwarding is legal
 define i32 @test13(i1 %B, i32* %P1) {
 ; CHECK-LABEL: @test13(
-; CHECK-NEXT:    [[A:%.*]] = load atomic i32, i32* [[P1:%.*]] seq_cst, align 4
+; CHECK-NEXT:    [[A:%.*]] = load atomic i32, ptr [[P1:%.*]] seq_cst, align 4
 ; CHECK-NEXT:    ret i32 0
 ;
   %a = load atomic i32, i32* %P1 seq_cst, align 4
   %b = load i32, i32* %P1
   %res = sub i32 %a, %b
   ret i32 %res
 }
 
 ; atomic to unordered atomic forwarding is legal
 define i32 @test14(i1 %B, i32* %P1) {
 ; CHECK-LABEL: @test14(
-; CHECK-NEXT:    [[A:%.*]] = load atomic i32, i32* [[P1:%.*]] seq_cst, align 4
+; CHECK-NEXT:    [[A:%.*]] = load atomic i32, ptr [[P1:%.*]] seq_cst, align 4
 ; CHECK-NEXT:    ret i32 0
 ;
   %a = load atomic i32, i32* %P1 seq_cst, align 4
   %b = load atomic i32, i32* %P1 unordered, align 4
   %res = sub i32 %a, %b
   ret i32 %res
 }
 
 ; implementation restriction: can't forward to stonger
 ; than unordered
 define i32 @test15(i1 %B, i32* %P1, i32* %P2) {
 ; CHECK-LABEL: @test15(
-; CHECK-NEXT:    [[A:%.*]] = load atomic i32, i32* [[P1:%.*]] seq_cst, align 4
-; CHECK-NEXT:    [[B:%.*]] = load atomic i32, i32* [[P1]] seq_cst, align 4
+; CHECK-NEXT:    [[A:%.*]] = load atomic i32, ptr [[P1:%.*]] seq_cst, align 4
+; CHECK-NEXT:    [[B:%.*]] = load atomic i32, ptr [[P1]] seq_cst, align 4
 ; CHECK-NEXT:    [[RES:%.*]] = sub i32 [[A]], [[B]]
 ; CHECK-NEXT:    ret i32 [[RES]]
 ;
   %a = load atomic i32, i32* %P1 seq_cst, align 4
   %b = load atomic i32, i32* %P1 seq_cst, align 4
   %res = sub i32 %a, %b
   ret i32 %res
 }
 
 ; forwarding non-atomic to atomic is wrong! (However,
 ; it would be legal to use the later value in place of the
 ; former in this particular example.  We just don't
 ; do that right now.)
 define i32 @test16(i1 %B, i32* %P1, i32* %P2) {
 ; CHECK-LABEL: @test16(
-; CHECK-NEXT:    [[A:%.*]] = load i32, i32* [[P1:%.*]], align 4
-; CHECK-NEXT:    [[B:%.*]] = load atomic i32, i32* [[P1]] unordered, align 4
+; CHECK-NEXT:    [[A:%.*]] = load i32, ptr [[P1:%.*]], align 4
+; CHECK-NEXT:    [[B:%.*]] = load atomic i32, ptr [[P1]] unordered, align 4
 ; CHECK-NEXT:    [[RES:%.*]] = sub i32 [[A]], [[B]]
 ; CHECK-NEXT:    ret i32 [[RES]]
 ;
   %a = load i32, i32* %P1, align 4
   %b = load atomic i32, i32* %P1 unordered, align 4
   %res = sub i32 %a, %b
   ret i32 %res
 }
 
 ; Can't DSE across a full fence
 define void @fence_seq_cst_store(i1 %B, i32* %P1, i32* %P2) {
 ; CHECK-LABEL: @fence_seq_cst_store(
-; CHECK-NEXT:    store i32 0, i32* [[P1:%.*]], align 4
-; CHECK-NEXT:    store atomic i32 0, i32* [[P2:%.*]] seq_cst, align 4
-; CHECK-NEXT:    store i32 0, i32* [[P1]], align 4
+; CHECK-NEXT:    store i32 0, ptr [[P1:%.*]], align 4
+; CHECK-NEXT:    store atomic i32 0, ptr [[P2:%.*]] seq_cst, align 4
+; CHECK-NEXT:    store i32 0, ptr [[P1]], align 4
 ; CHECK-NEXT:    ret void
 ;
   store i32 0, i32* %P1, align 4
   store atomic i32 0, i32* %P2 seq_cst, align 4
   store i32 0, i32* %P1, align 4
   ret void
 }
 
 ; Can't DSE across a full fence
 define void @fence_seq_cst(i1 %B, i32* %P1, i32* %P2) {
 ; CHECK-LABEL: @fence_seq_cst(
-; CHECK-NEXT:    store i32 0, i32* [[P1:%.*]], align 4
+; CHECK-NEXT:    store i32 0, ptr [[P1:%.*]], align 4
 ; CHECK-NEXT:    fence seq_cst
-; CHECK-NEXT:    store i32 0, i32* [[P1]], align 4
+; CHECK-NEXT:    store i32 0, ptr [[P1]], align 4
 ; CHECK-NEXT:    ret void
 ;
   store i32 0, i32* %P1, align 4
   fence seq_cst
   store i32 0, i32* %P1, align 4
   ret void
 }
 
 ; Can't DSE across a full fence
 define void @fence_asm_sideeffect(i1 %B, i32* %P1, i32* %P2) {
 ; CHECK-LABEL: @fence_asm_sideeffect(
-; CHECK-NEXT:    store i32 0, i32* [[P1:%.*]], align 4
+; CHECK-NEXT:    store i32 0, ptr [[P1:%.*]], align 4
 ; CHECK-NEXT:    call void asm sideeffect "", ""()
-; CHECK-NEXT:    store i32 0, i32* [[P1]], align 4
+; CHECK-NEXT:    store i32 0, ptr [[P1]], align 4
 ; CHECK-NEXT:    ret void
 ;
   store i32 0, i32* %P1, align 4
   call void asm sideeffect "", ""()
   store i32 0, i32* %P1, align 4
   ret void
 }
 
 ; Can't DSE across a full fence
 define void @fence_asm_memory(i1 %B, i32* %P1, i32* %P2) {
 ; CHECK-LABEL: @fence_asm_memory(
-; CHECK-NEXT:    store i32 0, i32* [[P1:%.*]], align 4
+; CHECK-NEXT:    store i32 0, ptr [[P1:%.*]], align 4
 ; CHECK-NEXT:    call void asm "", "~{memory}"()
-; CHECK-NEXT:    store i32 0, i32* [[P1]], align 4
+; CHECK-NEXT:    store i32 0, ptr [[P1]], align 4
 ; CHECK-NEXT:    ret void
 ;
   store i32 0, i32* %P1, align 4
   call void asm "", "~{memory}"()
   store i32 0, i32* %P1, align 4
   ret void
 }
 
 ; Can't remove a volatile load
 define i32 @volatile_load(i1 %B, i32* %P1, i32* %P2) {
 ; CHECK-LABEL: @volatile_load(
-; CHECK-NEXT:    [[A:%.*]] = load i32, i32* [[P1:%.*]], align 4
-; CHECK-NEXT:    [[B:%.*]] = load volatile i32, i32* [[P1]], align 4
+; CHECK-NEXT:    [[A:%.*]] = load i32, ptr [[P1:%.*]], align 4
+; CHECK-NEXT:    [[B:%.*]] = load volatile i32, ptr [[P1]], align 4
 ; CHECK-NEXT:    [[RES:%.*]] = sub i32 [[A]], [[B]]
 ; CHECK-NEXT:    ret i32 [[RES]]
 ;
   %a = load i32, i32* %P1, align 4
   %b = load volatile i32, i32* %P1, align 4
   %res = sub i32 %a, %b
   ret i32 %res
 }
 
 ; Can't remove redundant volatile loads
 define i32 @redundant_volatile_load(i1 %B, i32* %P1, i32* %P2) {
 ; CHECK-LABEL: @redundant_volatile_load(
-; CHECK-NEXT:    [[A:%.*]] = load volatile i32, i32* [[P1:%.*]], align 4
-; CHECK-NEXT:    [[B:%.*]] = load volatile i32, i32* [[P1]], align 4
+; CHECK-NEXT:    [[A:%.*]] = load volatile i32, ptr [[P1:%.*]], align 4
+; CHECK-NEXT:    [[B:%.*]] = load volatile i32, ptr [[P1]], align 4
 ; CHECK-NEXT:    [[RES:%.*]] = sub i32 [[A]], [[B]]
 ; CHECK-NEXT:    ret i32 [[RES]]
 ;
   %a = load volatile i32, i32* %P1, align 4
   %b = load volatile i32, i32* %P1, align 4
   %res = sub i32 %a, %b
   ret i32 %res
 }
 
 ; Can't DSE a volatile store
 define void @volatile_store(i1 %B, i32* %P1, i32* %P2) {
 ; CHECK-LABEL: @volatile_store(
-; CHECK-NEXT:    store volatile i32 0, i32* [[P1:%.*]], align 4
-; CHECK-NEXT:    store i32 3, i32* [[P1]], align 4
+; CHECK-NEXT:    store volatile i32 0, ptr [[P1:%.*]], align 4
+; CHECK-NEXT:    store i32 3, ptr [[P1]], align 4
 ; CHECK-NEXT:    ret void
 ;
   store volatile i32 0, i32* %P1, align 4
   store i32 3, i32* %P1, align 4
   ret void
 }
 
 ; Can't DSE a redundant volatile store
 define void @redundant_volatile_store(i1 %B, i32* %P1, i32* %P2) {
 ; CHECK-LABEL: @redundant_volatile_store(
-; CHECK-NEXT:    store volatile i32 0, i32* [[P1:%.*]], align 4
-; CHECK-NEXT:    store volatile i32 0, i32* [[P1]], align 4
+; CHECK-NEXT:    store volatile i32 0, ptr [[P1:%.*]], align 4
+; CHECK-NEXT:    store volatile i32 0, ptr [[P1]], align 4
 ; CHECK-NEXT:    ret void
 ;
   store volatile i32 0, i32* %P1, align 4
   store volatile i32 0, i32* %P1, align 4
   ret void
 }
 
 ; Can value forward from volatiles
 define i32 @test20(i1 %B, i32* %P1, i32* %P2) {
 ; CHECK-LABEL: @test20(
-; CHECK-NEXT:    [[A:%.*]] = load volatile i32, i32* [[P1:%.*]], align 4
+; CHECK-NEXT:    [[A:%.*]] = load volatile i32, ptr [[P1:%.*]], align 4
 ; CHECK-NEXT:    ret i32 0
 ;
   %a = load volatile i32, i32* %P1, align 4
   %b = load i32, i32* %P1, align 4
   %res = sub i32 %a, %b
   ret i32 %res
 }
 
 ; Can DSE a non-volatile store in favor of a volatile one
 ; currently a missed optimization
 define void @test21(i1 %B, i32* %P1, i32* %P2) {
 ; CHECK-LABEL: @test21(
-; CHECK-NEXT:    store i32 0, i32* [[P1:%.*]], align 4
-; CHECK-NEXT:    store volatile i32 3, i32* [[P1]], align 4
+; CHECK-NEXT:    store i32 0, ptr [[P1:%.*]], align 4
+; CHECK-NEXT:    store volatile i32 3, ptr [[P1]], align 4
 ; CHECK-NEXT:    ret void
 ;
   store i32 0, i32* %P1, align 4
   store volatile i32 3, i32* %P1, align 4
   ret void
 }
 
 ; Can DSE a normal store in favor of a unordered one
 define void @test22(i1 %B, i32* %P1, i32* %P2) {
 ; CHECK-LABEL: @test22(
-; CHECK-NEXT:    store atomic i32 3, i32* [[P1:%.*]] unordered, align 4
+; CHECK-NEXT:    store atomic i32 3, ptr [[P1:%.*]] unordered, align 4
 ; CHECK-NEXT:    ret void
 ;
   store i32 0, i32* %P1, align 4
   store atomic i32 3, i32* %P1 unordered, align 4
   ret void
 }
 
 ; Can also DSE a unordered store in favor of a normal one
 define void @test23(i1 %B, i32* %P1, i32* %P2) {
 ; CHECK-LABEL: @test23(
-; CHECK-NEXT:    store i32 0, i32* [[P1:%.*]], align 4
+; CHECK-NEXT:    store i32 0, ptr [[P1:%.*]], align 4
 ; CHECK-NEXT:    ret void
 ;
   store atomic i32 3, i32* %P1 unordered, align 4
   store i32 0, i32* %P1, align 4
   ret void
 }
 
 ; As an implementation limitation, can't remove ordered stores
 ; Note that we could remove the earlier store if we could
 ; represent the required ordering.
 define void @test24(i1 %B, i32* %P1, i32* %P2) {
 ; CHECK-LABEL: @test24(
-; CHECK-NEXT:    store atomic i32 3, i32* [[P1:%.*]] release, align 4
-; CHECK-NEXT:    store i32 0, i32* [[P1]], align 4
+; CHECK-NEXT:    store atomic i32 3, ptr [[P1:%.*]] release, align 4
+; CHECK-NEXT:    store i32 0, ptr [[P1]], align 4
 ; CHECK-NEXT:    ret void
 ;
   store atomic i32 3, i32* %P1 release, align 4
   store i32 0, i32* %P1, align 4
   ret void
 }
 
 ; Can't remove volatile stores - each is independently observable and
 ; the count of such stores is an observable program side effect.
 define void @test25(i1 %B, i32* %P1, i32* %P2) {
 ; CHECK-LABEL: @test25(
-; CHECK-NEXT:    store volatile i32 3, i32* [[P1:%.*]], align 4
-; CHECK-NEXT:    store volatile i32 0, i32* [[P1]], align 4
+; CHECK-NEXT:    store volatile i32 3, ptr [[P1:%.*]], align 4
+; CHECK-NEXT:    store volatile i32 0, ptr [[P1]], align 4
 ; CHECK-NEXT:    ret void
 ;
   store volatile i32 3, i32* %P1, align 4
   store volatile i32 0, i32* %P1, align 4
   ret void
 }
 
 ; Can DSE a unordered store in favor of a unordered one
 define void @test26(i1 %B, i32* %P1, i32* %P2) {
 ; CHECK-LABEL: @test26(
-; CHECK-NEXT:    store atomic i32 3, i32* [[P1:%.*]] unordered, align 4
+; CHECK-NEXT:    store atomic i32 3, ptr [[P1:%.*]] unordered, align 4
 ; CHECK-NEXT:    ret void
 ;
   store atomic i32 0, i32* %P1 unordered, align 4
   store atomic i32 3, i32* %P1 unordered, align 4
   ret void
 }
 
 ; Can DSE a unordered store in favor of a ordered one,
 ; but current don't due to implementation limits
 define void @test27(i1 %B, i32* %P1, i32* %P2) {
 ; CHECK-LABEL: @test27(
-; CHECK-NEXT:    store atomic i32 0, i32* [[P1:%.*]] unordered, align 4
-; CHECK-NEXT:    store atomic i32 3, i32* [[P1]] release, align 4
+; CHECK-NEXT:    store atomic i32 0, ptr [[P1:%.*]] unordered, align 4
+; CHECK-NEXT:    store atomic i32 3, ptr [[P1]] release, align 4
 ; CHECK-NEXT:    ret void
 ;
   store atomic i32 0, i32* %P1 unordered, align 4
   store atomic i32 3, i32* %P1 release, align 4
   ret void
 }
 
 ; Can DSE an unordered atomic store in favor of an
 ; ordered one, but current don't due to implementation limits
 define void @test28(i1 %B, i32* %P1, i32* %P2) {
 ; CHECK-LABEL: @test28(
-; CHECK-NEXT:    store atomic i32 0, i32* [[P1:%.*]] unordered, align 4
-; CHECK-NEXT:    store atomic i32 3, i32* [[P1]] release, align 4
+; CHECK-NEXT:    store atomic i32 0, ptr [[P1:%.*]] unordered, align 4
+; CHECK-NEXT:    store atomic i32 3, ptr [[P1]] release, align 4
 ; CHECK-NEXT:    ret void
 ;
   store atomic i32 0, i32* %P1 unordered, align 4
   store atomic i32 3, i32* %P1 release, align 4
   ret void
 }
 
 ; As an implementation limitation, can't remove ordered stores
 ; see also: @test24
 define void @test29(i1 %B, i32* %P1, i32* %P2) {
 ; CHECK-LABEL: @test29(
-; CHECK-NEXT:    store atomic i32 3, i32* [[P1:%.*]] release, align 4
-; CHECK-NEXT:    store atomic i32 0, i32* [[P1]] unordered, align 4
+; CHECK-NEXT:    store atomic i32 3, ptr [[P1:%.*]] release, align 4
+; CHECK-NEXT:    store atomic i32 0, ptr [[P1]] unordered, align 4
 ; CHECK-NEXT:    ret void
 ;
   store atomic i32 3, i32* %P1 release, align 4
   store atomic i32 0, i32* %P1 unordered, align 4
   ret void
 }

llvm/test/Transforms/EarlyCSE/basic.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt < %s -S -early-cse -earlycse-debug-hash | FileCheck %s
-; RUN: opt < %s -S -basic-aa -early-cse-memssa | FileCheck %s
-; RUN: opt < %s -S -passes=early-cse | FileCheck %s
+; RUN: opt < %s -S -early-cse -earlycse-debug-hash -normalize-opaque-pointers | FileCheck %s
+; RUN: opt < %s -S -basic-aa -early-cse-memssa -normalize-opaque-pointers | FileCheck %s
+; RUN: opt < %s -S -passes=early-cse -normalize-opaque-pointers | FileCheck %s
 
 declare void @llvm.assume(i1) nounwind
 
 define void @test1(i8 %V, i32 *%P) {
 ; CHECK-LABEL: @test1(
-; CHECK-NEXT:    store i32 23, i32* [[P:%.*]], align 4
+; CHECK-NEXT:    store i32 23, ptr [[P:%.*]], align 4
 ; CHECK-NEXT:    [[C:%.*]] = zext i8 [[V:%.*]] to i32
-; CHECK-NEXT:    store volatile i32 [[C]], i32* [[P]], align 4
-; CHECK-NEXT:    store volatile i32 [[C]], i32* [[P]], align 4
+; CHECK-NEXT:    store volatile i32 [[C]], ptr [[P]], align 4
+; CHECK-NEXT:    store volatile i32 [[C]], ptr [[P]], align 4
 ; CHECK-NEXT:    [[E:%.*]] = add i32 [[C]], [[C]]
-; CHECK-NEXT:    store volatile i32 [[E]], i32* [[P]], align 4
-; CHECK-NEXT:    store volatile i32 [[E]], i32* [[P]], align 4
-; CHECK-NEXT:    store volatile i32 [[E]], i32* [[P]], align 4
+; CHECK-NEXT:    store volatile i32 [[E]], ptr [[P]], align 4
+; CHECK-NEXT:    store volatile i32 [[E]], ptr [[P]], align 4
+; CHECK-NEXT:    store volatile i32 [[E]], ptr [[P]], align 4
 ; CHECK-NEXT:    ret void
 ;
   %A = bitcast i64 42 to double  ;; dead
   %B = add i32 4, 19             ;; constant folds
   store i32 %B, i32* %P
 
   %C = zext i8 %V to i32
   %D = zext i8 %V to i32  ;; CSE
;
   store volatile i32 %G, i32* %P
   ret void
 }
 
 
 ;; Simple load value numbering.
 define i32 @test2(i32 *%P) {
 ; CHECK-LABEL: @test2(
-; CHECK-NEXT:    [[V1:%.*]] = load i32, i32* [[P:%.*]], align 4
+; CHECK-NEXT:    [[V1:%.*]] = load i32, ptr [[P:%.*]], align 4
 ; CHECK-NEXT:    ret i32 0
 ;
   %V1 = load i32, i32* %P
   %V2 = load i32, i32* %P
   %Diff = sub i32 %V1, %V2
   ret i32 %Diff
 }
 
 define i32 @test2a(i32 *%P, i1 %b) {
 ; CHECK-LABEL: @test2a(
-; CHECK-NEXT:    [[V1:%.*]] = load i32, i32* [[P:%.*]], align 4
+; CHECK-NEXT:    [[V1:%.*]] = load i32, ptr [[P:%.*]], align 4
 ; CHECK-NEXT:    tail call void @llvm.assume(i1 [[B:%.*]])
 ; CHECK-NEXT:    ret i32 0
 ;
   %V1 = load i32, i32* %P
   tail call void @llvm.assume(i1 %b)
   %V2 = load i32, i32* %P
   %Diff = sub i32 %V1, %V2
   ret i32 %Diff
 }
 
 ;; Cross block load value numbering.
 define i32 @test3(i32 *%P, i1 %Cond) {
 ; CHECK-LABEL: @test3(
-; CHECK-NEXT:    [[V1:%.*]] = load i32, i32* [[P:%.*]], align 4
+; CHECK-NEXT:    [[V1:%.*]] = load i32, ptr [[P:%.*]], align 4
 ; CHECK-NEXT:    br i1 [[COND:%.*]], label [[T:%.*]], label [[F:%.*]]
 ; CHECK:       T:
-; CHECK-NEXT:    store i32 4, i32* [[P]], align 4
+; CHECK-NEXT:    store i32 4, ptr [[P]], align 4
 ; CHECK-NEXT:    ret i32 42
 ; CHECK:       F:
 ; CHECK-NEXT:    ret i32 0
 ;
   %V1 = load i32, i32* %P
   br i1 %Cond, label %T, label %F
 T:
   store i32 4, i32* %P
   ret i32 42
 F:
   %V2 = load i32, i32* %P
   %Diff = sub i32 %V1, %V2
   ret i32 %Diff
 }
 
 define i32 @test3a(i32 *%P, i1 %Cond, i1 %b) {
 ; CHECK-LABEL: @test3a(
-; CHECK-NEXT:    [[V1:%.*]] = load i32, i32* [[P:%.*]], align 4
+; CHECK-NEXT:    [[V1:%.*]] = load i32, ptr [[P:%.*]], align 4
 ; CHECK-NEXT:    br i1 [[COND:%.*]], label [[T:%.*]], label [[F:%.*]]
 ; CHECK:       T:
-; CHECK-NEXT:    store i32 4, i32* [[P]], align 4
+; CHECK-NEXT:    store i32 4, ptr [[P]], align 4
 ; CHECK-NEXT:    ret i32 42
 ; CHECK:       F:
 ; CHECK-NEXT:    tail call void @llvm.assume(i1 [[B:%.*]])
 ; CHECK-NEXT:    ret i32 0
 ;
   %V1 = load i32, i32* %P
   br i1 %Cond, label %T, label %F
 T:
   store i32 4, i32* %P
   ret i32 42
 F:
   tail call void @llvm.assume(i1 %b)
   %V2 = load i32, i32* %P
   %Diff = sub i32 %V1, %V2
   ret i32 %Diff
 }
 
 ;; Cross block load value numbering stops when stores happen.
 define i32 @test4(i32 *%P, i1 %Cond) {
 ; CHECK-LABEL: @test4(
-; CHECK-NEXT:    [[V1:%.*]] = load i32, i32* [[P:%.*]], align 4
+; CHECK-NEXT:    [[V1:%.*]] = load i32, ptr [[P:%.*]], align 4
 ; CHECK-NEXT:    br i1 [[COND:%.*]], label [[T:%.*]], label [[F:%.*]]
 ; CHECK:       T:
 ; CHECK-NEXT:    ret i32 42
 ; CHECK:       F:
-; CHECK-NEXT:    store i32 42, i32* [[P]], align 4
+; CHECK-NEXT:    store i32 42, ptr [[P]], align 4
 ; CHECK-NEXT:    [[DIFF:%.*]] = sub i32 [[V1]], 42
 ; CHECK-NEXT:    ret i32 [[DIFF]]
 ;
   %V1 = load i32, i32* %P
   br i1 %Cond, label %T, label %F
 T:
   ret i32 42
 F:
   ; Clobbers V1
   store i32 42, i32* %P
 
   %V2 = load i32, i32* %P
   %Diff = sub i32 %V1, %V2
   ret i32 %Diff
 }
 
 declare i32 @func(i32 *%P) readonly
 
 ;; Simple call CSE'ing.
 define i32 @test5(i32 *%P) {
 ; CHECK-LABEL: @test5(
-; CHECK-NEXT:    [[V1:%.*]] = call i32 @func(i32* [[P:%.*]])
+; CHECK-NEXT:    [[V1:%.*]] = call i32 @func(ptr [[P:%.*]])
 ; CHECK-NEXT:    ret i32 0
 ;
   %V1 = call i32 @func(i32* %P)
   %V2 = call i32 @func(i32* %P)
   %Diff = sub i32 %V1, %V2
   ret i32 %Diff
 }
 
 ;; Trivial Store->load forwarding
 define i32 @test6(i32 *%P) {
 ; CHECK-LABEL: @test6(
-; CHECK-NEXT:    store i32 42, i32* [[P:%.*]], align 4
+; CHECK-NEXT:    store i32 42, ptr [[P:%.*]], align 4
 ; CHECK-NEXT:    ret i32 42
 ;
   store i32 42, i32* %P
   %V1 = load i32, i32* %P
   ret i32 %V1
 }
 
 define i32 @test6a(i32 *%P, i1 %b) {
 ; CHECK-LABEL: @test6a(
-; CHECK-NEXT:    store i32 42, i32* [[P:%.*]], align 4
+; CHECK-NEXT:    store i32 42, ptr [[P:%.*]], align 4
 ; CHECK-NEXT:    tail call void @llvm.assume(i1 [[B:%.*]])
 ; CHECK-NEXT:    ret i32 42
 ;
   store i32 42, i32* %P
   tail call void @llvm.assume(i1 %b)
   %V1 = load i32, i32* %P
   ret i32 %V1
 }
 
 ;; Trivial dead store elimination.
 define void @test7(i32 *%P) {
 ; CHECK-LABEL: @test7(
-; CHECK-NEXT:    store i32 45, i32* [[P:%.*]], align 4
+; CHECK-NEXT:    store i32 45, ptr [[P:%.*]], align 4
 ; CHECK-NEXT:    ret void
 ;
   store i32 42, i32* %P
   store i32 45, i32* %P
   ret void
 }
 
 ;; Readnone functions aren't invalidated by stores.
 define i32 @test8(i32 *%P) {
 ; CHECK-LABEL: @test8(
-; CHECK-NEXT:    [[V1:%.*]] = call i32 @func(i32* [[P:%.*]]) #[[ATTR2:[0-9]+]]
-; CHECK-NEXT:    store i32 4, i32* [[P]], align 4
+; CHECK-NEXT:    [[V1:%.*]] = call i32 @func(ptr [[P:%.*]]) #[[ATTR2:[0-9]+]]
+; CHECK-NEXT:    store i32 4, ptr [[P]], align 4
 ; CHECK-NEXT:    ret i32 0
 ;
   %V1 = call i32 @func(i32* %P) readnone
   store i32 4, i32* %P
   %V2 = call i32 @func(i32* %P) readnone
   %Diff = sub i32 %V1, %V2
   ret i32 %Diff
 }
 
 ;; Trivial DSE can't be performed across a readonly call.  The call
 ;; can observe the earlier write.
 define i32 @test9(i32 *%P) {
 ; CHECK-LABEL: @test9(
-; CHECK-NEXT:    store i32 4, i32* [[P:%.*]], align 4
-; CHECK-NEXT:    [[V1:%.*]] = call i32 @func(i32* [[P]]) #[[ATTR1:[0-9]+]]
-; CHECK-NEXT:    store i32 5, i32* [[P]], align 4
+; CHECK-NEXT:    store i32 4, ptr [[P:%.*]], align 4
+; CHECK-NEXT:    [[V1:%.*]] = call i32 @func(ptr [[P]]) #[[ATTR1:[0-9]+]]
+; CHECK-NEXT:    store i32 5, ptr [[P]], align 4
 ; CHECK-NEXT:    ret i32 [[V1]]
 ;
   store i32 4, i32* %P
   %V1 = call i32 @func(i32* %P) readonly
   store i32 5, i32* %P
   ret i32 %V1
 }
 
 ;; Trivial DSE can be performed across a readnone call.
 define i32 @test10(i32 *%P) {
 ; CHECK-LABEL: @test10(
-; CHECK-NEXT:    [[V1:%.*]] = call i32 @func(i32* [[P:%.*]]) #[[ATTR2]]
-; CHECK-NEXT:    store i32 5, i32* [[P]], align 4
+; CHECK-NEXT:    [[V1:%.*]] = call i32 @func(ptr [[P:%.*]]) #[[ATTR2]]
+; CHECK-NEXT:    store i32 5, ptr [[P]], align 4
 ; CHECK-NEXT:    ret i32 [[V1]]
 ;
   store i32 4, i32* %P
   %V1 = call i32 @func(i32* %P) readnone
   store i32 5, i32* %P
   ret i32 %V1
 }
 
 ;; Trivial dead store elimination - should work for an entire series of dead stores too.
 define void @test11(i32 *%P) {
 ; CHECK-LABEL: @test11(
-; CHECK-NEXT:    store i32 45, i32* [[P:%.*]], align 4
+; CHECK-NEXT:    store i32 45, ptr [[P:%.*]], align 4
 ; CHECK-NEXT:    ret void
 ;
   store i32 42, i32* %P
   store i32 43, i32* %P
   store i32 44, i32* %P
   store i32 45, i32* %P
   ret void
 }
 
 define i32 @test12(i1 %B, i32* %P1, i32* %P2) {
 ; CHECK-LABEL: @test12(
-; CHECK-NEXT:    [[LOAD0:%.*]] = load i32, i32* [[P1:%.*]], align 4
-; CHECK-NEXT:    [[TMP1:%.*]] = load atomic i32, i32* [[P2:%.*]] seq_cst, align 4
-; CHECK-NEXT:    [[LOAD1:%.*]] = load i32, i32* [[P1]], align 4
+; CHECK-NEXT:    [[LOAD0:%.*]] = load i32, ptr [[P1:%.*]], align 4
+; CHECK-NEXT:    [[TMP1:%.*]] = load atomic i32, ptr [[P2:%.*]] seq_cst, align 4
+; CHECK-NEXT:    [[LOAD1:%.*]] = load i32, ptr [[P1]], align 4
 ; CHECK-NEXT:    [[SEL:%.*]] = select i1 [[B:%.*]], i32 [[LOAD0]], i32 [[LOAD1]]
 ; CHECK-NEXT:    ret i32 [[SEL]]
 ;
   %load0 = load i32, i32* %P1
   %1 = load atomic i32, i32* %P2 seq_cst, align 4
   %load1 = load i32, i32* %P1
   %sel = select i1 %B, i32 %load0, i32 %load1
   ret i32 %sel
 }
 
 define void @dse1(i32 *%P) {
 ; CHECK-LABEL: @dse1(
-; CHECK-NEXT:    [[V:%.*]] = load i32, i32* [[P:%.*]], align 4
+; CHECK-NEXT:    [[V:%.*]] = load i32, ptr [[P:%.*]], align 4
 ; CHECK-NEXT:    ret void
 ;
   %v = load i32, i32* %P
   store i32 %v, i32* %P
   ret void
 }
 
 define void @dse2(i32 *%P) {
 ; CHECK-LABEL: @dse2(
-; CHECK-NEXT:    [[V:%.*]] = load atomic i32, i32* [[P:%.*]] seq_cst, align 4
+; CHECK-NEXT:    [[V:%.*]] = load atomic i32, ptr [[P:%.*]] seq_cst, align 4
 ; CHECK-NEXT:    ret void
 ;
   %v = load atomic i32, i32* %P seq_cst, align 4
   store i32 %v, i32* %P
   ret void
 }
 
 define void @dse3(i32 *%P) {
 ; CHECK-LABEL: @dse3(
-; CHECK-NEXT:    [[V:%.*]] = load atomic i32, i32* [[P:%.*]] seq_cst, align 4
+; CHECK-NEXT:    [[V:%.*]] = load atomic i32, ptr [[P:%.*]] seq_cst, align 4
 ; CHECK-NEXT:    ret void
 ;
   %v = load atomic i32, i32* %P seq_cst, align 4
   store atomic i32 %v, i32* %P unordered, align 4
   ret void
 }
 
 define i32 @dse4(i32 *%P, i32 *%Q) {
 ; CHECK-LABEL: @dse4(
-; CHECK-NEXT:    [[A:%.*]] = load i32, i32* [[Q:%.*]], align 4
-; CHECK-NEXT:    [[V:%.*]] = load atomic i32, i32* [[P:%.*]] unordered, align 4
+; CHECK-NEXT:    [[A:%.*]] = load i32, ptr [[Q:%.*]], align 4
+; CHECK-NEXT:    [[V:%.*]] = load atomic i32, ptr [[P:%.*]] unordered, align 4
 ; CHECK-NEXT:    ret i32 0
 ;
   %a = load i32, i32* %Q
   %v = load atomic i32, i32* %P unordered, align 4
   store atomic i32 %v, i32* %P unordered, align 4
   %b = load i32, i32* %Q
   %res = sub i32 %a, %b
   ret i32 %res
 }
 
 ; Note that in this example, %P and %Q could in fact be the same
 ; pointer.  %v could be different than the value observed for %a
 ; and that's okay because we're using relaxed memory ordering.
 ; The only guarantee we have to provide is that each of the loads
 ; has to observe some value written to that location.  We  do
 ; not have to respect the order in which those writes were done.
 define i32 @dse5(i32 *%P, i32 *%Q) {
 ; CHECK-LABEL: @dse5(
-; CHECK-NEXT:    [[V:%.*]] = load atomic i32, i32* [[P:%.*]] unordered, align 4
-; CHECK-NEXT:    [[A:%.*]] = load atomic i32, i32* [[Q:%.*]] unordered, align 4
+; CHECK-NEXT:    [[V:%.*]] = load atomic i32, ptr [[P:%.*]] unordered, align 4
+; CHECK-NEXT:    [[A:%.*]] = load atomic i32, ptr [[Q:%.*]] unordered, align 4
 ; CHECK-NEXT:    ret i32 0
 ;
   %v = load atomic i32, i32* %P unordered, align 4
   %a = load atomic i32, i32* %Q unordered, align 4
   store atomic i32 %v, i32* %P unordered, align 4
   %b = load atomic i32, i32* %Q unordered, align 4
   %res = sub i32 %a, %b
   ret i32 %res
 }
 
 
 define void @dse_neg1(i32 *%P) {
 ; CHECK-LABEL: @dse_neg1(
-; CHECK-NEXT:    store i32 5, i32* [[P:%.*]], align 4
+; CHECK-NEXT:    store i32 5, ptr [[P:%.*]], align 4
 ; CHECK-NEXT:    ret void
 ;
   %v = load i32, i32* %P
   store i32 5, i32* %P
   ret void
 }
 
 ; Could remove the store, but only if ordering was somehow
 ; encoded.
 define void @dse_neg2(i32 *%P) {
 ; CHECK-LABEL: @dse_neg2(
-; CHECK-NEXT:    [[V:%.*]] = load i32, i32* [[P:%.*]], align 4
-; CHECK-NEXT:    store atomic i32 [[V]], i32* [[P]] seq_cst, align 4
+; CHECK-NEXT:    [[V:%.*]] = load i32, ptr [[P:%.*]], align 4
+; CHECK-NEXT:    store atomic i32 [[V]], ptr [[P]] seq_cst, align 4
 ; CHECK-NEXT:    ret void
 ;
   %v = load i32, i32* %P
   store atomic i32 %v, i32* %P seq_cst, align 4
   ret void
 }
 
 @c = external global i32, align 4
 declare i32 @reads_c(i32 returned)
 define void @pr28763() {
 ; CHECK-LABEL: @pr28763(
 ; CHECK-NEXT:  entry:
-; CHECK-NEXT:    store i32 0, i32* @c, align 4
+; CHECK-NEXT:    store i32 0, ptr @c, align 4
 ; CHECK-NEXT:    [[CALL:%.*]] = call i32 @reads_c(i32 0)
-; CHECK-NEXT:    store i32 2, i32* @c, align 4
+; CHECK-NEXT:    store i32 2, ptr @c, align 4
 ; CHECK-NEXT:    ret void
 ;
 entry:
   %load = load i32, i32* @c, align 4
   store i32 0, i32* @c, align 4
   %call = call i32 @reads_c(i32 0)
   store i32 2, i32* @c, align 4
   ret void

llvm/test/Transforms/EarlyCSE/commute.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt < %s -S -early-cse -earlycse-debug-hash | FileCheck %s
-; RUN: opt < %s -S -basic-aa -early-cse-memssa | FileCheck %s
+; RUN: opt < %s -S -early-cse -earlycse-debug-hash -normalize-opaque-pointers | FileCheck %s
+; RUN: opt < %s -S -basic-aa -early-cse-memssa -normalize-opaque-pointers | FileCheck %s
 
 define void @test1(float %A, float %B, float* %PA, float* %PB) {
 ; CHECK-LABEL: @test1(
 ; CHECK-NEXT:    [[C:%.*]] = fadd float [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    store float [[C]], float* [[PA:%.*]], align 4
-; CHECK-NEXT:    store float [[C]], float* [[PB:%.*]], align 4
+; CHECK-NEXT:    store float [[C]], ptr [[PA:%.*]], align 4
+; CHECK-NEXT:    store float [[C]], ptr [[PB:%.*]], align 4
 ; CHECK-NEXT:    ret void
 ;
   %C = fadd float %A, %B
   store float %C, float* %PA
   %D = fadd float %B, %A
   store float %D, float* %PB
   ret void
 }
 
 define void @test2(float %A, float %B, i1* %PA, i1* %PB) {
 ; CHECK-LABEL: @test2(
 ; CHECK-NEXT:    [[C:%.*]] = fcmp oeq float [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    store i1 [[C]], i1* [[PA:%.*]], align 1
-; CHECK-NEXT:    store i1 [[C]], i1* [[PB:%.*]], align 1
+; CHECK-NEXT:    store i1 [[C]], ptr [[PA:%.*]], align 1
+; CHECK-NEXT:    store i1 [[C]], ptr [[PB:%.*]], align 1
 ; CHECK-NEXT:    ret void
 ;
   %C = fcmp oeq float %A, %B
   store i1 %C, i1* %PA
   %D = fcmp oeq float %B, %A
   store i1 %D, i1* %PB
   ret void
 }
 
 define void @test3(float %A, float %B, i1* %PA, i1* %PB) {
 ; CHECK-LABEL: @test3(
 ; CHECK-NEXT:    [[C:%.*]] = fcmp uge float [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    store i1 [[C]], i1* [[PA:%.*]], align 1
-; CHECK-NEXT:    store i1 [[C]], i1* [[PB:%.*]], align 1
+; CHECK-NEXT:    store i1 [[C]], ptr [[PA:%.*]], align 1
+; CHECK-NEXT:    store i1 [[C]], ptr [[PB:%.*]], align 1
 ; CHECK-NEXT:    ret void
 ;
   %C = fcmp uge float %A, %B
   store i1 %C, i1* %PA
   %D = fcmp ule float %B, %A
   store i1 %D, i1* %PB
   ret void
 }
 
 define void @test4(i32 %A, i32 %B, i1* %PA, i1* %PB) {
 ; CHECK-LABEL: @test4(
 ; CHECK-NEXT:    [[C:%.*]] = icmp eq i32 [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    store i1 [[C]], i1* [[PA:%.*]], align 1
-; CHECK-NEXT:    store i1 [[C]], i1* [[PB:%.*]], align 1
+; CHECK-NEXT:    store i1 [[C]], ptr [[PA:%.*]], align 1
+; CHECK-NEXT:    store i1 [[C]], ptr [[PB:%.*]], align 1
 ; CHECK-NEXT:    ret void
 ;
   %C = icmp eq i32 %A, %B
   store i1 %C, i1* %PA
   %D = icmp eq i32 %B, %A
   store i1 %D, i1* %PB
   ret void
 }
 
 define void @test5(i32 %A, i32 %B, i1* %PA, i1* %PB) {
 ; CHECK-LABEL: @test5(
 ; CHECK-NEXT:    [[C:%.*]] = icmp sgt i32 [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    store i1 [[C]], i1* [[PA:%.*]], align 1
-; CHECK-NEXT:    store i1 [[C]], i1* [[PB:%.*]], align 1
+; CHECK-NEXT:    store i1 [[C]], ptr [[PA:%.*]], align 1
+; CHECK-NEXT:    store i1 [[C]], ptr [[PB:%.*]], align 1
 ; CHECK-NEXT:    ret void
 ;
   %C = icmp sgt i32 %A, %B
   store i1 %C, i1* %PA
   %D = icmp slt i32 %B, %A
   store i1 %D, i1* %PB
   ret void
 }
 
 ; Test degenerate case of commuted compare of identical comparands.
 
 define void @test6(float %f, i1* %p1, i1* %p2) {
 ; CHECK-LABEL: @test6(
 ; CHECK-NEXT:    [[C1:%.*]] = fcmp ult float [[F:%.*]], [[F]]
-; CHECK-NEXT:    store i1 [[C1]], i1* [[P1:%.*]], align 1
-; CHECK-NEXT:    store i1 [[C1]], i1* [[P2:%.*]], align 1
+; CHECK-NEXT:    store i1 [[C1]], ptr [[P1:%.*]], align 1
+; CHECK-NEXT:    store i1 [[C1]], ptr [[P2:%.*]], align 1
 ; CHECK-NEXT:    ret void
 ;
   %c1 = fcmp ult float %f, %f
   %c2 = fcmp ugt float %f, %f
   store i1 %c1, i1* %p1
   store i1 %c2, i1* %p2
   ret void
 }

 
 ; This test is a reproducer for a bug involving inverted min/max selects
 ; hashing differently but comparing as equal.  It exhibits such a pair of
 ; values, and we run this test with -earlycse-debug-hash which would catch
 ; the disagreement and fail if it regressed.  This test also includes a
 ; negation of each negation to check for the same issue one level deeper.
 define void @not_not_min(i32* %px, i32* %py, i32* %pout) {
 ; CHECK-LABEL: @not_not_min(
-; CHECK-NEXT:    [[X:%.*]] = load volatile i32, i32* [[PX:%.*]], align 4
-; CHECK-NEXT:    [[Y:%.*]] = load volatile i32, i32* [[PY:%.*]], align 4
+; CHECK-NEXT:    [[X:%.*]] = load volatile i32, ptr [[PX:%.*]], align 4
+; CHECK-NEXT:    [[Y:%.*]] = load volatile i32, ptr [[PY:%.*]], align 4
 ; CHECK-NEXT:    [[CMPA:%.*]] = icmp slt i32 [[X]], [[Y]]
 ; CHECK-NEXT:    [[CMPB:%.*]] = xor i1 [[CMPA]], true
 ; CHECK-NEXT:    [[RA:%.*]] = select i1 [[CMPA]], i32 [[X]], i32 [[Y]]
-; CHECK-NEXT:    store volatile i32 [[RA]], i32* [[POUT:%.*]], align 4
-; CHECK-NEXT:    store volatile i32 [[RA]], i32* [[POUT]], align 4
-; CHECK-NEXT:    store volatile i32 [[RA]], i32* [[POUT]], align 4
+; CHECK-NEXT:    store volatile i32 [[RA]], ptr [[POUT:%.*]], align 4
+; CHECK-NEXT:    store volatile i32 [[RA]], ptr [[POUT]], align 4
+; CHECK-NEXT:    store volatile i32 [[RA]], ptr [[POUT]], align 4
 ; CHECK-NEXT:    ret void
 ;
   %x = load volatile i32, i32* %px
   %y = load volatile i32, i32* %py
   %cmpa = icmp slt i32 %x, %y
   %cmpb = xor i1 %cmpa, -1
   %cmpc = xor i1 %cmpb, -1
   %ra = select i1 %cmpa, i32 %x, i32 %y

llvm/test/Transforms/EarlyCSE/const-speculation.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -early-cse -earlycse-debug-hash -S %s | FileCheck %s
+; RUN: opt -early-cse -earlycse-debug-hash -normalize-opaque-pointers -S %s | FileCheck %s
 
 %mystruct = type { i32 }
 
 ; @var is global so that *every* GEP argument is Constant.
 @var = external global %mystruct
 
 ; Control flow is to make the dominance tree consider the final icmp before it
 ; gets to simplify the purely constant one (%tst). Since that icmp uses the
 ; select that gets considered next. Finally the select simplification looks at
 ; the %tst icmp and we don't want it to speculate about what happens if "i32 0"
 ; is actually "i32 1", broken universes are automatic UB.
 ;
 ; In this case doing the speculation would create an invalid GEP(@var, 0, 1) and
 ; crash.
 
 define i1 @test_constant_speculation() {
 ; CHECK-LABEL: @test_constant_speculation(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    br i1 undef, label [[END:%.*]], label [[SELECT:%.*]]
 ; CHECK:       select:
 ; CHECK-NEXT:    br label [[END]]
 ; CHECK:       end:
-; CHECK-NEXT:    [[TMP:%.*]] = phi i32* [ null, [[ENTRY:%.*]] ], [ getelementptr inbounds ([[MYSTRUCT:%.*]], %mystruct* @var, i64 0, i32 0), [[SELECT]] ]
-; CHECK-NEXT:    [[RES:%.*]] = icmp eq i32* [[TMP]], null
+; CHECK-NEXT:    [[TMP:%.*]] = phi ptr [ null, [[ENTRY:%.*]] ], [ getelementptr inbounds ([[MYSTRUCT:%.*]], ptr @var, i64 0, i32 0), [[SELECT]] ]
+; CHECK-NEXT:    [[RES:%.*]] = icmp eq ptr [[TMP]], null
 ; CHECK-NEXT:    ret i1 [[RES]]
 ;
 entry:
   br i1 undef, label %end, label %select
 
 select:
 
   %tst = icmp eq i32 1, 0

llvm/test/Transforms/EarlyCSE/flags.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -early-cse -earlycse-debug-hash -S < %s | FileCheck %s
-; RUN: opt -basic-aa -early-cse-memssa -S < %s | FileCheck %s
+; RUN: opt -early-cse -earlycse-debug-hash -normalize-opaque-pointers -S < %s | FileCheck %s
+; RUN: opt -basic-aa -early-cse-memssa -normalize-opaque-pointers -S < %s | FileCheck %s
 
 declare void @use(i1)
 
 define void @test1(float %x, float %y) {
 ; CHECK-LABEL: @test1(
 ; CHECK-NEXT:    [[CMP1:%.*]] = fcmp oeq float [[Y:%.*]], [[X:%.*]]
 ; CHECK-NEXT:    call void @use(i1 [[CMP1]])
 ; CHECK-NEXT:    call void @use(i1 [[CMP1]])
 ; CHECK-NEXT:    ret void
 ;
   %cmp1 = fcmp nnan oeq float %y, %x
   %cmp2 = fcmp oeq float %x, %y
   call void @use(i1 %cmp1)
   call void @use(i1 %cmp2)
   ret void
 }
 
 declare void @use.i8(i8*)
 
 define void @test_inbounds_program_ub_if_first_gep_poison(i8* %ptr, i64 %n) {
 ; CHECK-LABEL: @test_inbounds_program_ub_if_first_gep_poison(
-; CHECK-NEXT:    [[ADD_PTR_1:%.*]] = getelementptr inbounds i8, i8* [[PTR:%.*]], i64 [[N:%.*]]
-; CHECK-NEXT:    call void @use.i8(i8* noundef [[ADD_PTR_1]])
-; CHECK-NEXT:    call void @use.i8(i8* [[ADD_PTR_1]])
+; CHECK-NEXT:    [[ADD_PTR_1:%.*]] = getelementptr inbounds i8, ptr [[PTR:%.*]], i64 [[N:%.*]]
+; CHECK-NEXT:    call void @use.i8(ptr noundef [[ADD_PTR_1]])
+; CHECK-NEXT:    call void @use.i8(ptr [[ADD_PTR_1]])
 ; CHECK-NEXT:    ret void
 ;
   %add.ptr.1 = getelementptr inbounds i8, i8* %ptr, i64 %n
   call void @use.i8(i8* noundef %add.ptr.1)
   %add.ptr.2 = getelementptr i8, i8* %ptr, i64 %n
   call void @use.i8(i8* %add.ptr.2)
   ret void
 }
 
 define void @test_inbounds_program_not_ub_if_first_gep_poison(i8* %ptr, i64 %n) {
 ; CHECK-LABEL: @test_inbounds_program_not_ub_if_first_gep_poison(
-; CHECK-NEXT:    [[ADD_PTR_1:%.*]] = getelementptr i8, i8* [[PTR:%.*]], i64 [[N:%.*]]
-; CHECK-NEXT:    call void @use.i8(i8* [[ADD_PTR_1]])
-; CHECK-NEXT:    call void @use.i8(i8* [[ADD_PTR_1]])
+; CHECK-NEXT:    [[ADD_PTR_1:%.*]] = getelementptr i8, ptr [[PTR:%.*]], i64 [[N:%.*]]
+; CHECK-NEXT:    call void @use.i8(ptr [[ADD_PTR_1]])
+; CHECK-NEXT:    call void @use.i8(ptr [[ADD_PTR_1]])
 ; CHECK-NEXT:    ret void
 ;
   %add.ptr.1 = getelementptr inbounds i8, i8* %ptr, i64 %n
   call void @use.i8(i8* %add.ptr.1)
   %add.ptr.2 = getelementptr i8, i8* %ptr, i64 %n
   call void @use.i8(i8* %add.ptr.2)
   ret void
 }

llvm/test/Transforms/EarlyCSE/floatingpoint.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt < %s -S -early-cse -earlycse-debug-hash | FileCheck %s
-; RUN: opt < %s -S -basic-aa -early-cse-memssa | FileCheck %s
+; RUN: opt < %s -S -early-cse -earlycse-debug-hash -normalize-opaque-pointers | FileCheck %s
+; RUN: opt < %s -S -basic-aa -early-cse-memssa -normalize-opaque-pointers | FileCheck %s
 
 ; Ensure we don't simplify away additions vectors of +0.0's (same as scalars).
 define <4 x float> @fV( <4 x float> %a) {
 ; CHECK-LABEL: @fV(
 ; CHECK-NEXT:    [[B:%.*]] = fadd <4 x float> [[A:%.*]], zeroinitializer
 ; CHECK-NEXT:    ret <4 x float> [[B]]
 ;
   %b = fadd  <4 x float> %a, <float 0.0,float 0.0,float 0.0,float 0.0>
   ret <4 x float> %b
 }
 
 define <4 x float> @fW( <4 x float> %a) {
 ; CHECK-LABEL: @fW(
 ; CHECK-NEXT:    ret <4 x float> [[A:%.*]]
 ;
   %b = fadd  <4 x float> %a, <float -0.0,float -0.0,float -0.0,float -0.0>
   ret <4 x float> %b
 }
 
 ; CSE unary fnegs.
 define void @fX(<4 x float> *%p, <4 x float> %a) {
 ; CHECK-LABEL: @fX(
 ; CHECK-NEXT:    [[X:%.*]] = fneg <4 x float> [[A:%.*]]
-; CHECK-NEXT:    store volatile <4 x float> [[X]], <4 x float>* [[P:%.*]], align 16
-; CHECK-NEXT:    store volatile <4 x float> [[X]], <4 x float>* [[P]], align 16
+; CHECK-NEXT:    store volatile <4 x float> [[X]], ptr [[P:%.*]], align 16
+; CHECK-NEXT:    store volatile <4 x float> [[X]], ptr [[P]], align 16
 ; CHECK-NEXT:    ret void
 ;
   %x = fneg <4 x float> %a
   %y = fneg <4 x float> %a
   store volatile <4 x float> %x, <4 x float>* %p
   store volatile <4 x float> %y, <4 x float>* %p
   ret void
 }

llvm/test/Transforms/EarlyCSE/guards.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -S -early-cse -earlycse-debug-hash < %s | FileCheck %s --check-prefixes=CHECK,NO_ASSUME
-; RUN: opt < %s -S -basic-aa -early-cse-memssa | FileCheck %s --check-prefixes=CHECK,NO_ASSUME
-; RUN: opt < %s -S -basic-aa -early-cse-memssa --enable-knowledge-retention | FileCheck %s --check-prefixes=CHECK,USE_ASSUME
+; RUN: opt -S -early-cse -earlycse-debug-hash -normalize-opaque-pointers < %s | FileCheck %s --check-prefixes=CHECK,NO_ASSUME
+; RUN: opt < %s -S -basic-aa -early-cse-memssa -normalize-opaque-pointers | FileCheck %s --check-prefixes=CHECK,NO_ASSUME
+; RUN: opt < %s -S -basic-aa -early-cse-memssa --enable-knowledge-retention -normalize-opaque-pointers | FileCheck %s --check-prefixes=CHECK,USE_ASSUME
 
 declare void @llvm.experimental.guard(i1,...)
 
 declare void @llvm.assume(i1)
 
 define i32 @test0(i32* %ptr, i1 %cond) {
 ; We can do store to load forwarding over a guard, since it does not
 ; clobber memory
 ; NO_ASSUME-LABEL: @test0(
-; NO_ASSUME-NEXT:    store i32 40, i32* [[PTR:%.*]], align 4
+; NO_ASSUME-NEXT:    store i32 40, ptr [[PTR:%.*]], align 4
 ; NO_ASSUME-NEXT:    call void (i1, ...) @llvm.experimental.guard(i1 [[COND:%.*]]) [ "deopt"() ]
 ; NO_ASSUME-NEXT:    ret i32 40
 ;
 ; USE_ASSUME-LABEL: @test0(
-; USE_ASSUME-NEXT:    store i32 40, i32* [[PTR:%.*]], align 4
+; USE_ASSUME-NEXT:    store i32 40, ptr [[PTR:%.*]], align 4
 ; USE_ASSUME-NEXT:    call void (i1, ...) @llvm.experimental.guard(i1 [[COND:%.*]]) [ "deopt"() ]
-; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[PTR]], i64 4), "nonnull"(i32* [[PTR]]), "align"(i32* [[PTR]], i64 4) ]
+; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(ptr [[PTR]], i64 4), "nonnull"(ptr [[PTR]]), "align"(ptr [[PTR]], i64 4) ]
 ; USE_ASSUME-NEXT:    ret i32 40
 ;
 
   store i32 40, i32* %ptr
   call void(i1,...) @llvm.experimental.guard(i1 %cond) [ "deopt"() ]
   %rval = load i32, i32* %ptr
   ret i32 %rval
 }
 
 define i32 @test1(i32* %val, i1 %cond) {
 ; We can CSE loads over a guard, since it does not clobber memory
 ; NO_ASSUME-LABEL: @test1(
-; NO_ASSUME-NEXT:    [[VAL0:%.*]] = load i32, i32* [[VAL:%.*]], align 4
+; NO_ASSUME-NEXT:    [[VAL0:%.*]] = load i32, ptr [[VAL:%.*]], align 4
 ; NO_ASSUME-NEXT:    call void (i1, ...) @llvm.experimental.guard(i1 [[COND:%.*]]) [ "deopt"() ]
 ; NO_ASSUME-NEXT:    ret i32 0
 ;
 ; USE_ASSUME-LABEL: @test1(
-; USE_ASSUME-NEXT:    [[VAL0:%.*]] = load i32, i32* [[VAL:%.*]], align 4
+; USE_ASSUME-NEXT:    [[VAL0:%.*]] = load i32, ptr [[VAL:%.*]], align 4
 ; USE_ASSUME-NEXT:    call void (i1, ...) @llvm.experimental.guard(i1 [[COND:%.*]]) [ "deopt"() ]
-; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[VAL]], i64 4), "nonnull"(i32* [[VAL]]), "align"(i32* [[VAL]], i64 4) ]
+; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(ptr [[VAL]], i64 4), "nonnull"(ptr [[VAL]]), "align"(ptr [[VAL]], i64 4) ]
 ; USE_ASSUME-NEXT:    ret i32 0
 ;
 
   %val0 = load i32, i32* %val
   call void(i1,...) @llvm.experimental.guard(i1 %cond) [ "deopt"() ]
   %val1 = load i32, i32* %val
   %rval = sub i32 %val0, %val1
   ret i32 %rval
right:
   br label %left
 }
 
 define void @test6(i1 %c, i32* %ptr) {
 ; Check that we do not DSE over calls to @llvm.experimental.guard.
 ; Guard intrinsics do _read_ memory, so th call to guard below needs
 ; to see the store of 500 to %ptr
 ; CHECK-LABEL: @test6(
-; CHECK-NEXT:    store i32 500, i32* [[PTR:%.*]], align 4
+; CHECK-NEXT:    store i32 500, ptr [[PTR:%.*]], align 4
 ; CHECK-NEXT:    call void (i1, ...) @llvm.experimental.guard(i1 [[C:%.*]]) [ "deopt"() ]
-; CHECK-NEXT:    store i32 600, i32* [[PTR]], align 4
+; CHECK-NEXT:    store i32 600, ptr [[PTR]], align 4
 ; CHECK-NEXT:    ret void
 ;
 
 
   store i32 500, i32* %ptr
   call void(i1,...) @llvm.experimental.guard(i1 %c) [ "deopt"() ]
   store i32 600, i32* %ptr
   ret void
;
   ret void
 }
 
 define void @test08(i32 %a, i32 %b, i32* %ptr) {
 ; Check that we deal correctly with stores when removing guards in the same
 ; block in case when the condition is not recalculated.
 ; NO_ASSUME-LABEL: @test08(
 ; NO_ASSUME-NEXT:    [[CMP:%.*]] = icmp eq i32 [[A:%.*]], [[B:%.*]]
-; NO_ASSUME-NEXT:    store i32 100, i32* [[PTR:%.*]], align 4
+; NO_ASSUME-NEXT:    store i32 100, ptr [[PTR:%.*]], align 4
 ; NO_ASSUME-NEXT:    call void (i1, ...) @llvm.experimental.guard(i1 [[CMP]]) [ "deopt"() ]
-; NO_ASSUME-NEXT:    store i32 400, i32* [[PTR]], align 4
+; NO_ASSUME-NEXT:    store i32 400, ptr [[PTR]], align 4
 ; NO_ASSUME-NEXT:    ret void
 ;
 ; USE_ASSUME-LABEL: @test08(
 ; USE_ASSUME-NEXT:    [[CMP:%.*]] = icmp eq i32 [[A:%.*]], [[B:%.*]]
-; USE_ASSUME-NEXT:    store i32 100, i32* [[PTR:%.*]], align 4
+; USE_ASSUME-NEXT:    store i32 100, ptr [[PTR:%.*]], align 4
 ; USE_ASSUME-NEXT:    call void (i1, ...) @llvm.experimental.guard(i1 [[CMP]]) [ "deopt"() ]
-; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[PTR]], i64 4), "nonnull"(i32* [[PTR]]), "align"(i32* [[PTR]], i64 4) ]
-; USE_ASSUME-NEXT:    store i32 400, i32* [[PTR]], align 4
+; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(ptr [[PTR]], i64 4), "nonnull"(ptr [[PTR]]), "align"(ptr [[PTR]], i64 4) ]
+; USE_ASSUME-NEXT:    store i32 400, ptr [[PTR]], align 4
 ; USE_ASSUME-NEXT:    ret void
 ;
 
   %cmp = icmp eq i32 %a, %b
   store i32 100, i32* %ptr
   call void (i1, ...) @llvm.experimental.guard(i1 %cmp) [ "deopt"() ]
   store i32 200, i32* %ptr
   call void (i1, ...) @llvm.experimental.guard(i1 %cmp) [ "deopt"() ]
   store i32 300, i32* %ptr
   call void (i1, ...) @llvm.experimental.guard(i1 %cmp) [ "deopt"() ]
   store i32 400, i32* %ptr
   ret void
 }
 
 define void @test09(i32 %a, i32 %b, i1 %c, i32* %ptr) {
 ; Similar to test08, but with more control flow.
 ; TODO: Can we get rid of the store in the end of entry given that it is
 ; post-dominated by other stores?
 ; NO_ASSUME-LABEL: @test09(
 ; NO_ASSUME-NEXT:  entry:
 ; NO_ASSUME-NEXT:    [[CMP:%.*]] = icmp eq i32 [[A:%.*]], [[B:%.*]]
-; NO_ASSUME-NEXT:    store i32 100, i32* [[PTR:%.*]], align 4
+; NO_ASSUME-NEXT:    store i32 100, ptr [[PTR:%.*]], align 4
 ; NO_ASSUME-NEXT:    call void (i1, ...) @llvm.experimental.guard(i1 [[CMP]]) [ "deopt"() ]
-; NO_ASSUME-NEXT:    store i32 400, i32* [[PTR]], align 4
+; NO_ASSUME-NEXT:    store i32 400, ptr [[PTR]], align 4
 ; NO_ASSUME-NEXT:    br i1 [[C:%.*]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]]
 ; NO_ASSUME:       if.true:
-; NO_ASSUME-NEXT:    store i32 500, i32* [[PTR]], align 4
+; NO_ASSUME-NEXT:    store i32 500, ptr [[PTR]], align 4
 ; NO_ASSUME-NEXT:    br label [[MERGE:%.*]]
 ; NO_ASSUME:       if.false:
-; NO_ASSUME-NEXT:    store i32 600, i32* [[PTR]], align 4
+; NO_ASSUME-NEXT:    store i32 600, ptr [[PTR]], align 4
 ; NO_ASSUME-NEXT:    br label [[MERGE]]
 ; NO_ASSUME:       merge:
 ; NO_ASSUME-NEXT:    ret void
 ;
 ; USE_ASSUME-LABEL: @test09(
 ; USE_ASSUME-NEXT:  entry:
 ; USE_ASSUME-NEXT:    [[CMP:%.*]] = icmp eq i32 [[A:%.*]], [[B:%.*]]
-; USE_ASSUME-NEXT:    store i32 100, i32* [[PTR:%.*]], align 4
+; USE_ASSUME-NEXT:    store i32 100, ptr [[PTR:%.*]], align 4
 ; USE_ASSUME-NEXT:    call void (i1, ...) @llvm.experimental.guard(i1 [[CMP]]) [ "deopt"() ]
-; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[PTR]], i64 4), "nonnull"(i32* [[PTR]]), "align"(i32* [[PTR]], i64 4) ]
-; USE_ASSUME-NEXT:    store i32 400, i32* [[PTR]], align 4
+; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(ptr [[PTR]], i64 4), "nonnull"(ptr [[PTR]]), "align"(ptr [[PTR]], i64 4) ]
+; USE_ASSUME-NEXT:    store i32 400, ptr [[PTR]], align 4
 ; USE_ASSUME-NEXT:    br i1 [[C:%.*]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]]
 ; USE_ASSUME:       if.true:
-; USE_ASSUME-NEXT:    store i32 500, i32* [[PTR]], align 4
+; USE_ASSUME-NEXT:    store i32 500, ptr [[PTR]], align 4
 ; USE_ASSUME-NEXT:    br label [[MERGE:%.*]]
 ; USE_ASSUME:       if.false:
-; USE_ASSUME-NEXT:    store i32 600, i32* [[PTR]], align 4
+; USE_ASSUME-NEXT:    store i32 600, ptr [[PTR]], align 4
 ; USE_ASSUME-NEXT:    br label [[MERGE]]
 ; USE_ASSUME:       merge:
 ; USE_ASSUME-NEXT:    ret void
 ;
 
 entry:
   %cmp = icmp eq i32 %a, %b
   store i32 100, i32* %ptr

 define void @test10(i32 %a, i32 %b, i1 %c, i32* %ptr) {
 ; Make sure that non-dominating guards do not cause other guards removal.
 ; CHECK-LABEL: @test10(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[CMP:%.*]] = icmp eq i32 [[A:%.*]], [[B:%.*]]
 ; CHECK-NEXT:    br i1 [[C:%.*]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]]
 ; CHECK:       if.true:
 ; CHECK-NEXT:    call void (i1, ...) @llvm.experimental.guard(i1 [[CMP]]) [ "deopt"() ]
-; CHECK-NEXT:    store i32 100, i32* [[PTR:%.*]], align 4
+; CHECK-NEXT:    store i32 100, ptr [[PTR:%.*]], align 4
 ; CHECK-NEXT:    br label [[MERGE:%.*]]
 ; CHECK:       if.false:
-; CHECK-NEXT:    store i32 200, i32* [[PTR]], align 4
+; CHECK-NEXT:    store i32 200, ptr [[PTR]], align 4
 ; CHECK-NEXT:    br label [[MERGE]]
 ; CHECK:       merge:
-; CHECK-NEXT:    store i32 300, i32* [[PTR]], align 4
+; CHECK-NEXT:    store i32 300, ptr [[PTR]], align 4
 ; CHECK-NEXT:    call void (i1, ...) @llvm.experimental.guard(i1 [[CMP]]) [ "deopt"() ]
-; CHECK-NEXT:    store i32 400, i32* [[PTR]], align 4
+; CHECK-NEXT:    store i32 400, ptr [[PTR]], align 4
 ; CHECK-NEXT:    ret void
 ;
 
 entry:
   %cmp = icmp eq i32 %a, %b
   br i1 %c, label %if.true, label %if.false
 
 if.true:
;
   ret void
 }
 
 define void @test13(i32 %a, i32 %b, i32* %ptr) {
 ; Check that we deal correctly with stores when removing guards due to assume.
 ; NO_ASSUME-LABEL: @test13(
 ; NO_ASSUME-NEXT:    [[CMP:%.*]] = icmp eq i32 [[A:%.*]], [[B:%.*]]
 ; NO_ASSUME-NEXT:    call void @llvm.assume(i1 [[CMP]])
-; NO_ASSUME-NEXT:    store i32 400, i32* [[PTR:%.*]], align 4
+; NO_ASSUME-NEXT:    store i32 400, ptr [[PTR:%.*]], align 4
 ; NO_ASSUME-NEXT:    ret void
 ;
 ; USE_ASSUME-LABEL: @test13(
 ; USE_ASSUME-NEXT:    [[CMP:%.*]] = icmp eq i32 [[A:%.*]], [[B:%.*]]
 ; USE_ASSUME-NEXT:    call void @llvm.assume(i1 [[CMP]])
-; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[PTR:%.*]], i64 4), "nonnull"(i32* [[PTR]]), "align"(i32* [[PTR]], i64 4) ]
-; USE_ASSUME-NEXT:    store i32 400, i32* [[PTR]], align 4
+; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(ptr [[PTR:%.*]], i64 4), "nonnull"(ptr [[PTR]]), "align"(ptr [[PTR]], i64 4) ]
+; USE_ASSUME-NEXT:    store i32 400, ptr [[PTR]], align 4
 ; USE_ASSUME-NEXT:    ret void
 ;
 
   %cmp = icmp eq i32 %a, %b
   call void @llvm.assume(i1 %cmp)
   store i32 100, i32* %ptr
   call void (i1, ...) @llvm.experimental.guard(i1 %cmp) [ "deopt"() ]
   store i32 200, i32* %ptr
   call void (i1, ...) @llvm.experimental.guard(i1 %cmp) [ "deopt"() ]
   store i32 300, i32* %ptr
   call void (i1, ...) @llvm.experimental.guard(i1 %cmp) [ "deopt"() ]
   store i32 400, i32* %ptr
   ret void
 }
 
 define void @test14(i32 %a, i32 %b, i1 %c, i32* %ptr) {
 ; Similar to test13, but with more control flow.
 ; TODO: Can we get rid of the store in the end of entry given that it is
 ; post-dominated by other stores?
 ; NO_ASSUME-LABEL: @test14(
 ; NO_ASSUME-NEXT:  entry:
 ; NO_ASSUME-NEXT:    [[CMP:%.*]] = icmp eq i32 [[A:%.*]], [[B:%.*]]
 ; NO_ASSUME-NEXT:    call void @llvm.assume(i1 [[CMP]])
-; NO_ASSUME-NEXT:    store i32 400, i32* [[PTR:%.*]], align 4
+; NO_ASSUME-NEXT:    store i32 400, ptr [[PTR:%.*]], align 4
 ; NO_ASSUME-NEXT:    br i1 [[C:%.*]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]]
 ; NO_ASSUME:       if.true:
-; NO_ASSUME-NEXT:    store i32 500, i32* [[PTR]], align 4
+; NO_ASSUME-NEXT:    store i32 500, ptr [[PTR]], align 4
 ; NO_ASSUME-NEXT:    br label [[MERGE:%.*]]
 ; NO_ASSUME:       if.false:
-; NO_ASSUME-NEXT:    store i32 600, i32* [[PTR]], align 4
+; NO_ASSUME-NEXT:    store i32 600, ptr [[PTR]], align 4
 ; NO_ASSUME-NEXT:    br label [[MERGE]]
 ; NO_ASSUME:       merge:
 ; NO_ASSUME-NEXT:    ret void
 ;
 ; USE_ASSUME-LABEL: @test14(
 ; USE_ASSUME-NEXT:  entry:
 ; USE_ASSUME-NEXT:    [[CMP:%.*]] = icmp eq i32 [[A:%.*]], [[B:%.*]]
 ; USE_ASSUME-NEXT:    call void @llvm.assume(i1 [[CMP]])
-; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[PTR:%.*]], i64 4), "nonnull"(i32* [[PTR]]), "align"(i32* [[PTR]], i64 4) ]
-; USE_ASSUME-NEXT:    store i32 400, i32* [[PTR]], align 4
+; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(ptr [[PTR:%.*]], i64 4), "nonnull"(ptr [[PTR]]), "align"(ptr [[PTR]], i64 4) ]
+; USE_ASSUME-NEXT:    store i32 400, ptr [[PTR]], align 4
 ; USE_ASSUME-NEXT:    br i1 [[C:%.*]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]]
 ; USE_ASSUME:       if.true:
-; USE_ASSUME-NEXT:    store i32 500, i32* [[PTR]], align 4
+; USE_ASSUME-NEXT:    store i32 500, ptr [[PTR]], align 4
 ; USE_ASSUME-NEXT:    br label [[MERGE:%.*]]
 ; USE_ASSUME:       if.false:
-; USE_ASSUME-NEXT:    store i32 600, i32* [[PTR]], align 4
+; USE_ASSUME-NEXT:    store i32 600, ptr [[PTR]], align 4
 ; USE_ASSUME-NEXT:    br label [[MERGE]]
 ; USE_ASSUME:       merge:
 ; USE_ASSUME-NEXT:    ret void
 ;
 
 entry:
   %cmp = icmp eq i32 %a, %b
   call void @llvm.assume(i1 %cmp)

 define void @test15(i32 %a, i32 %b, i1 %c, i32* %ptr) {
 ; Make sure that non-dominating assumes do not cause guards removal.
 ; CHECK-LABEL: @test15(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[CMP:%.*]] = icmp eq i32 [[A:%.*]], [[B:%.*]]
 ; CHECK-NEXT:    br i1 [[C:%.*]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]]
 ; CHECK:       if.true:
 ; CHECK-NEXT:    call void @llvm.assume(i1 [[CMP]])
-; CHECK-NEXT:    store i32 100, i32* [[PTR:%.*]], align 4
+; CHECK-NEXT:    store i32 100, ptr [[PTR:%.*]], align 4
 ; CHECK-NEXT:    br label [[MERGE:%.*]]
 ; CHECK:       if.false:
-; CHECK-NEXT:    store i32 200, i32* [[PTR]], align 4
+; CHECK-NEXT:    store i32 200, ptr [[PTR]], align 4
 ; CHECK-NEXT:    br label [[MERGE]]
 ; CHECK:       merge:
-; CHECK-NEXT:    store i32 300, i32* [[PTR]], align 4
+; CHECK-NEXT:    store i32 300, ptr [[PTR]], align 4
 ; CHECK-NEXT:    call void (i1, ...) @llvm.experimental.guard(i1 [[CMP]]) [ "deopt"() ]
-; CHECK-NEXT:    store i32 400, i32* [[PTR]], align 4
+; CHECK-NEXT:    store i32 400, ptr [[PTR]], align 4
 ; CHECK-NEXT:    ret void
 ;
 
 entry:
   %cmp = icmp eq i32 %a, %b
   br i1 %c, label %if.true, label %if.false
 
 if.true:

llvm/test/Transforms/EarlyCSE/invariant-loads.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -S -early-cse -earlycse-debug-hash < %s | FileCheck %s --check-prefixes=CHECK,NO_ASSUME
-; RUN: opt -S -basic-aa -early-cse-memssa < %s | FileCheck %s --check-prefixes=CHECK,NO_ASSUME
-; RUN: opt -S -basic-aa -early-cse-memssa --enable-knowledge-retention < %s | FileCheck %s --check-prefixes=CHECK,USE_ASSUME
+; RUN: opt -S -early-cse -earlycse-debug-hash -normalize-opaque-pointers < %s | FileCheck %s --check-prefixes=CHECK,NO_ASSUME
+; RUN: opt -S -basic-aa -early-cse-memssa -normalize-opaque-pointers < %s | FileCheck %s --check-prefixes=CHECK,NO_ASSUME
+; RUN: opt -S -basic-aa -early-cse-memssa --enable-knowledge-retention -normalize-opaque-pointers < %s | FileCheck %s --check-prefixes=CHECK,USE_ASSUME
 
 declare void @clobber_and_use(i32)
 
 define void @f_0(i32* %ptr) {
 ; NO_ASSUME-LABEL: @f_0(
-; NO_ASSUME-NEXT:    [[VAL0:%.*]] = load i32, i32* [[PTR:%.*]], align 4, !invariant.load !0
+; NO_ASSUME-NEXT:    [[VAL0:%.*]] = load i32, ptr [[PTR:%.*]], align 4, !invariant.load !0
 ; NO_ASSUME-NEXT:    call void @clobber_and_use(i32 [[VAL0]])
 ; NO_ASSUME-NEXT:    call void @clobber_and_use(i32 [[VAL0]])
 ; NO_ASSUME-NEXT:    call void @clobber_and_use(i32 [[VAL0]])
 ; NO_ASSUME-NEXT:    ret void
 ;
 ; USE_ASSUME-LABEL: @f_0(
-; USE_ASSUME-NEXT:    [[VAL0:%.*]] = load i32, i32* [[PTR:%.*]], align 4, !invariant.load !0
+; USE_ASSUME-NEXT:    [[VAL0:%.*]] = load i32, ptr [[PTR:%.*]], align 4, !invariant.load !0
 ; USE_ASSUME-NEXT:    call void @clobber_and_use(i32 [[VAL0]])
-; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[PTR]], i64 4), "nonnull"(i32* [[PTR]]), "align"(i32* [[PTR]], i64 4) ]
+; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(ptr [[PTR]], i64 4), "nonnull"(ptr [[PTR]]), "align"(ptr [[PTR]], i64 4) ]
 ; USE_ASSUME-NEXT:    call void @clobber_and_use(i32 [[VAL0]])
 ; USE_ASSUME-NEXT:    call void @clobber_and_use(i32 [[VAL0]])
 ; USE_ASSUME-NEXT:    ret void
 ;
 
   %val0 = load i32, i32* %ptr, !invariant.load !{}
   call void @clobber_and_use(i32 %val0)
   %val1 = load i32, i32* %ptr, !invariant.load !{}
   call void @clobber_and_use(i32 %val1)
   %val2 = load i32, i32* %ptr, !invariant.load !{}
   call void @clobber_and_use(i32 %val2)
   ret void
 }
 
 define void @f_1(i32* %ptr) {
 ; We can forward invariant loads to non-invariant loads.
 ; NO_ASSUME-LABEL: @f_1(
-; NO_ASSUME-NEXT:    [[VAL0:%.*]] = load i32, i32* [[PTR:%.*]], align 4, !invariant.load !0
+; NO_ASSUME-NEXT:    [[VAL0:%.*]] = load i32, ptr [[PTR:%.*]], align 4, !invariant.load !0
 ; NO_ASSUME-NEXT:    call void @clobber_and_use(i32 [[VAL0]])
 ; NO_ASSUME-NEXT:    call void @clobber_and_use(i32 [[VAL0]])
 ; NO_ASSUME-NEXT:    ret void
 ;
 ; USE_ASSUME-LABEL: @f_1(
-; USE_ASSUME-NEXT:    [[VAL0:%.*]] = load i32, i32* [[PTR:%.*]], align 4, !invariant.load !0
+; USE_ASSUME-NEXT:    [[VAL0:%.*]] = load i32, ptr [[PTR:%.*]], align 4, !invariant.load !0
 ; USE_ASSUME-NEXT:    call void @clobber_and_use(i32 [[VAL0]])
-; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[PTR]], i64 4), "nonnull"(i32* [[PTR]]), "align"(i32* [[PTR]], i64 4) ]
+; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(ptr [[PTR]], i64 4), "nonnull"(ptr [[PTR]]), "align"(ptr [[PTR]], i64 4) ]
 ; USE_ASSUME-NEXT:    call void @clobber_and_use(i32 [[VAL0]])
 ; USE_ASSUME-NEXT:    ret void
 ;
 
   %val0 = load i32, i32* %ptr, !invariant.load !{}
   call void @clobber_and_use(i32 %val0)
   %val1 = load i32, i32* %ptr
   call void @clobber_and_use(i32 %val1)
   ret void
 }
 
 define void @f_2(i32* %ptr) {
 ; We can forward a non-invariant load into an invariant load.
 ; NO_ASSUME-LABEL: @f_2(
-; NO_ASSUME-NEXT:    [[VAL0:%.*]] = load i32, i32* [[PTR:%.*]], align 4
+; NO_ASSUME-NEXT:    [[VAL0:%.*]] = load i32, ptr [[PTR:%.*]], align 4
 ; NO_ASSUME-NEXT:    call void @clobber_and_use(i32 [[VAL0]])
 ; NO_ASSUME-NEXT:    call void @clobber_and_use(i32 [[VAL0]])
 ; NO_ASSUME-NEXT:    ret void
 ;
 ; USE_ASSUME-LABEL: @f_2(
-; USE_ASSUME-NEXT:    [[VAL0:%.*]] = load i32, i32* [[PTR:%.*]], align 4
+; USE_ASSUME-NEXT:    [[VAL0:%.*]] = load i32, ptr [[PTR:%.*]], align 4
 ; USE_ASSUME-NEXT:    call void @clobber_and_use(i32 [[VAL0]])
-; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[PTR]], i64 4), "nonnull"(i32* [[PTR]]), "align"(i32* [[PTR]], i64 4) ]
+; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(ptr [[PTR]], i64 4), "nonnull"(ptr [[PTR]]), "align"(ptr [[PTR]], i64 4) ]
 ; USE_ASSUME-NEXT:    call void @clobber_and_use(i32 [[VAL0]])
 ; USE_ASSUME-NEXT:    ret void
 ;
 
   %val0 = load i32, i32* %ptr
   call void @clobber_and_use(i32 %val0)
   %val1 = load i32, i32* %ptr, !invariant.load !{}
   call void @clobber_and_use(i32 %val1)
   ret void
 }
 
 define void @f_3(i1 %cond, i32* %ptr) {
 ; NO_ASSUME-LABEL: @f_3(
-; NO_ASSUME-NEXT:    [[VAL0:%.*]] = load i32, i32* [[PTR:%.*]], align 4, !invariant.load !0
+; NO_ASSUME-NEXT:    [[VAL0:%.*]] = load i32, ptr [[PTR:%.*]], align 4, !invariant.load !0
 ; NO_ASSUME-NEXT:    call void @clobber_and_use(i32 [[VAL0]])
 ; NO_ASSUME-NEXT:    br i1 [[COND:%.*]], label [[LEFT:%.*]], label [[RIGHT:%.*]]
 ; NO_ASSUME:       left:
 ; NO_ASSUME-NEXT:    call void @clobber_and_use(i32 [[VAL0]])
 ; NO_ASSUME-NEXT:    ret void
 ; NO_ASSUME:       right:
 ; NO_ASSUME-NEXT:    ret void
 ;
 ; USE_ASSUME-LABEL: @f_3(
-; USE_ASSUME-NEXT:    [[VAL0:%.*]] = load i32, i32* [[PTR:%.*]], align 4, !invariant.load !0
+; USE_ASSUME-NEXT:    [[VAL0:%.*]] = load i32, ptr [[PTR:%.*]], align 4, !invariant.load !0
 ; USE_ASSUME-NEXT:    call void @clobber_and_use(i32 [[VAL0]])
 ; USE_ASSUME-NEXT:    br i1 [[COND:%.*]], label [[LEFT:%.*]], label [[RIGHT:%.*]]
 ; USE_ASSUME:       left:
-; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[PTR]], i64 4), "nonnull"(i32* [[PTR]]), "align"(i32* [[PTR]], i64 4) ]
+; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(ptr [[PTR]], i64 4), "nonnull"(ptr [[PTR]]), "align"(ptr [[PTR]], i64 4) ]
 ; USE_ASSUME-NEXT:    call void @clobber_and_use(i32 [[VAL0]])
 ; USE_ASSUME-NEXT:    ret void
 ; USE_ASSUME:       right:
 ; USE_ASSUME-NEXT:    ret void
 ;
   %val0 = load i32, i32* %ptr, !invariant.load !{}
   call void @clobber_and_use(i32 %val0)
   br i1 %cond, label %left, label %right

 }
 
 define void @f_4(i1 %cond, i32* %ptr) {
 ; Negative test -- can't forward %val0 to %va1 because that'll break
 ; def-dominates-use.
 ; CHECK-LABEL: @f_4(
 ; CHECK-NEXT:    br i1 [[COND:%.*]], label [[LEFT:%.*]], label [[MERGE:%.*]]
 ; CHECK:       left:
-; CHECK-NEXT:    [[VAL0:%.*]] = load i32, i32* [[PTR:%.*]], align 4, !invariant.load !0
+; CHECK-NEXT:    [[VAL0:%.*]] = load i32, ptr [[PTR:%.*]], align 4, !invariant.load !0
 ; CHECK-NEXT:    call void @clobber_and_use(i32 [[VAL0]])
 ; CHECK-NEXT:    br label [[MERGE]]
 ; CHECK:       merge:
-; CHECK-NEXT:    [[VAL1:%.*]] = load i32, i32* [[PTR]], align 4
+; CHECK-NEXT:    [[VAL1:%.*]] = load i32, ptr [[PTR]], align 4
 ; CHECK-NEXT:    call void @clobber_and_use(i32 [[VAL1]])
 ; CHECK-NEXT:    ret void
 ;
   br i1 %cond, label %left, label %merge
 
 left:
 
   %val0 = load i32, i32* %ptr, !invariant.load !{}
   call void @clobber_and_use(i32 %val0)
   br label %merge
 
 merge:
 
   %val1 = load i32, i32* %ptr
   call void @clobber_and_use(i32 %val1)
   ret void
 }
 
 ; By assumption, the call can't change contents of p
 ; LangRef is a bit unclear about whether the store is reachable, so
 ; for the moment we chose to be conservative and just assume it's valid
 ; to restore the same unchanging value.
 define void @test_dse1(i32* %p) {
 ; NO_ASSUME-LABEL: @test_dse1(
-; NO_ASSUME-NEXT:    [[V1:%.*]] = load i32, i32* [[P:%.*]], align 4, !invariant.load !0
+; NO_ASSUME-NEXT:    [[V1:%.*]] = load i32, ptr [[P:%.*]], align 4, !invariant.load !0
 ; NO_ASSUME-NEXT:    call void @clobber_and_use(i32 [[V1]])
 ; NO_ASSUME-NEXT:    ret void
 ;
 ; USE_ASSUME-LABEL: @test_dse1(
-; USE_ASSUME-NEXT:    [[V1:%.*]] = load i32, i32* [[P:%.*]], align 4, !invariant.load !0
+; USE_ASSUME-NEXT:    [[V1:%.*]] = load i32, ptr [[P:%.*]], align 4, !invariant.load !0
 ; USE_ASSUME-NEXT:    call void @clobber_and_use(i32 [[V1]])
-; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[P]], i64 4), "nonnull"(i32* [[P]]), "align"(i32* [[P]], i64 4) ]
+; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(ptr [[P]], i64 4), "nonnull"(ptr [[P]]), "align"(ptr [[P]], i64 4) ]
 ; USE_ASSUME-NEXT:    ret void
 ;
   %v1 = load i32, i32* %p, !invariant.load !{}
   call void @clobber_and_use(i32 %v1)
   store i32 %v1, i32* %p
   ret void
 }
 
 ; By assumption, v1 must equal v2 (TODO)
 define void @test_false_negative_dse2(i32* %p, i32 %v2) {
 ; CHECK-LABEL: @test_false_negative_dse2(
-; CHECK-NEXT:    [[V1:%.*]] = load i32, i32* [[P:%.*]], align 4, !invariant.load !0
+; CHECK-NEXT:    [[V1:%.*]] = load i32, ptr [[P:%.*]], align 4, !invariant.load !0
 ; CHECK-NEXT:    call void @clobber_and_use(i32 [[V1]])
-; CHECK-NEXT:    store i32 [[V2:%.*]], i32* [[P]], align 4
+; CHECK-NEXT:    store i32 [[V2:%.*]], ptr [[P]], align 4
 ; CHECK-NEXT:    ret void
 ;
   %v1 = load i32, i32* %p, !invariant.load !{}
   call void @clobber_and_use(i32 %v1)
   store i32 %v2, i32* %p
   ret void
 }
 
 ; If we remove the load, we still start an invariant scope since
 ; it lets us remove later loads not explicitly marked invariant
 define void @test_scope_start_without_load(i32* %p) {
 ; NO_ASSUME-LABEL: @test_scope_start_without_load(
-; NO_ASSUME-NEXT:    [[V1:%.*]] = load i32, i32* [[P:%.*]], align 4
+; NO_ASSUME-NEXT:    [[V1:%.*]] = load i32, ptr [[P:%.*]], align 4
 ; NO_ASSUME-NEXT:    [[ADD:%.*]] = add i32 [[V1]], [[V1]]
 ; NO_ASSUME-NEXT:    call void @clobber_and_use(i32 [[ADD]])
 ; NO_ASSUME-NEXT:    call void @clobber_and_use(i32 [[V1]])
 ; NO_ASSUME-NEXT:    ret void
 ;
 ; USE_ASSUME-LABEL: @test_scope_start_without_load(
-; USE_ASSUME-NEXT:    [[V1:%.*]] = load i32, i32* [[P:%.*]], align 4
-; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[P]], i64 4), "nonnull"(i32* [[P]]), "align"(i32* [[P]], i64 4) ]
+; USE_ASSUME-NEXT:    [[V1:%.*]] = load i32, ptr [[P:%.*]], align 4
+; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(ptr [[P]], i64 4), "nonnull"(ptr [[P]]), "align"(ptr [[P]], i64 4) ]
 ; USE_ASSUME-NEXT:    [[ADD:%.*]] = add i32 [[V1]], [[V1]]
 ; USE_ASSUME-NEXT:    call void @clobber_and_use(i32 [[ADD]])
 ; USE_ASSUME-NEXT:    call void @clobber_and_use(i32 [[V1]])
 ; USE_ASSUME-NEXT:    ret void
 ;
   %v1 = load i32, i32* %p
   %v2 = load i32, i32* %p, !invariant.load !{}
   %add = add i32 %v1, %v2
   call void @clobber_and_use(i32 %add)
   %v3 = load i32, i32* %p
   call void @clobber_and_use(i32 %v3)
   ret void
 }
 
 ; If we already have an invariant scope, don't want to start a new one
 ; with a potentially greater generation.  This hides the earlier invariant
 ; load
 define void @test_scope_restart(i32* %p) {
 ; NO_ASSUME-LABEL: @test_scope_restart(
-; NO_ASSUME-NEXT:    [[V1:%.*]] = load i32, i32* [[P:%.*]], align 4, !invariant.load !0
+; NO_ASSUME-NEXT:    [[V1:%.*]] = load i32, ptr [[P:%.*]], align 4, !invariant.load !0
 ; NO_ASSUME-NEXT:    call void @clobber_and_use(i32 [[V1]])
 ; NO_ASSUME-NEXT:    [[ADD:%.*]] = add i32 [[V1]], [[V1]]
 ; NO_ASSUME-NEXT:    call void @clobber_and_use(i32 [[ADD]])
 ; NO_ASSUME-NEXT:    call void @clobber_and_use(i32 [[V1]])
 ; NO_ASSUME-NEXT:    ret void
 ;
 ; USE_ASSUME-LABEL: @test_scope_restart(
-; USE_ASSUME-NEXT:    [[V1:%.*]] = load i32, i32* [[P:%.*]], align 4, !invariant.load !0
+; USE_ASSUME-NEXT:    [[V1:%.*]] = load i32, ptr [[P:%.*]], align 4, !invariant.load !0
 ; USE_ASSUME-NEXT:    call void @clobber_and_use(i32 [[V1]])
-; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[P]], i64 4), "nonnull"(i32* [[P]]), "align"(i32* [[P]], i64 4) ]
+; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(ptr [[P]], i64 4), "nonnull"(ptr [[P]]), "align"(ptr [[P]], i64 4) ]
 ; USE_ASSUME-NEXT:    [[ADD:%.*]] = add i32 [[V1]], [[V1]]
 ; USE_ASSUME-NEXT:    call void @clobber_and_use(i32 [[ADD]])
 ; USE_ASSUME-NEXT:    call void @clobber_and_use(i32 [[V1]])
 ; USE_ASSUME-NEXT:    ret void
 ;
   %v1 = load i32, i32* %p, !invariant.load !{}
   call void @clobber_and_use(i32 %v1)
   %v2 = load i32, i32* %p, !invariant.load !{}
   %add = add i32 %v1, %v2
   call void @clobber_and_use(i32 %add)
   %v3 = load i32, i32* %p
   call void @clobber_and_use(i32 %v3)
   ret void
 }

llvm/test/Transforms/EarlyCSE/invariant.start.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature
-; RUN: opt < %s -S -early-cse -earlycse-debug-hash | FileCheck %s --check-prefixes=CHECK,NO_ASSUME
-; RUN: opt < %s -S -early-cse --enable-knowledge-retention | FileCheck %s --check-prefixes=CHECK,USE_ASSUME
-; RUN: opt < %s -S -passes=early-cse | FileCheck %s --check-prefixes=CHECK,NO_ASSUME
+; RUN: opt < %s -S -early-cse -earlycse-debug-hash -normalize-opaque-pointers | FileCheck %s --check-prefixes=CHECK,NO_ASSUME
+; RUN: opt < %s -S -early-cse --enable-knowledge-retention -normalize-opaque-pointers | FileCheck %s --check-prefixes=CHECK,USE_ASSUME
+; RUN: opt < %s -S -passes=early-cse -normalize-opaque-pointers | FileCheck %s --check-prefixes=CHECK,NO_ASSUME
 
 declare {}* @llvm.invariant.start.p0i8(i64, i8* nocapture) nounwind readonly
 declare void @llvm.invariant.end.p0i8({}*, i64, i8* nocapture) nounwind
 
 ; Check that we do load-load forwarding over invariant.start, since it does not
 ; clobber memory
 define i8 @test_bypass1(i8 *%P) {
 ; NO_ASSUME-LABEL: define {{[^@]+}}@test_bypass1
-; NO_ASSUME-SAME: (i8* [[P:%.*]])
-; NO_ASSUME-NEXT:    [[V1:%.*]] = load i8, i8* [[P]], align 1
-; NO_ASSUME-NEXT:    [[I:%.*]] = call {}* @llvm.invariant.start.p0i8(i64 1, i8* [[P]])
+; NO_ASSUME-SAME: (ptr [[P:%.*]]) {
+; NO_ASSUME-NEXT:    [[V1:%.*]] = load i8, ptr [[P]], align 1
+; NO_ASSUME-NEXT:    [[I:%.*]] = call ptr @llvm.invariant.start.p0(i64 1, ptr [[P]])
 ; NO_ASSUME-NEXT:    ret i8 0
 ;
 ; USE_ASSUME-LABEL: define {{[^@]+}}@test_bypass1
-; USE_ASSUME-SAME: (i8* [[P:%.*]])
-; USE_ASSUME-NEXT:    [[V1:%.*]] = load i8, i8* [[P]], align 1
-; USE_ASSUME-NEXT:    [[I:%.*]] = call {}* @llvm.invariant.start.p0i8(i64 1, i8* [[P]])
-; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i8* [[P]], i64 1), "nonnull"(i8* [[P]]) ]
+; USE_ASSUME-SAME: (ptr [[P:%.*]]) {
+; USE_ASSUME-NEXT:    [[V1:%.*]] = load i8, ptr [[P]], align 1
+; USE_ASSUME-NEXT:    [[I:%.*]] = call ptr @llvm.invariant.start.p0(i64 1, ptr [[P]])
+; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(ptr [[P]], i64 1), "nonnull"(ptr [[P]]) ]
 ; USE_ASSUME-NEXT:    ret i8 0
 ;
 
   %V1 = load i8, i8* %P
   %i = call {}* @llvm.invariant.start.p0i8(i64 1, i8* %P)
   %V2 = load i8, i8* %P
   %Diff = sub i8 %V1, %V2
   ret i8 %Diff
 }
 
 
 ; Trivial Store->load forwarding over invariant.start
 define i8 @test_bypass2(i8 *%P) {
 ; NO_ASSUME-LABEL: define {{[^@]+}}@test_bypass2
-; NO_ASSUME-SAME: (i8* [[P:%.*]])
-; NO_ASSUME-NEXT:    store i8 42, i8* [[P]], align 1
-; NO_ASSUME-NEXT:    [[I:%.*]] = call {}* @llvm.invariant.start.p0i8(i64 1, i8* [[P]])
+; NO_ASSUME-SAME: (ptr [[P:%.*]]) {
+; NO_ASSUME-NEXT:    store i8 42, ptr [[P]], align 1
+; NO_ASSUME-NEXT:    [[I:%.*]] = call ptr @llvm.invariant.start.p0(i64 1, ptr [[P]])
 ; NO_ASSUME-NEXT:    ret i8 42
 ;
 ; USE_ASSUME-LABEL: define {{[^@]+}}@test_bypass2
-; USE_ASSUME-SAME: (i8* [[P:%.*]])
-; USE_ASSUME-NEXT:    store i8 42, i8* [[P]], align 1
-; USE_ASSUME-NEXT:    [[I:%.*]] = call {}* @llvm.invariant.start.p0i8(i64 1, i8* [[P]])
-; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i8* [[P]], i64 1), "nonnull"(i8* [[P]]) ]
+; USE_ASSUME-SAME: (ptr [[P:%.*]]) {
+; USE_ASSUME-NEXT:    store i8 42, ptr [[P]], align 1
+; USE_ASSUME-NEXT:    [[I:%.*]] = call ptr @llvm.invariant.start.p0(i64 1, ptr [[P]])
+; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(ptr [[P]], i64 1), "nonnull"(ptr [[P]]) ]
 ; USE_ASSUME-NEXT:    ret i8 42
 ;
 
   store i8 42, i8* %P
   %i = call {}* @llvm.invariant.start.p0i8(i64 1, i8* %P)
   %V1 = load i8, i8* %P
   ret i8 %V1
 }
 
 ; We can DSE over invariant.start calls, since the first store to
 ; %P is valid, and the second store is actually unreachable based on semantics
 ; of invariant.start.
 define void @test_bypass3(i8* %P) {
 ; NO_ASSUME-LABEL: define {{[^@]+}}@test_bypass3
-; NO_ASSUME-SAME: (i8* [[P:%.*]])
-; NO_ASSUME-NEXT:    [[I:%.*]] = call {}* @llvm.invariant.start.p0i8(i64 1, i8* [[P]])
-; NO_ASSUME-NEXT:    store i8 60, i8* [[P]], align 1
+; NO_ASSUME-SAME: (ptr [[P:%.*]]) {
+; NO_ASSUME-NEXT:    [[I:%.*]] = call ptr @llvm.invariant.start.p0(i64 1, ptr [[P]])
+; NO_ASSUME-NEXT:    store i8 60, ptr [[P]], align 1
 ; NO_ASSUME-NEXT:    ret void
 ;
 ; USE_ASSUME-LABEL: define {{[^@]+}}@test_bypass3
-; USE_ASSUME-SAME: (i8* [[P:%.*]])
-; USE_ASSUME-NEXT:    [[I:%.*]] = call {}* @llvm.invariant.start.p0i8(i64 1, i8* [[P]])
-; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i8* [[P]], i64 1), "nonnull"(i8* [[P]]) ]
-; USE_ASSUME-NEXT:    store i8 60, i8* [[P]], align 1
+; USE_ASSUME-SAME: (ptr [[P:%.*]]) {
+; USE_ASSUME-NEXT:    [[I:%.*]] = call ptr @llvm.invariant.start.p0(i64 1, ptr [[P]])
+; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(ptr [[P]], i64 1), "nonnull"(ptr [[P]]) ]
+; USE_ASSUME-NEXT:    store i8 60, ptr [[P]], align 1
 ; USE_ASSUME-NEXT:    ret void
 ;
 
   store i8 50, i8* %P
   %i = call {}* @llvm.invariant.start.p0i8(i64 1, i8* %P)
   store i8 60, i8* %P
   ret void
 }
 
 
 ; FIXME: Now the first store can actually be eliminated, since there is no read within
 ; the invariant region, between start and end.
 define void @test_bypass4(i8* %P) {
 ; CHECK-LABEL: define {{[^@]+}}@test_bypass4
-; CHECK-SAME: (i8* [[P:%.*]])
-; CHECK-NEXT:    store i8 50, i8* [[P]], align 1
-; CHECK-NEXT:    [[I:%.*]] = call {}* @llvm.invariant.start.p0i8(i64 1, i8* [[P]])
-; CHECK-NEXT:    call void @llvm.invariant.end.p0i8({}* [[I]], i64 1, i8* [[P]])
-; CHECK-NEXT:    store i8 60, i8* [[P]], align 1
+; CHECK-SAME: (ptr [[P:%.*]]) {
+; CHECK-NEXT:    store i8 50, ptr [[P]], align 1
+; CHECK-NEXT:    [[I:%.*]] = call ptr @llvm.invariant.start.p0(i64 1, ptr [[P]])
+; CHECK-NEXT:    call void @llvm.invariant.end.p0(ptr [[I]], i64 1, ptr [[P]])
+; CHECK-NEXT:    store i8 60, ptr [[P]], align 1
 ; CHECK-NEXT:    ret void
 ;
 
 
   store i8 50, i8* %P
   %i = call {}* @llvm.invariant.start.p0i8(i64 1, i8* %P)
   call void @llvm.invariant.end.p0i8({}* %i, i64 1, i8* %P)
   store i8 60, i8* %P
   ret void
 }
 
 
 declare void @clobber()
 declare {}* @llvm.invariant.start.p0i32(i64 %size, i32* nocapture %ptr)
 declare void @llvm.invariant.end.p0i32({}*, i64, i32* nocapture) nounwind
 
 define i32 @test_before_load(i32* %p) {
 ; NO_ASSUME-LABEL: define {{[^@]+}}@test_before_load
-; NO_ASSUME-SAME: (i32* [[P:%.*]])
-; NO_ASSUME-NEXT:    [[TMP1:%.*]] = call {}* @llvm.invariant.start.p0i32(i64 4, i32* [[P]])
-; NO_ASSUME-NEXT:    [[V1:%.*]] = load i32, i32* [[P]], align 4
+; NO_ASSUME-SAME: (ptr [[P:%.*]]) {
+; NO_ASSUME-NEXT:    [[TMP1:%.*]] = call ptr @llvm.invariant.start.p0(i64 4, ptr [[P]])
+; NO_ASSUME-NEXT:    [[V1:%.*]] = load i32, ptr [[P]], align 4
 ; NO_ASSUME-NEXT:    call void @clobber()
 ; NO_ASSUME-NEXT:    ret i32 0
 ;
 ; USE_ASSUME-LABEL: define {{[^@]+}}@test_before_load
-; USE_ASSUME-SAME: (i32* [[P:%.*]])
-; USE_ASSUME-NEXT:    [[TMP1:%.*]] = call {}* @llvm.invariant.start.p0i32(i64 4, i32* [[P]])
-; USE_ASSUME-NEXT:    [[V1:%.*]] = load i32, i32* [[P]], align 4
+; USE_ASSUME-SAME: (ptr [[P:%.*]]) {
+; USE_ASSUME-NEXT:    [[TMP1:%.*]] = call ptr @llvm.invariant.start.p0(i64 4, ptr [[P]])
+; USE_ASSUME-NEXT:    [[V1:%.*]] = load i32, ptr [[P]], align 4
 ; USE_ASSUME-NEXT:    call void @clobber()
-; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[P]], i64 4), "nonnull"(i32* [[P]]), "align"(i32* [[P]], i64 4) ]
+; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(ptr [[P]], i64 4), "nonnull"(ptr [[P]]), "align"(ptr [[P]], i64 4) ]
 ; USE_ASSUME-NEXT:    ret i32 0
 ;
   call {}* @llvm.invariant.start.p0i32(i64 4, i32* %p)
   %v1 = load i32, i32* %p
   call void @clobber()
   %v2 = load i32, i32* %p
   %sub = sub i32 %v1, %v2
   ret i32 %sub
 }
 
 define i32 @test_before_clobber(i32* %p) {
 ; NO_ASSUME-LABEL: define {{[^@]+}}@test_before_clobber
-; NO_ASSUME-SAME: (i32* [[P:%.*]])
-; NO_ASSUME-NEXT:    [[V1:%.*]] = load i32, i32* [[P]], align 4
-; NO_ASSUME-NEXT:    [[TMP1:%.*]] = call {}* @llvm.invariant.start.p0i32(i64 4, i32* [[P]])
+; NO_ASSUME-SAME: (ptr [[P:%.*]]) {
+; NO_ASSUME-NEXT:    [[V1:%.*]] = load i32, ptr [[P]], align 4
+; NO_ASSUME-NEXT:    [[TMP1:%.*]] = call ptr @llvm.invariant.start.p0(i64 4, ptr [[P]])
 ; NO_ASSUME-NEXT:    call void @clobber()
 ; NO_ASSUME-NEXT:    ret i32 0
 ;
 ; USE_ASSUME-LABEL: define {{[^@]+}}@test_before_clobber
-; USE_ASSUME-SAME: (i32* [[P:%.*]])
-; USE_ASSUME-NEXT:    [[V1:%.*]] = load i32, i32* [[P]], align 4
-; USE_ASSUME-NEXT:    [[TMP1:%.*]] = call {}* @llvm.invariant.start.p0i32(i64 4, i32* [[P]])
+; USE_ASSUME-SAME: (ptr [[P:%.*]]) {
+; USE_ASSUME-NEXT:    [[V1:%.*]] = load i32, ptr [[P]], align 4
+; USE_ASSUME-NEXT:    [[TMP1:%.*]] = call ptr @llvm.invariant.start.p0(i64 4, ptr [[P]])
 ; USE_ASSUME-NEXT:    call void @clobber()
-; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[P]], i64 4), "nonnull"(i32* [[P]]), "align"(i32* [[P]], i64 4) ]
+; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(ptr [[P]], i64 4), "nonnull"(ptr [[P]]), "align"(ptr [[P]], i64 4) ]
 ; USE_ASSUME-NEXT:    ret i32 0
 ;
   %v1 = load i32, i32* %p
   call {}* @llvm.invariant.start.p0i32(i64 4, i32* %p)
   call void @clobber()
   %v2 = load i32, i32* %p
   %sub = sub i32 %v1, %v2
   ret i32 %sub
 }
 
 define i32 @test_duplicate_scope(i32* %p) {
 ; NO_ASSUME-LABEL: define {{[^@]+}}@test_duplicate_scope
-; NO_ASSUME-SAME: (i32* [[P:%.*]])
-; NO_ASSUME-NEXT:    [[V1:%.*]] = load i32, i32* [[P]], align 4
-; NO_ASSUME-NEXT:    [[TMP1:%.*]] = call {}* @llvm.invariant.start.p0i32(i64 4, i32* [[P]])
+; NO_ASSUME-SAME: (ptr [[P:%.*]]) {
+; NO_ASSUME-NEXT:    [[V1:%.*]] = load i32, ptr [[P]], align 4
+; NO_ASSUME-NEXT:    [[TMP1:%.*]] = call ptr @llvm.invariant.start.p0(i64 4, ptr [[P]])
 ; NO_ASSUME-NEXT:    call void @clobber()
-; NO_ASSUME-NEXT:    [[TMP2:%.*]] = call {}* @llvm.invariant.start.p0i32(i64 4, i32* [[P]])
+; NO_ASSUME-NEXT:    [[TMP2:%.*]] = call ptr @llvm.invariant.start.p0(i64 4, ptr [[P]])
 ; NO_ASSUME-NEXT:    ret i32 0
 ;
 ; USE_ASSUME-LABEL: define {{[^@]+}}@test_duplicate_scope
-; USE_ASSUME-SAME: (i32* [[P:%.*]])
-; USE_ASSUME-NEXT:    [[V1:%.*]] = load i32, i32* [[P]], align 4
-; USE_ASSUME-NEXT:    [[TMP1:%.*]] = call {}* @llvm.invariant.start.p0i32(i64 4, i32* [[P]])
+; USE_ASSUME-SAME: (ptr [[P:%.*]]) {
+; USE_ASSUME-NEXT:    [[V1:%.*]] = load i32, ptr [[P]], align 4
+; USE_ASSUME-NEXT:    [[TMP1:%.*]] = call ptr @llvm.invariant.start.p0(i64 4, ptr [[P]])
 ; USE_ASSUME-NEXT:    call void @clobber()
-; USE_ASSUME-NEXT:    [[TMP2:%.*]] = call {}* @llvm.invariant.start.p0i32(i64 4, i32* [[P]])
-; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[P]], i64 4), "nonnull"(i32* [[P]]), "align"(i32* [[P]], i64 4) ]
+; USE_ASSUME-NEXT:    [[TMP2:%.*]] = call ptr @llvm.invariant.start.p0(i64 4, ptr [[P]])
+; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(ptr [[P]], i64 4), "nonnull"(ptr [[P]]), "align"(ptr [[P]], i64 4) ]
 ; USE_ASSUME-NEXT:    ret i32 0
 ;
   %v1 = load i32, i32* %p
   call {}* @llvm.invariant.start.p0i32(i64 4, i32* %p)
   call void @clobber()
   call {}* @llvm.invariant.start.p0i32(i64 4, i32* %p)
   %v2 = load i32, i32* %p
   %sub = sub i32 %v1, %v2
   ret i32 %sub
 }
 
 define i32 @test_unanalzyable_load(i32* %p) {
 ; NO_ASSUME-LABEL: define {{[^@]+}}@test_unanalzyable_load
-; NO_ASSUME-SAME: (i32* [[P:%.*]])
-; NO_ASSUME-NEXT:    [[TMP1:%.*]] = call {}* @llvm.invariant.start.p0i32(i64 4, i32* [[P]])
+; NO_ASSUME-SAME: (ptr [[P:%.*]]) {
+; NO_ASSUME-NEXT:    [[TMP1:%.*]] = call ptr @llvm.invariant.start.p0(i64 4, ptr [[P]])
 ; NO_ASSUME-NEXT:    call void @clobber()
-; NO_ASSUME-NEXT:    [[V1:%.*]] = load i32, i32* [[P]], align 4
+; NO_ASSUME-NEXT:    [[V1:%.*]] = load i32, ptr [[P]], align 4
 ; NO_ASSUME-NEXT:    call void @clobber()
 ; NO_ASSUME-NEXT:    ret i32 0
 ;
 ; USE_ASSUME-LABEL: define {{[^@]+}}@test_unanalzyable_load
-; USE_ASSUME-SAME: (i32* [[P:%.*]])
-; USE_ASSUME-NEXT:    [[TMP1:%.*]] = call {}* @llvm.invariant.start.p0i32(i64 4, i32* [[P]])
+; USE_ASSUME-SAME: (ptr [[P:%.*]]) {
+; USE_ASSUME-NEXT:    [[TMP1:%.*]] = call ptr @llvm.invariant.start.p0(i64 4, ptr [[P]])
 ; USE_ASSUME-NEXT:    call void @clobber()
-; USE_ASSUME-NEXT:    [[V1:%.*]] = load i32, i32* [[P]], align 4
+; USE_ASSUME-NEXT:    [[V1:%.*]] = load i32, ptr [[P]], align 4
 ; USE_ASSUME-NEXT:    call void @clobber()
-; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[P]], i64 4), "nonnull"(i32* [[P]]), "align"(i32* [[P]], i64 4) ]
+; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(ptr [[P]], i64 4), "nonnull"(ptr [[P]]), "align"(ptr [[P]], i64 4) ]
 ; USE_ASSUME-NEXT:    ret i32 0
 ;
   call {}* @llvm.invariant.start.p0i32(i64 4, i32* %p)
   call void @clobber()
   %v1 = load i32, i32* %p
   call void @clobber()
   %v2 = load i32, i32* %p
   %sub = sub i32 %v1, %v2
   ret i32 %sub
 }
 
 define i32 @test_negative_after_clobber(i32* %p) {
 ; CHECK-LABEL: define {{[^@]+}}@test_negative_after_clobber
-; CHECK-SAME: (i32* [[P:%.*]])
-; CHECK-NEXT:    [[V1:%.*]] = load i32, i32* [[P]], align 4
+; CHECK-SAME: (ptr [[P:%.*]]) {
+; CHECK-NEXT:    [[V1:%.*]] = load i32, ptr [[P]], align 4
 ; CHECK-NEXT:    call void @clobber()
-; CHECK-NEXT:    [[TMP1:%.*]] = call {}* @llvm.invariant.start.p0i32(i64 4, i32* [[P]])
-; CHECK-NEXT:    [[V2:%.*]] = load i32, i32* [[P]], align 4
+; CHECK-NEXT:    [[TMP1:%.*]] = call ptr @llvm.invariant.start.p0(i64 4, ptr [[P]])
+; CHECK-NEXT:    [[V2:%.*]] = load i32, ptr [[P]], align 4
 ; CHECK-NEXT:    [[SUB:%.*]] = sub i32 [[V1]], [[V2]]
 ; CHECK-NEXT:    ret i32 [[SUB]]
 ;
   %v1 = load i32, i32* %p
   call void @clobber()
   call {}* @llvm.invariant.start.p0i32(i64 4, i32* %p)
   %v2 = load i32, i32* %p
   %sub = sub i32 %v1, %v2
   ret i32 %sub
 }
 
 define i32 @test_merge(i32* %p, i1 %cnd) {
 ; NO_ASSUME-LABEL: define {{[^@]+}}@test_merge
-; NO_ASSUME-SAME: (i32* [[P:%.*]], i1 [[CND:%.*]])
-; NO_ASSUME-NEXT:    [[V1:%.*]] = load i32, i32* [[P]], align 4
-; NO_ASSUME-NEXT:    [[TMP1:%.*]] = call {}* @llvm.invariant.start.p0i32(i64 4, i32* [[P]])
+; NO_ASSUME-SAME: (ptr [[P:%.*]], i1 [[CND:%.*]]) {
+; NO_ASSUME-NEXT:    [[V1:%.*]] = load i32, ptr [[P]], align 4
+; NO_ASSUME-NEXT:    [[TMP1:%.*]] = call ptr @llvm.invariant.start.p0(i64 4, ptr [[P]])
 ; NO_ASSUME-NEXT:    br i1 [[CND]], label [[MERGE:%.*]], label [[TAKEN:%.*]]
 ; NO_ASSUME:       taken:
 ; NO_ASSUME-NEXT:    call void @clobber()
 ; NO_ASSUME-NEXT:    br label [[MERGE]]
 ; NO_ASSUME:       merge:
 ; NO_ASSUME-NEXT:    ret i32 0
 ;
 ; USE_ASSUME-LABEL: define {{[^@]+}}@test_merge
-; USE_ASSUME-SAME: (i32* [[P:%.*]], i1 [[CND:%.*]])
-; USE_ASSUME-NEXT:    [[V1:%.*]] = load i32, i32* [[P]], align 4
-; USE_ASSUME-NEXT:    [[TMP1:%.*]] = call {}* @llvm.invariant.start.p0i32(i64 4, i32* [[P]])
+; USE_ASSUME-SAME: (ptr [[P:%.*]], i1 [[CND:%.*]]) {
+; USE_ASSUME-NEXT:    [[V1:%.*]] = load i32, ptr [[P]], align 4
+; USE_ASSUME-NEXT:    [[TMP1:%.*]] = call ptr @llvm.invariant.start.p0(i64 4, ptr [[P]])
 ; USE_ASSUME-NEXT:    br i1 [[CND]], label [[MERGE:%.*]], label [[TAKEN:%.*]]
 ; USE_ASSUME:       taken:
 ; USE_ASSUME-NEXT:    call void @clobber()
 ; USE_ASSUME-NEXT:    br label [[MERGE]]
 ; USE_ASSUME:       merge:
-; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[P]], i64 4), "nonnull"(i32* [[P]]), "align"(i32* [[P]], i64 4) ]
+; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(ptr [[P]], i64 4), "nonnull"(ptr [[P]]), "align"(ptr [[P]], i64 4) ]
 ; USE_ASSUME-NEXT:    ret i32 0
 ;
   %v1 = load i32, i32* %p
   call {}* @llvm.invariant.start.p0i32(i64 4, i32* %p)
   br i1 %cnd, label %merge, label %taken
 
 taken:
   call void @clobber()
   br label %merge
 merge:
   %v2 = load i32, i32* %p
   %sub = sub i32 %v1, %v2
   ret i32 %sub
 }
 
 define i32 @test_negative_after_mergeclobber(i32* %p, i1 %cnd) {
 ; CHECK-LABEL: define {{[^@]+}}@test_negative_after_mergeclobber
-; CHECK-SAME: (i32* [[P:%.*]], i1 [[CND:%.*]])
-; CHECK-NEXT:    [[V1:%.*]] = load i32, i32* [[P]], align 4
+; CHECK-SAME: (ptr [[P:%.*]], i1 [[CND:%.*]]) {
+; CHECK-NEXT:    [[V1:%.*]] = load i32, ptr [[P]], align 4
 ; CHECK-NEXT:    br i1 [[CND]], label [[MERGE:%.*]], label [[TAKEN:%.*]]
 ; CHECK:       taken:
 ; CHECK-NEXT:    call void @clobber()
 ; CHECK-NEXT:    br label [[MERGE]]
 ; CHECK:       merge:
-; CHECK-NEXT:    [[TMP1:%.*]] = call {}* @llvm.invariant.start.p0i32(i64 4, i32* [[P]])
-; CHECK-NEXT:    [[V2:%.*]] = load i32, i32* [[P]], align 4
+; CHECK-NEXT:    [[TMP1:%.*]] = call ptr @llvm.invariant.start.p0(i64 4, ptr [[P]])
+; CHECK-NEXT:    [[V2:%.*]] = load i32, ptr [[P]], align 4
 ; CHECK-NEXT:    [[SUB:%.*]] = sub i32 [[V1]], [[V2]]
 ; CHECK-NEXT:    ret i32 [[SUB]]
 ;
   %v1 = load i32, i32* %p
   br i1 %cnd, label %merge, label %taken
 
 taken:
   call void @clobber()
   br label %merge
 merge:
   call {}* @llvm.invariant.start.p0i32(i64 4, i32* %p)
   %v2 = load i32, i32* %p
   %sub = sub i32 %v1, %v2
   ret i32 %sub
 }
 
 ; In theory, this version could work, but earlycse is incapable of
 ; merging facts along distinct paths.
 define i32 @test_false_negative_merge(i32* %p, i1 %cnd) {
 ; CHECK-LABEL: define {{[^@]+}}@test_false_negative_merge
-; CHECK-SAME: (i32* [[P:%.*]], i1 [[CND:%.*]])
-; CHECK-NEXT:    [[V1:%.*]] = load i32, i32* [[P]], align 4
+; CHECK-SAME: (ptr [[P:%.*]], i1 [[CND:%.*]]) {
+; CHECK-NEXT:    [[V1:%.*]] = load i32, ptr [[P]], align 4
 ; CHECK-NEXT:    br i1 [[CND]], label [[MERGE:%.*]], label [[TAKEN:%.*]]
 ; CHECK:       taken:
-; CHECK-NEXT:    [[TMP1:%.*]] = call {}* @llvm.invariant.start.p0i32(i64 4, i32* [[P]])
+; CHECK-NEXT:    [[TMP1:%.*]] = call ptr @llvm.invariant.start.p0(i64 4, ptr [[P]])
 ; CHECK-NEXT:    call void @clobber()
 ; CHECK-NEXT:    br label [[MERGE]]
 ; CHECK:       merge:
-; CHECK-NEXT:    [[V2:%.*]] = load i32, i32* [[P]], align 4
+; CHECK-NEXT:    [[V2:%.*]] = load i32, ptr [[P]], align 4
 ; CHECK-NEXT:    [[SUB:%.*]] = sub i32 [[V1]], [[V2]]
 ; CHECK-NEXT:    ret i32 [[SUB]]
 ;
   %v1 = load i32, i32* %p
   br i1 %cnd, label %merge, label %taken
 
 taken:
   call {}* @llvm.invariant.start.p0i32(i64 4, i32* %p)
   call void @clobber()
   br label %merge
 merge:
   %v2 = load i32, i32* %p
   %sub = sub i32 %v1, %v2
   ret i32 %sub
 }
 
 define i32 @test_merge_unanalyzable_load(i32* %p, i1 %cnd) {
 ; NO_ASSUME-LABEL: define {{[^@]+}}@test_merge_unanalyzable_load
-; NO_ASSUME-SAME: (i32* [[P:%.*]], i1 [[CND:%.*]])
-; NO_ASSUME-NEXT:    [[TMP1:%.*]] = call {}* @llvm.invariant.start.p0i32(i64 4, i32* [[P]])
+; NO_ASSUME-SAME: (ptr [[P:%.*]], i1 [[CND:%.*]]) {
+; NO_ASSUME-NEXT:    [[TMP1:%.*]] = call ptr @llvm.invariant.start.p0(i64 4, ptr [[P]])
 ; NO_ASSUME-NEXT:    call void @clobber()
-; NO_ASSUME-NEXT:    [[V1:%.*]] = load i32, i32* [[P]], align 4
+; NO_ASSUME-NEXT:    [[V1:%.*]] = load i32, ptr [[P]], align 4
 ; NO_ASSUME-NEXT:    br i1 [[CND]], label [[MERGE:%.*]], label [[TAKEN:%.*]]
 ; NO_ASSUME:       taken:
 ; NO_ASSUME-NEXT:    call void @clobber()
 ; NO_ASSUME-NEXT:    br label [[MERGE]]
 ; NO_ASSUME:       merge:
 ; NO_ASSUME-NEXT:    ret i32 0
 ;
 ; USE_ASSUME-LABEL: define {{[^@]+}}@test_merge_unanalyzable_load
-; USE_ASSUME-SAME: (i32* [[P:%.*]], i1 [[CND:%.*]])
-; USE_ASSUME-NEXT:    [[TMP1:%.*]] = call {}* @llvm.invariant.start.p0i32(i64 4, i32* [[P]])
+; USE_ASSUME-SAME: (ptr [[P:%.*]], i1 [[CND:%.*]]) {
+; USE_ASSUME-NEXT:    [[TMP1:%.*]] = call ptr @llvm.invariant.start.p0(i64 4, ptr [[P]])
 ; USE_ASSUME-NEXT:    call void @clobber()
-; USE_ASSUME-NEXT:    [[V1:%.*]] = load i32, i32* [[P]], align 4
+; USE_ASSUME-NEXT:    [[V1:%.*]] = load i32, ptr [[P]], align 4
 ; USE_ASSUME-NEXT:    br i1 [[CND]], label [[MERGE:%.*]], label [[TAKEN:%.*]]
 ; USE_ASSUME:       taken:
 ; USE_ASSUME-NEXT:    call void @clobber()
 ; USE_ASSUME-NEXT:    br label [[MERGE]]
 ; USE_ASSUME:       merge:
-; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[P]], i64 4), "nonnull"(i32* [[P]]), "align"(i32* [[P]], i64 4) ]
+; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(ptr [[P]], i64 4), "nonnull"(ptr [[P]]), "align"(ptr [[P]], i64 4) ]
 ; USE_ASSUME-NEXT:    ret i32 0
 ;
   call {}* @llvm.invariant.start.p0i32(i64 4, i32* %p)
   call void @clobber()
   %v1 = load i32, i32* %p
   br i1 %cnd, label %merge, label %taken
 
 taken:
   call void @clobber()
   br label %merge
 merge:
   %v2 = load i32, i32* %p
   %sub = sub i32 %v1, %v2
   ret i32 %sub
 }
 
 define void @test_dse_before_load(i32* %p, i1 %cnd) {
 ; NO_ASSUME-LABEL: define {{[^@]+}}@test_dse_before_load
-; NO_ASSUME-SAME: (i32* [[P:%.*]], i1 [[CND:%.*]])
-; NO_ASSUME-NEXT:    [[TMP1:%.*]] = call {}* @llvm.invariant.start.p0i32(i64 4, i32* [[P]])
-; NO_ASSUME-NEXT:    [[V1:%.*]] = load i32, i32* [[P]], align 4
+; NO_ASSUME-SAME: (ptr [[P:%.*]], i1 [[CND:%.*]]) {
+; NO_ASSUME-NEXT:    [[TMP1:%.*]] = call ptr @llvm.invariant.start.p0(i64 4, ptr [[P]])
+; NO_ASSUME-NEXT:    [[V1:%.*]] = load i32, ptr [[P]], align 4
 ; NO_ASSUME-NEXT:    call void @clobber()
 ; NO_ASSUME-NEXT:    ret void
 ;
 ; USE_ASSUME-LABEL: define {{[^@]+}}@test_dse_before_load
-; USE_ASSUME-SAME: (i32* [[P:%.*]], i1 [[CND:%.*]])
-; USE_ASSUME-NEXT:    [[TMP1:%.*]] = call {}* @llvm.invariant.start.p0i32(i64 4, i32* [[P]])
-; USE_ASSUME-NEXT:    [[V1:%.*]] = load i32, i32* [[P]], align 4
+; USE_ASSUME-SAME: (ptr [[P:%.*]], i1 [[CND:%.*]]) {
+; USE_ASSUME-NEXT:    [[TMP1:%.*]] = call ptr @llvm.invariant.start.p0(i64 4, ptr [[P]])
+; USE_ASSUME-NEXT:    [[V1:%.*]] = load i32, ptr [[P]], align 4
 ; USE_ASSUME-NEXT:    call void @clobber()
-; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[P]], i64 4), "nonnull"(i32* [[P]]), "align"(i32* [[P]], i64 4) ]
+; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(ptr [[P]], i64 4), "nonnull"(ptr [[P]]), "align"(ptr [[P]], i64 4) ]
 ; USE_ASSUME-NEXT:    ret void
 ;
   call {}* @llvm.invariant.start.p0i32(i64 4, i32* %p)
   %v1 = load i32, i32* %p
   call void @clobber()
   store i32 %v1, i32* %p
   ret void
 }
 
 define void @test_dse_after_load(i32* %p, i1 %cnd) {
 ; NO_ASSUME-LABEL: define {{[^@]+}}@test_dse_after_load
-; NO_ASSUME-SAME: (i32* [[P:%.*]], i1 [[CND:%.*]])
-; NO_ASSUME-NEXT:    [[V1:%.*]] = load i32, i32* [[P]], align 4
-; NO_ASSUME-NEXT:    [[TMP1:%.*]] = call {}* @llvm.invariant.start.p0i32(i64 4, i32* [[P]])
+; NO_ASSUME-SAME: (ptr [[P:%.*]], i1 [[CND:%.*]]) {
+; NO_ASSUME-NEXT:    [[V1:%.*]] = load i32, ptr [[P]], align 4
+; NO_ASSUME-NEXT:    [[TMP1:%.*]] = call ptr @llvm.invariant.start.p0(i64 4, ptr [[P]])
 ; NO_ASSUME-NEXT:    call void @clobber()
 ; NO_ASSUME-NEXT:    ret void
 ;
 ; USE_ASSUME-LABEL: define {{[^@]+}}@test_dse_after_load
-; USE_ASSUME-SAME: (i32* [[P:%.*]], i1 [[CND:%.*]])
-; USE_ASSUME-NEXT:    [[V1:%.*]] = load i32, i32* [[P]], align 4
-; USE_ASSUME-NEXT:    [[TMP1:%.*]] = call {}* @llvm.invariant.start.p0i32(i64 4, i32* [[P]])
+; USE_ASSUME-SAME: (ptr [[P:%.*]], i1 [[CND:%.*]]) {
+; USE_ASSUME-NEXT:    [[V1:%.*]] = load i32, ptr [[P]], align 4
+; USE_ASSUME-NEXT:    [[TMP1:%.*]] = call ptr @llvm.invariant.start.p0(i64 4, ptr [[P]])
 ; USE_ASSUME-NEXT:    call void @clobber()
-; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[P]], i64 4), "nonnull"(i32* [[P]]), "align"(i32* [[P]], i64 4) ]
+; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(ptr [[P]], i64 4), "nonnull"(ptr [[P]]), "align"(ptr [[P]], i64 4) ]
 ; USE_ASSUME-NEXT:    ret void
 ;
   %v1 = load i32, i32* %p
   call {}* @llvm.invariant.start.p0i32(i64 4, i32* %p)
   call void @clobber()
   store i32 %v1, i32* %p
   ret void
 }
 
 
 ; In this case, we have a false negative since MemoryLocation is implicitly
 ; typed due to the user of a Value to represent the address.  Note that other
 ; passes will canonicalize away the bitcasts in this example.
 define i32 @test_false_negative_types(i32* %p) {
 ; CHECK-LABEL: define {{[^@]+}}@test_false_negative_types
-; CHECK-SAME: (i32* [[P:%.*]])
-; CHECK-NEXT:    [[TMP1:%.*]] = call {}* @llvm.invariant.start.p0i32(i64 4, i32* [[P]])
-; CHECK-NEXT:    [[V1:%.*]] = load i32, i32* [[P]], align 4
+; CHECK-SAME: (ptr [[P:%.*]]) {
+; CHECK-NEXT:    [[TMP1:%.*]] = call ptr @llvm.invariant.start.p0(i64 4, ptr [[P]])
+; CHECK-NEXT:    [[V1:%.*]] = load i32, ptr [[P]], align 4
 ; CHECK-NEXT:    call void @clobber()
-; CHECK-NEXT:    [[PF:%.*]] = bitcast i32* [[P]] to float*
-; CHECK-NEXT:    [[V2F:%.*]] = load float, float* [[PF]], align 4
+; CHECK-NEXT:    [[V2F:%.*]] = load float, ptr [[P]], align 4
 ; CHECK-NEXT:    [[V2:%.*]] = bitcast float [[V2F]] to i32
 ; CHECK-NEXT:    [[SUB:%.*]] = sub i32 [[V1]], [[V2]]
 ; CHECK-NEXT:    ret i32 [[SUB]]
 ;
   call {}* @llvm.invariant.start.p0i32(i64 4, i32* %p)
   %v1 = load i32, i32* %p
   call void @clobber()
   %pf = bitcast i32* %p to float*
   %v2f = load float, float* %pf
   %v2 = bitcast float %v2f to i32
   %sub = sub i32 %v1, %v2
   ret i32 %sub
 }
 
 define i32 @test_negative_size1(i32* %p) {
 ; CHECK-LABEL: define {{[^@]+}}@test_negative_size1
-; CHECK-SAME: (i32* [[P:%.*]])
-; CHECK-NEXT:    [[TMP1:%.*]] = call {}* @llvm.invariant.start.p0i32(i64 3, i32* [[P]])
-; CHECK-NEXT:    [[V1:%.*]] = load i32, i32* [[P]], align 4
+; CHECK-SAME: (ptr [[P:%.*]]) {
+; CHECK-NEXT:    [[TMP1:%.*]] = call ptr @llvm.invariant.start.p0(i64 3, ptr [[P]])
+; CHECK-NEXT:    [[V1:%.*]] = load i32, ptr [[P]], align 4
 ; CHECK-NEXT:    call void @clobber()
-; CHECK-NEXT:    [[V2:%.*]] = load i32, i32* [[P]], align 4
+; CHECK-NEXT:    [[V2:%.*]] = load i32, ptr [[P]], align 4
 ; CHECK-NEXT:    [[SUB:%.*]] = sub i32 [[V1]], [[V2]]
 ; CHECK-NEXT:    ret i32 [[SUB]]
 ;
   call {}* @llvm.invariant.start.p0i32(i64 3, i32* %p)
   %v1 = load i32, i32* %p
   call void @clobber()
   %v2 = load i32, i32* %p
   %sub = sub i32 %v1, %v2
   ret i32 %sub
 }
 
 define i32 @test_negative_size2(i32* %p) {
 ; CHECK-LABEL: define {{[^@]+}}@test_negative_size2
-; CHECK-SAME: (i32* [[P:%.*]])
-; CHECK-NEXT:    [[TMP1:%.*]] = call {}* @llvm.invariant.start.p0i32(i64 0, i32* [[P]])
-; CHECK-NEXT:    [[V1:%.*]] = load i32, i32* [[P]], align 4
+; CHECK-SAME: (ptr [[P:%.*]]) {
+; CHECK-NEXT:    [[TMP1:%.*]] = call ptr @llvm.invariant.start.p0(i64 0, ptr [[P]])
+; CHECK-NEXT:    [[V1:%.*]] = load i32, ptr [[P]], align 4
 ; CHECK-NEXT:    call void @clobber()
-; CHECK-NEXT:    [[V2:%.*]] = load i32, i32* [[P]], align 4
+; CHECK-NEXT:    [[V2:%.*]] = load i32, ptr [[P]], align 4
 ; CHECK-NEXT:    [[SUB:%.*]] = sub i32 [[V1]], [[V2]]
 ; CHECK-NEXT:    ret i32 [[SUB]]
 ;
   call {}* @llvm.invariant.start.p0i32(i64 0, i32* %p)
   %v1 = load i32, i32* %p
   call void @clobber()
   %v2 = load i32, i32* %p
   %sub = sub i32 %v1, %v2
   ret i32 %sub
 }
 
 define i32 @test_negative_scope(i32* %p) {
 ; CHECK-LABEL: define {{[^@]+}}@test_negative_scope
-; CHECK-SAME: (i32* [[P:%.*]])
-; CHECK-NEXT:    [[SCOPE:%.*]] = call {}* @llvm.invariant.start.p0i32(i64 4, i32* [[P]])
-; CHECK-NEXT:    call void @llvm.invariant.end.p0i32({}* [[SCOPE]], i64 4, i32* [[P]])
-; CHECK-NEXT:    [[V1:%.*]] = load i32, i32* [[P]], align 4
+; CHECK-SAME: (ptr [[P:%.*]]) {
+; CHECK-NEXT:    [[SCOPE:%.*]] = call ptr @llvm.invariant.start.p0(i64 4, ptr [[P]])
+; CHECK-NEXT:    call void @llvm.invariant.end.p0(ptr [[SCOPE]], i64 4, ptr [[P]])
+; CHECK-NEXT:    [[V1:%.*]] = load i32, ptr [[P]], align 4
 ; CHECK-NEXT:    call void @clobber()
-; CHECK-NEXT:    [[V2:%.*]] = load i32, i32* [[P]], align 4
+; CHECK-NEXT:    [[V2:%.*]] = load i32, ptr [[P]], align 4
 ; CHECK-NEXT:    [[SUB:%.*]] = sub i32 [[V1]], [[V2]]
 ; CHECK-NEXT:    ret i32 [[SUB]]
 ;
   %scope = call {}* @llvm.invariant.start.p0i32(i64 4, i32* %p)
   call void @llvm.invariant.end.p0i32({}* %scope, i64 4, i32* %p)
   %v1 = load i32, i32* %p
   call void @clobber()
   %v2 = load i32, i32* %p
   %sub = sub i32 %v1, %v2
   ret i32 %sub
 }
 
 define i32 @test_false_negative_scope(i32* %p) {
 ; CHECK-LABEL: define {{[^@]+}}@test_false_negative_scope
-; CHECK-SAME: (i32* [[P:%.*]])
-; CHECK-NEXT:    [[SCOPE:%.*]] = call {}* @llvm.invariant.start.p0i32(i64 4, i32* [[P]])
-; CHECK-NEXT:    [[V1:%.*]] = load i32, i32* [[P]], align 4
+; CHECK-SAME: (ptr [[P:%.*]]) {
+; CHECK-NEXT:    [[SCOPE:%.*]] = call ptr @llvm.invariant.start.p0(i64 4, ptr [[P]])
+; CHECK-NEXT:    [[V1:%.*]] = load i32, ptr [[P]], align 4
 ; CHECK-NEXT:    call void @clobber()
-; CHECK-NEXT:    [[V2:%.*]] = load i32, i32* [[P]], align 4
-; CHECK-NEXT:    call void @llvm.invariant.end.p0i32({}* [[SCOPE]], i64 4, i32* [[P]])
+; CHECK-NEXT:    [[V2:%.*]] = load i32, ptr [[P]], align 4
+; CHECK-NEXT:    call void @llvm.invariant.end.p0(ptr [[SCOPE]], i64 4, ptr [[P]])
 ; CHECK-NEXT:    [[SUB:%.*]] = sub i32 [[V1]], [[V2]]
 ; CHECK-NEXT:    ret i32 [[SUB]]
 ;
   %scope = call {}* @llvm.invariant.start.p0i32(i64 4, i32* %p)
   %v1 = load i32, i32* %p
   call void @clobber()
   %v2 = load i32, i32* %p
   call void @llvm.invariant.end.p0i32({}* %scope, i64 4, i32* %p)
   %sub = sub i32 %v1, %v2
   ret i32 %sub
 }
 
 ; Invariant load defact starts an invariant.start scope of the appropriate size
 define i32 @test_invariant_load_scope(i32* %p) {
 ; NO_ASSUME-LABEL: define {{[^@]+}}@test_invariant_load_scope
-; NO_ASSUME-SAME: (i32* [[P:%.*]])
-; NO_ASSUME-NEXT:    [[V1:%.*]] = load i32, i32* [[P]], align 4, !invariant.load !0
+; NO_ASSUME-SAME: (ptr [[P:%.*]]) {
+; NO_ASSUME-NEXT:    [[V1:%.*]] = load i32, ptr [[P]], align 4, !invariant.load !0
 ; NO_ASSUME-NEXT:    call void @clobber()
 ; NO_ASSUME-NEXT:    ret i32 0
 ;
 ; USE_ASSUME-LABEL: define {{[^@]+}}@test_invariant_load_scope
-; USE_ASSUME-SAME: (i32* [[P:%.*]])
-; USE_ASSUME-NEXT:    [[V1:%.*]] = load i32, i32* [[P]], align 4, !invariant.load !0
+; USE_ASSUME-SAME: (ptr [[P:%.*]]) {
+; USE_ASSUME-NEXT:    [[V1:%.*]] = load i32, ptr [[P]], align 4, !invariant.load !0
 ; USE_ASSUME-NEXT:    call void @clobber()
-; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(i32* [[P]], i64 4), "nonnull"(i32* [[P]]), "align"(i32* [[P]], i64 4) ]
+; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(ptr [[P]], i64 4), "nonnull"(ptr [[P]]), "align"(ptr [[P]], i64 4) ]
 ; USE_ASSUME-NEXT:    ret i32 0
 ;
   %v1 = load i32, i32* %p, !invariant.load !{}
   call void @clobber()
   %v2 = load i32, i32* %p
   %sub = sub i32 %v1, %v2
   ret i32 %sub
 }
 
 ; USE_ASSUME: declare void @llvm.assume(i1 noundef)

llvm/test/Transforms/EarlyCSE/masked-intrinsics-unequal-masks.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -S -early-cse < %s | FileCheck %s
+; RUN: opt -S -early-cse -normalize-opaque-pointers < %s | FileCheck %s
 
 ; Unequal mask check.
 
 ; Load-load: the second load can be removed if (assuming unequal masks) the
 ; second loaded value is a subset of the first loaded value considering the
 ; non-undef vector elements. In other words, if the second mask is a submask
 ; of the first one, and the through value of the second load is undef.
 
 ; Load-load, second mask is a submask of the first, second through is undef.
 ; Expect the second load to be removed.
 define <4 x i32> @f3(<4 x i32>* %a0, <4 x i32> %a1) {
 ; CHECK-LABEL: @f3(
-; CHECK-NEXT:    [[V0:%.*]] = call <4 x i32> @llvm.masked.load.v4i32.p0v4i32(<4 x i32>* [[A0:%.*]], i32 4, <4 x i1> <i1 true, i1 true, i1 false, i1 true>, <4 x i32> [[A1:%.*]])
+; CHECK-NEXT:    [[V0:%.*]] = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr [[A0:%.*]], i32 4, <4 x i1> <i1 true, i1 true, i1 false, i1 true>, <4 x i32> [[A1:%.*]])
 ; CHECK-NEXT:    [[V2:%.*]] = add <4 x i32> [[V0]], [[V0]]
 ; CHECK-NEXT:    ret <4 x i32> [[V2]]
 ;
   %v0 = call <4 x i32> @llvm.masked.load.v4i32.p0v4i32(<4 x i32>* %a0, i32 4, <4 x i1> <i1 true, i1 true, i1 false, i1 true>, <4 x i32> %a1)
   %v1 = call <4 x i32> @llvm.masked.load.v4i32.p0v4i32(<4 x i32>* %a0, i32 4, <4 x i1> <i1 true, i1 false, i1 false, i1 true>, <4 x i32> undef)
   %v2 = add <4 x i32> %v0, %v1
   ret <4 x i32> %v2
 }
 
 ; Load-load, second mask is a submask of the first, second through is not undef.
 ; Expect the second load to remain.
 define <4 x i32> @f4(<4 x i32>* %a0, <4 x i32> %a1) {
 ; CHECK-LABEL: @f4(
-; CHECK-NEXT:    [[V0:%.*]] = call <4 x i32> @llvm.masked.load.v4i32.p0v4i32(<4 x i32>* [[A0:%.*]], i32 4, <4 x i1> <i1 true, i1 true, i1 false, i1 true>, <4 x i32> [[A1:%.*]])
-; CHECK-NEXT:    [[V1:%.*]] = call <4 x i32> @llvm.masked.load.v4i32.p0v4i32(<4 x i32>* [[A0]], i32 4, <4 x i1> <i1 true, i1 false, i1 false, i1 true>, <4 x i32> zeroinitializer)
+; CHECK-NEXT:    [[V0:%.*]] = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr [[A0:%.*]], i32 4, <4 x i1> <i1 true, i1 true, i1 false, i1 true>, <4 x i32> [[A1:%.*]])
+; CHECK-NEXT:    [[V1:%.*]] = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr [[A0]], i32 4, <4 x i1> <i1 true, i1 false, i1 false, i1 true>, <4 x i32> zeroinitializer)
 ; CHECK-NEXT:    [[V2:%.*]] = add <4 x i32> [[V0]], [[V1]]
 ; CHECK-NEXT:    ret <4 x i32> [[V2]]
 ;
   %v0 = call <4 x i32> @llvm.masked.load.v4i32.p0v4i32(<4 x i32>* %a0, i32 4, <4 x i1> <i1 true, i1 true, i1 false, i1 true>, <4 x i32> %a1)
   %v1 = call <4 x i32> @llvm.masked.load.v4i32.p0v4i32(<4 x i32>* %a0, i32 4, <4 x i1> <i1 true, i1 false, i1 false, i1 true>, <4 x i32> zeroinitializer)
   %v2 = add <4 x i32> %v0, %v1
   ret <4 x i32> %v2
 }
 
 ; Load-load, second mask is not a submask of the first, second through is undef.
 ; Expect the second load to remain.
 define <4 x i32> @f5(<4 x i32>* %a0, <4 x i32> %a1) {
 ; CHECK-LABEL: @f5(
-; CHECK-NEXT:    [[V0:%.*]] = call <4 x i32> @llvm.masked.load.v4i32.p0v4i32(<4 x i32>* [[A0:%.*]], i32 4, <4 x i1> <i1 true, i1 true, i1 false, i1 true>, <4 x i32> [[A1:%.*]])
-; CHECK-NEXT:    [[V1:%.*]] = call <4 x i32> @llvm.masked.load.v4i32.p0v4i32(<4 x i32>* [[A0]], i32 4, <4 x i1> <i1 true, i1 false, i1 false, i1 true>, <4 x i32> zeroinitializer)
+; CHECK-NEXT:    [[V0:%.*]] = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr [[A0:%.*]], i32 4, <4 x i1> <i1 true, i1 true, i1 false, i1 true>, <4 x i32> [[A1:%.*]])
+; CHECK-NEXT:    [[V1:%.*]] = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr [[A0]], i32 4, <4 x i1> <i1 true, i1 false, i1 false, i1 true>, <4 x i32> zeroinitializer)
 ; CHECK-NEXT:    [[V2:%.*]] = add <4 x i32> [[V0]], [[V1]]
 ; CHECK-NEXT:    ret <4 x i32> [[V2]]
 ;
   %v0 = call <4 x i32> @llvm.masked.load.v4i32.p0v4i32(<4 x i32>* %a0, i32 4, <4 x i1> <i1 true, i1 true, i1 false, i1 true>, <4 x i32> %a1)
   %v1 = call <4 x i32> @llvm.masked.load.v4i32.p0v4i32(<4 x i32>* %a0, i32 4, <4 x i1> <i1 true, i1 false, i1 false, i1 true>, <4 x i32> zeroinitializer)
   %v2 = add <4 x i32> %v0, %v1
   ret <4 x i32> %v2
 }
 
 ; Store-store: the first store can be removed if the first; mask is a submask
 ; of the second mask.
 
 ; Store-store, first mask is a submask of the second.
 ; Expect the first store to be removed.
 define void @f6(<4 x i32> %a0, <4 x i32>* %a1) {
 ; CHECK-LABEL: @f6(
-; CHECK-NEXT:    call void @llvm.masked.store.v4i32.p0v4i32(<4 x i32> [[A0:%.*]], <4 x i32>* [[A1:%.*]], i32 4, <4 x i1> <i1 true, i1 true, i1 false, i1 true>)
+; CHECK-NEXT:    call void @llvm.masked.store.v4i32.p0(<4 x i32> [[A0:%.*]], ptr [[A1:%.*]], i32 4, <4 x i1> <i1 true, i1 true, i1 false, i1 true>)
 ; CHECK-NEXT:    ret void
 ;
   call void @llvm.masked.store.v4i32.p0v4i32(<4 x i32> %a0, <4 x i32>* %a1, i32 4, <4 x i1> <i1 true, i1 false, i1 false, i1 true>)
   call void @llvm.masked.store.v4i32.p0v4i32(<4 x i32> %a0, <4 x i32>* %a1, i32 4, <4 x i1> <i1 true, i1 true, i1 false, i1 true>)
   ret void
 }
 
 ; Store-store, first mask is not a submask of the second.
 ; Expect both stores to remain.
 define void @f7(<4 x i32> %a0, <4 x i32>* %a1) {
 ; CHECK-LABEL: @f7(
-; CHECK-NEXT:    call void @llvm.masked.store.v4i32.p0v4i32(<4 x i32> [[A0:%.*]], <4 x i32>* [[A1:%.*]], i32 4, <4 x i1> <i1 true, i1 true, i1 false, i1 true>)
-; CHECK-NEXT:    call void @llvm.masked.store.v4i32.p0v4i32(<4 x i32> [[A0]], <4 x i32>* [[A1]], i32 4, <4 x i1> <i1 true, i1 false, i1 false, i1 true>)
+; CHECK-NEXT:    call void @llvm.masked.store.v4i32.p0(<4 x i32> [[A0:%.*]], ptr [[A1:%.*]], i32 4, <4 x i1> <i1 true, i1 true, i1 false, i1 true>)
+; CHECK-NEXT:    call void @llvm.masked.store.v4i32.p0(<4 x i32> [[A0]], ptr [[A1]], i32 4, <4 x i1> <i1 true, i1 false, i1 false, i1 true>)
 ; CHECK-NEXT:    ret void
 ;
   call void @llvm.masked.store.v4i32.p0v4i32(<4 x i32> %a0, <4 x i32>* %a1, i32 4, <4 x i1> <i1 true, i1 true, i1 false, i1 true>)
   call void @llvm.masked.store.v4i32.p0v4i32(<4 x i32> %a0, <4 x i32>* %a1, i32 4, <4 x i1> <i1 true, i1 false, i1 false, i1 true>)
   ret void
 }
 
 ; Load-store: the store can be removed if the store's mask is a submask of the
 ; load's mask.
 
 ; Load-store, second mask is a submask of the first.
 ; Expect the store to be removed.
 define <4 x i32> @f8(<4 x i32>* %a0, <4 x i32> %a1) {
 ; CHECK-LABEL: @f8(
-; CHECK-NEXT:    [[V0:%.*]] = call <4 x i32> @llvm.masked.load.v4i32.p0v4i32(<4 x i32>* [[A0:%.*]], i32 4, <4 x i1> <i1 true, i1 true, i1 false, i1 true>, <4 x i32> [[A1:%.*]])
+; CHECK-NEXT:    [[V0:%.*]] = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr [[A0:%.*]], i32 4, <4 x i1> <i1 true, i1 true, i1 false, i1 true>, <4 x i32> [[A1:%.*]])
 ; CHECK-NEXT:    ret <4 x i32> [[V0]]
 ;
   %v0 = call <4 x i32> @llvm.masked.load.v4i32.p0v4i32(<4 x i32>* %a0, i32 4, <4 x i1> <i1 true, i1 true, i1 false, i1 true>, <4 x i32> %a1)
   call void @llvm.masked.store.v4i32.p0v4i32(<4 x i32> %v0, <4 x i32>* %a0, i32 4, <4 x i1> <i1 true, i1 false, i1 false, i1 true>)
   ret <4 x i32> %v0
 }
 
 ; Load-store, second mask is not a submask of the first.
 ; Expect the store to remain.
 define <4 x i32> @f9(<4 x i32>* %a0, <4 x i32> %a1) {
 ; CHECK-LABEL: @f9(
-; CHECK-NEXT:    [[V0:%.*]] = call <4 x i32> @llvm.masked.load.v4i32.p0v4i32(<4 x i32>* [[A0:%.*]], i32 4, <4 x i1> <i1 true, i1 false, i1 false, i1 true>, <4 x i32> [[A1:%.*]])
-; CHECK-NEXT:    call void @llvm.masked.store.v4i32.p0v4i32(<4 x i32> [[V0]], <4 x i32>* [[A0]], i32 4, <4 x i1> <i1 true, i1 true, i1 false, i1 true>)
+; CHECK-NEXT:    [[V0:%.*]] = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr [[A0:%.*]], i32 4, <4 x i1> <i1 true, i1 false, i1 false, i1 true>, <4 x i32> [[A1:%.*]])
+; CHECK-NEXT:    call void @llvm.masked.store.v4i32.p0(<4 x i32> [[V0]], ptr [[A0]], i32 4, <4 x i1> <i1 true, i1 true, i1 false, i1 true>)
 ; CHECK-NEXT:    ret <4 x i32> [[V0]]
 ;
   %v0 = call <4 x i32> @llvm.masked.load.v4i32.p0v4i32(<4 x i32>* %a0, i32 4, <4 x i1> <i1 true, i1 false, i1 false, i1 true>, <4 x i32> %a1)
   call void @llvm.masked.store.v4i32.p0v4i32(<4 x i32> %v0, <4 x i32>* %a0, i32 4, <4 x i1> <i1 true, i1 true, i1 false, i1 true>)
   ret <4 x i32> %v0
 }
 
 ; Store-load: the load can be removed if load's mask is a submask of the
 ; store's mask, and the load's through value is undef.
 
 ; Store-load, load's mask is a submask of store's mask, thru is undef.
 ; Expect the load to be removed.
 define <4 x i32> @fa(<4 x i32> %a0, <4 x i32>* %a1) {
 ; CHECK-LABEL: @fa(
-; CHECK-NEXT:    call void @llvm.masked.store.v4i32.p0v4i32(<4 x i32> [[A0:%.*]], <4 x i32>* [[A1:%.*]], i32 4, <4 x i1> <i1 true, i1 true, i1 false, i1 true>)
+; CHECK-NEXT:    call void @llvm.masked.store.v4i32.p0(<4 x i32> [[A0:%.*]], ptr [[A1:%.*]], i32 4, <4 x i1> <i1 true, i1 true, i1 false, i1 true>)
 ; CHECK-NEXT:    ret <4 x i32> [[A0]]
 ;
   call void @llvm.masked.store.v4i32.p0v4i32(<4 x i32> %a0, <4 x i32>* %a1, i32 4, <4 x i1> <i1 true, i1 true, i1 false, i1 true>)
   %v0 = call <4 x i32> @llvm.masked.load.v4i32.p0v4i32(<4 x i32>* %a1, i32 4, <4 x i1> <i1 true, i1 false, i1 false, i1 true>, <4 x i32> undef)
   ret <4 x i32> %v0
 }
 
 ; Store-load, load's mask is a submask of store's mask, thru is not undef.
 ; Expect the load to remain.
 define <4 x i32> @fb(<4 x i32> %a0, <4 x i32>* %a1) {
 ; CHECK-LABEL: @fb(
-; CHECK-NEXT:    call void @llvm.masked.store.v4i32.p0v4i32(<4 x i32> [[A0:%.*]], <4 x i32>* [[A1:%.*]], i32 4, <4 x i1> <i1 true, i1 true, i1 false, i1 true>)
-; CHECK-NEXT:    [[V0:%.*]] = call <4 x i32> @llvm.masked.load.v4i32.p0v4i32(<4 x i32>* [[A1]], i32 4, <4 x i1> <i1 true, i1 false, i1 false, i1 true>, <4 x i32> zeroinitializer)
+; CHECK-NEXT:    call void @llvm.masked.store.v4i32.p0(<4 x i32> [[A0:%.*]], ptr [[A1:%.*]], i32 4, <4 x i1> <i1 true, i1 true, i1 false, i1 true>)
+; CHECK-NEXT:    [[V0:%.*]] = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr [[A1]], i32 4, <4 x i1> <i1 true, i1 false, i1 false, i1 true>, <4 x i32> zeroinitializer)
 ; CHECK-NEXT:    ret <4 x i32> [[V0]]
 ;
   call void @llvm.masked.store.v4i32.p0v4i32(<4 x i32> %a0, <4 x i32>* %a1, i32 4, <4 x i1> <i1 true, i1 true, i1 false, i1 true>)
   %v0 = call <4 x i32> @llvm.masked.load.v4i32.p0v4i32(<4 x i32>* %a1, i32 4, <4 x i1> <i1 true, i1 false, i1 false, i1 true>, <4 x i32> zeroinitializer)
   ret <4 x i32> %v0
 }
 
 ; Store-load, load's mask is not a submask of store's mask, thru is undef.
 ; Expect the load to remain.
 define <4 x i32> @fc(<4 x i32> %a0, <4 x i32>* %a1) {
 ; CHECK-LABEL: @fc(
-; CHECK-NEXT:    call void @llvm.masked.store.v4i32.p0v4i32(<4 x i32> [[A0:%.*]], <4 x i32>* [[A1:%.*]], i32 4, <4 x i1> <i1 true, i1 false, i1 false, i1 true>)
-; CHECK-NEXT:    [[V0:%.*]] = call <4 x i32> @llvm.masked.load.v4i32.p0v4i32(<4 x i32>* [[A1]], i32 4, <4 x i1> <i1 true, i1 true, i1 false, i1 true>, <4 x i32> undef)
+; CHECK-NEXT:    call void @llvm.masked.store.v4i32.p0(<4 x i32> [[A0:%.*]], ptr [[A1:%.*]], i32 4, <4 x i1> <i1 true, i1 false, i1 false, i1 true>)
+; CHECK-NEXT:    [[V0:%.*]] = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr [[A1]], i32 4, <4 x i1> <i1 true, i1 true, i1 false, i1 true>, <4 x i32> undef)
 ; CHECK-NEXT:    ret <4 x i32> [[V0]]
 ;
   call void @llvm.masked.store.v4i32.p0v4i32(<4 x i32> %a0, <4 x i32>* %a1, i32 4, <4 x i1> <i1 true, i1 false, i1 false, i1 true>)
   %v0 = call <4 x i32> @llvm.masked.load.v4i32.p0v4i32(<4 x i32>* %a1, i32 4, <4 x i1> <i1 true, i1 true, i1 false, i1 true>, <4 x i32> undef)
   ret <4 x i32> %v0
 }
 
 declare <4 x i32> @llvm.masked.load.v4i32.p0v4i32(<4 x i32>*, i32, <4 x i1>, <4 x i32>)
 declare void @llvm.masked.store.v4i32.p0v4i32(<4 x i32>, <4 x i32>*, i32, <4 x i1>)

llvm/test/Transforms/EarlyCSE/masked-intrinsics.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -S -early-cse < %s | FileCheck %s
+; RUN: opt -S -early-cse -normalize-opaque-pointers < %s | FileCheck %s
 
 define <128 x i8> @f0(<128 x i8>* %a0, <128 x i8> %a1, <128 x i8> %a2) {
 ; CHECK-LABEL: @f0(
 ; CHECK-NEXT:    [[V0:%.*]] = icmp eq <128 x i8> [[A1:%.*]], [[A2:%.*]]
-; CHECK-NEXT:    call void @llvm.masked.store.v128i8.p0v128i8(<128 x i8> [[A1]], <128 x i8>* [[A0:%.*]], i32 4, <128 x i1> [[V0]])
+; CHECK-NEXT:    call void @llvm.masked.store.v128i8.p0(<128 x i8> [[A1]], ptr [[A0:%.*]], i32 4, <128 x i1> [[V0]])
 ; CHECK-NEXT:    ret <128 x i8> [[A1]]
 ;
   %v0 = icmp eq <128 x i8> %a1, %a2
   call void @llvm.masked.store.v128i8.p0v128i8(<128 x i8> %a1, <128 x i8>* %a0, i32 4, <128 x i1> %v0)
   %v1 = call <128 x i8> @llvm.masked.load.v128i8.p0v128i8(<128 x i8>* %a0, i32 4, <128 x i1> %v0, <128 x i8> undef)
   ret <128 x i8> %v1
 }
 
 define <128 x i8> @f1(<128 x i8>* %a0, <128 x i8> %a1, <128 x i8> %a2) {
 ; CHECK-LABEL: @f1(
 ; CHECK-NEXT:    [[V0:%.*]] = icmp eq <128 x i8> [[A1:%.*]], [[A2:%.*]]
-; CHECK-NEXT:    [[V1:%.*]] = call <128 x i8> @llvm.masked.load.v128i8.p0v128i8(<128 x i8>* [[A0:%.*]], i32 4, <128 x i1> [[V0]], <128 x i8> undef)
+; CHECK-NEXT:    [[V1:%.*]] = call <128 x i8> @llvm.masked.load.v128i8.p0(ptr [[A0:%.*]], i32 4, <128 x i1> [[V0]], <128 x i8> undef)
 ; CHECK-NEXT:    ret <128 x i8> [[V1]]
 ;
   %v0 = icmp eq <128 x i8> %a1, %a2
   %v1 = call <128 x i8> @llvm.masked.load.v128i8.p0v128i8(<128 x i8>* %a0, i32 4, <128 x i1> %v0, <128 x i8> undef)
   call void @llvm.masked.store.v128i8.p0v128i8(<128 x i8> %v1, <128 x i8>* %a0, i32 4, <128 x i1> %v0)
   ret <128 x i8> %v1
 }
 
 define <128 x i8> @f2(<128 x i8>* %a0, <128 x i8> %a1, <128 x i8> %a2) {
 ; CHECK-LABEL: @f2(
 ; CHECK-NEXT:    [[V0:%.*]] = icmp eq <128 x i8> [[A1:%.*]], [[A2:%.*]]
-; CHECK-NEXT:    [[V1:%.*]] = call <128 x i8> @llvm.masked.load.v128i8.p0v128i8(<128 x i8>* [[A0:%.*]], i32 4, <128 x i1> [[V0]], <128 x i8> undef)
+; CHECK-NEXT:    [[V1:%.*]] = call <128 x i8> @llvm.masked.load.v128i8.p0(ptr [[A0:%.*]], i32 4, <128 x i1> [[V0]], <128 x i8> undef)
 ; CHECK-NEXT:    [[V3:%.*]] = add <128 x i8> [[V1]], [[V1]]
 ; CHECK-NEXT:    ret <128 x i8> [[V3]]
 ;
   %v0 = icmp eq <128 x i8> %a1, %a2
   %v1 = call <128 x i8> @llvm.masked.load.v128i8.p0v128i8(<128 x i8>* %a0, i32 4, <128 x i1> %v0, <128 x i8> undef)
   %v2 = call <128 x i8> @llvm.masked.load.v128i8.p0v128i8(<128 x i8>* %a0, i32 4, <128 x i1> %v0, <128 x i8> undef)
   %v3 = add <128 x i8> %v1, %v2
   ret <128 x i8> %v3
 }
 
 declare <128 x i8> @llvm.masked.load.v128i8.p0v128i8(<128 x i8>*, i32, <128 x i1>, <128 x i8>)
 declare void @llvm.masked.store.v128i8.p0v128i8(<128 x i8>, <128 x i8>*, i32, <128 x i1>)

llvm/test/Transforms/EarlyCSE/memoryssa.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt < %s -S -early-cse -earlycse-debug-hash | FileCheck %s --check-prefix=CHECK-NOMEMSSA
-; RUN: opt < %s -S -basic-aa -early-cse-memssa | FileCheck %s
-; RUN: opt < %s -S -passes='early-cse' | FileCheck %s --check-prefix=CHECK-NOMEMSSA
-; RUN: opt < %s -S -aa-pipeline=basic-aa -passes='early-cse<memssa>' | FileCheck %s
+; RUN: opt < %s -S -early-cse -earlycse-debug-hash -normalize-opaque-pointers | FileCheck %s --check-prefix=CHECK-NOMEMSSA
+; RUN: opt < %s -S -basic-aa -early-cse-memssa -normalize-opaque-pointers | FileCheck %s
+; RUN: opt < %s -S -passes='early-cse' -normalize-opaque-pointers | FileCheck %s --check-prefix=CHECK-NOMEMSSA
+; RUN: opt < %s -S -aa-pipeline=basic-aa -passes='early-cse<memssa>' -normalize-opaque-pointers | FileCheck %s
 
 @G1 = global i32 zeroinitializer
 @G2 = global i32 zeroinitializer
 @G3 = global i32 zeroinitializer
 
 ;; Simple load value numbering across non-clobbering store.
 define i32 @test1() {
 ; CHECK-NOMEMSSA-LABEL: @test1(
-; CHECK-NOMEMSSA-NEXT:    [[V1:%.*]] = load i32, i32* @G1, align 4
-; CHECK-NOMEMSSA-NEXT:    store i32 0, i32* @G2, align 4
-; CHECK-NOMEMSSA-NEXT:    [[V2:%.*]] = load i32, i32* @G1, align 4
+; CHECK-NOMEMSSA-NEXT:    [[V1:%.*]] = load i32, ptr @G1, align 4
+; CHECK-NOMEMSSA-NEXT:    store i32 0, ptr @G2, align 4
+; CHECK-NOMEMSSA-NEXT:    [[V2:%.*]] = load i32, ptr @G1, align 4
 ; CHECK-NOMEMSSA-NEXT:    [[DIFF:%.*]] = sub i32 [[V1]], [[V2]]
 ; CHECK-NOMEMSSA-NEXT:    ret i32 [[DIFF]]
 ;
 ; CHECK-LABEL: @test1(
-; CHECK-NEXT:    [[V1:%.*]] = load i32, i32* @G1, align 4
-; CHECK-NEXT:    store i32 0, i32* @G2, align 4
+; CHECK-NEXT:    [[V1:%.*]] = load i32, ptr @G1, align 4
+; CHECK-NEXT:    store i32 0, ptr @G2, align 4
 ; CHECK-NEXT:    ret i32 0
 ;
   %V1 = load i32, i32* @G1
   store i32 0, i32* @G2
   %V2 = load i32, i32* @G1
   %Diff = sub i32 %V1, %V2
   ret i32 %Diff
 }
 
 ;; Simple dead store elimination across non-clobbering store.
 define void @test2() {
 ; CHECK-NOMEMSSA-LABEL: @test2(
 ; CHECK-NOMEMSSA-NEXT:  entry:
-; CHECK-NOMEMSSA-NEXT:    [[V1:%.*]] = load i32, i32* @G1, align 4
-; CHECK-NOMEMSSA-NEXT:    store i32 0, i32* @G2, align 4
-; CHECK-NOMEMSSA-NEXT:    store i32 [[V1]], i32* @G1, align 4
+; CHECK-NOMEMSSA-NEXT:    [[V1:%.*]] = load i32, ptr @G1, align 4
+; CHECK-NOMEMSSA-NEXT:    store i32 0, ptr @G2, align 4
+; CHECK-NOMEMSSA-NEXT:    store i32 [[V1]], ptr @G1, align 4
 ; CHECK-NOMEMSSA-NEXT:    ret void
 ;
 ; CHECK-LABEL: @test2(
 ; CHECK-NEXT:  entry:
-; CHECK-NEXT:    [[V1:%.*]] = load i32, i32* @G1, align 4
-; CHECK-NEXT:    store i32 0, i32* @G2, align 4
+; CHECK-NEXT:    [[V1:%.*]] = load i32, ptr @G1, align 4
+; CHECK-NEXT:    store i32 0, ptr @G2, align 4
 ; CHECK-NEXT:    ret void
 ;
 entry:
   %V1 = load i32, i32* @G1
   store i32 0, i32* @G2
   store i32 %V1, i32* @G1
   ret void
 }
 
 ;; Check that memoryphi optimization happens during EarlyCSE, enabling
 ;; more load CSE opportunities.
 define void @test_memphiopt(i1 %c, i32* %p) {
 ; CHECK-NOMEMSSA-LABEL: @test_memphiopt(
 ; CHECK-NOMEMSSA-NEXT:  entry:
-; CHECK-NOMEMSSA-NEXT:    [[V1:%.*]] = load i32, i32* @G1, align 4
+; CHECK-NOMEMSSA-NEXT:    [[V1:%.*]] = load i32, ptr @G1, align 4
 ; CHECK-NOMEMSSA-NEXT:    br i1 [[C:%.*]], label [[THEN:%.*]], label [[END:%.*]]
 ; CHECK-NOMEMSSA:       then:
-; CHECK-NOMEMSSA-NEXT:    [[PV:%.*]] = load i32, i32* [[P:%.*]], align 4
+; CHECK-NOMEMSSA-NEXT:    [[PV:%.*]] = load i32, ptr [[P:%.*]], align 4
 ; CHECK-NOMEMSSA-NEXT:    br label [[END]]
 ; CHECK-NOMEMSSA:       end:
-; CHECK-NOMEMSSA-NEXT:    [[V2:%.*]] = load i32, i32* @G1, align 4
+; CHECK-NOMEMSSA-NEXT:    [[V2:%.*]] = load i32, ptr @G1, align 4
 ; CHECK-NOMEMSSA-NEXT:    [[SUM:%.*]] = add i32 [[V1]], [[V2]]
-; CHECK-NOMEMSSA-NEXT:    store i32 [[SUM]], i32* @G2, align 4
+; CHECK-NOMEMSSA-NEXT:    store i32 [[SUM]], ptr @G2, align 4
 ; CHECK-NOMEMSSA-NEXT:    ret void
 ;
 ; CHECK-LABEL: @test_memphiopt(
 ; CHECK-NEXT:  entry:
-; CHECK-NEXT:    [[V1:%.*]] = load i32, i32* @G1, align 4
+; CHECK-NEXT:    [[V1:%.*]] = load i32, ptr @G1, align 4
 ; CHECK-NEXT:    br i1 [[C:%.*]], label [[THEN:%.*]], label [[END:%.*]]
 ; CHECK:       then:
-; CHECK-NEXT:    [[PV:%.*]] = load i32, i32* [[P:%.*]], align 4
+; CHECK-NEXT:    [[PV:%.*]] = load i32, ptr [[P:%.*]], align 4
 ; CHECK-NEXT:    br label [[END]]
 ; CHECK:       end:
 ; CHECK-NEXT:    [[SUM:%.*]] = add i32 [[V1]], [[V1]]
-; CHECK-NEXT:    store i32 [[SUM]], i32* @G2, align 4
+; CHECK-NEXT:    store i32 [[SUM]], ptr @G2, align 4
 ; CHECK-NEXT:    ret void
 ;
 entry:
   %v1 = load i32, i32* @G1
   br i1 %c, label %then, label %end
 
 then:
   %pv = load i32, i32* %p
   store i32 %pv, i32* %p
   br label %end
 
 end:
   %v2 = load i32, i32* @G1
   %sum = add i32 %v1, %v2
   store i32 %sum, i32* @G2
   ret void
 }
 
 
 ;; Check that MemoryPhi optimization and MemoryUse re-optimization
 ;; happens during EarlyCSE, enabling more load CSE opportunities.
 define void @test_memphiopt2(i1 %c, i32* %p) {
 ; CHECK-NOMEMSSA-LABEL: @test_memphiopt2(
 ; CHECK-NOMEMSSA-NEXT:  entry:
-; CHECK-NOMEMSSA-NEXT:    [[V1:%.*]] = load i32, i32* @G1, align 4
-; CHECK-NOMEMSSA-NEXT:    store i32 [[V1]], i32* @G2, align 4
+; CHECK-NOMEMSSA-NEXT:    [[V1:%.*]] = load i32, ptr @G1, align 4
+; CHECK-NOMEMSSA-NEXT:    store i32 [[V1]], ptr @G2, align 4
 ; CHECK-NOMEMSSA-NEXT:    br i1 [[C:%.*]], label [[THEN:%.*]], label [[END:%.*]]
 ; CHECK-NOMEMSSA:       then:
-; CHECK-NOMEMSSA-NEXT:    [[PV:%.*]] = load i32, i32* [[P:%.*]], align 4
+; CHECK-NOMEMSSA-NEXT:    [[PV:%.*]] = load i32, ptr [[P:%.*]], align 4
 ; CHECK-NOMEMSSA-NEXT:    br label [[END]]
 ; CHECK-NOMEMSSA:       end:
-; CHECK-NOMEMSSA-NEXT:    [[V2:%.*]] = load i32, i32* @G1, align 4
-; CHECK-NOMEMSSA-NEXT:    store i32 [[V2]], i32* @G3, align 4
+; CHECK-NOMEMSSA-NEXT:    [[V2:%.*]] = load i32, ptr @G1, align 4
+; CHECK-NOMEMSSA-NEXT:    store i32 [[V2]], ptr @G3, align 4
 ; CHECK-NOMEMSSA-NEXT:    ret void
 ;
 ; CHECK-LABEL: @test_memphiopt2(
 ; CHECK-NEXT:  entry:
-; CHECK-NEXT:    [[V1:%.*]] = load i32, i32* @G1, align 4
-; CHECK-NEXT:    store i32 [[V1]], i32* @G2, align 4
+; CHECK-NEXT:    [[V1:%.*]] = load i32, ptr @G1, align 4
+; CHECK-NEXT:    store i32 [[V1]], ptr @G2, align 4
 ; CHECK-NEXT:    br i1 [[C:%.*]], label [[THEN:%.*]], label [[END:%.*]]
 ; CHECK:       then:
-; CHECK-NEXT:    [[PV:%.*]] = load i32, i32* [[P:%.*]], align 4
+; CHECK-NEXT:    [[PV:%.*]] = load i32, ptr [[P:%.*]], align 4
 ; CHECK-NEXT:    br label [[END]]
 ; CHECK:       end:
-; CHECK-NEXT:    store i32 [[V1]], i32* @G3, align 4
+; CHECK-NEXT:    store i32 [[V1]], ptr @G3, align 4
 ; CHECK-NEXT:    ret void
 ;
 entry:
   %v1 = load i32, i32* @G1
   store i32 %v1, i32* @G2
   br i1 %c, label %then, label %end
 
 then:
   %pv = load i32, i32* %p
   store i32 %pv, i32* %p
   br label %end
 
 end:
   %v2 = load i32, i32* @G1
   store i32 %v2, i32* @G3
   ret void
 }
 
 ;; Check that we respect lifetime.start/lifetime.end intrinsics when deleting
 ;; stores that, without the lifetime calls, would be writebacks.
 define void @test_writeback_lifetimes(i32* %p) {
 ; CHECK-NOMEMSSA-LABEL: @test_writeback_lifetimes(
 ; CHECK-NOMEMSSA-NEXT:  entry:
-; CHECK-NOMEMSSA-NEXT:    [[Q:%.*]] = getelementptr i32, i32* [[P:%.*]], i64 1
-; CHECK-NOMEMSSA-NEXT:    [[PV:%.*]] = load i32, i32* [[P]], align 4
-; CHECK-NOMEMSSA-NEXT:    [[QV:%.*]] = load i32, i32* [[Q]], align 4
-; CHECK-NOMEMSSA-NEXT:    call void @llvm.lifetime.end.p0i32(i64 8, i32* [[P]])
-; CHECK-NOMEMSSA-NEXT:    call void @llvm.lifetime.start.p0i32(i64 8, i32* [[P]])
-; CHECK-NOMEMSSA-NEXT:    store i32 [[PV]], i32* [[P]], align 4
-; CHECK-NOMEMSSA-NEXT:    store i32 [[QV]], i32* [[Q]], align 4
+; CHECK-NOMEMSSA-NEXT:    [[Q:%.*]] = getelementptr i32, ptr [[P:%.*]], i64 1
+; CHECK-NOMEMSSA-NEXT:    [[PV:%.*]] = load i32, ptr [[P]], align 4
+; CHECK-NOMEMSSA-NEXT:    [[QV:%.*]] = load i32, ptr [[Q]], align 4
+; CHECK-NOMEMSSA-NEXT:    call void @llvm.lifetime.end.p0(i64 8, ptr [[P]])
+; CHECK-NOMEMSSA-NEXT:    call void @llvm.lifetime.start.p0(i64 8, ptr [[P]])
+; CHECK-NOMEMSSA-NEXT:    store i32 [[PV]], ptr [[P]], align 4
+; CHECK-NOMEMSSA-NEXT:    store i32 [[QV]], ptr [[Q]], align 4
 ; CHECK-NOMEMSSA-NEXT:    ret void
 ;
 ; CHECK-LABEL: @test_writeback_lifetimes(
 ; CHECK-NEXT:  entry:
-; CHECK-NEXT:    [[Q:%.*]] = getelementptr i32, i32* [[P:%.*]], i64 1
-; CHECK-NEXT:    [[PV:%.*]] = load i32, i32* [[P]], align 4
-; CHECK-NEXT:    [[QV:%.*]] = load i32, i32* [[Q]], align 4
-; CHECK-NEXT:    call void @llvm.lifetime.end.p0i32(i64 8, i32* [[P]])
-; CHECK-NEXT:    call void @llvm.lifetime.start.p0i32(i64 8, i32* [[P]])
-; CHECK-NEXT:    store i32 [[PV]], i32* [[P]], align 4
-; CHECK-NEXT:    store i32 [[QV]], i32* [[Q]], align 4
+; CHECK-NEXT:    [[Q:%.*]] = getelementptr i32, ptr [[P:%.*]], i64 1
+; CHECK-NEXT:    [[PV:%.*]] = load i32, ptr [[P]], align 4
+; CHECK-NEXT:    [[QV:%.*]] = load i32, ptr [[Q]], align 4
+; CHECK-NEXT:    call void @llvm.lifetime.end.p0(i64 8, ptr [[P]])
+; CHECK-NEXT:    call void @llvm.lifetime.start.p0(i64 8, ptr [[P]])
+; CHECK-NEXT:    store i32 [[PV]], ptr [[P]], align 4
+; CHECK-NEXT:    store i32 [[QV]], ptr [[Q]], align 4
 ; CHECK-NEXT:    ret void
 ;
 entry:
   %q = getelementptr i32, i32* %p, i64 1
   %pv = load i32, i32* %p
   %qv = load i32, i32* %q
   call void @llvm.lifetime.end.p0i8(i64 8, i32* %p)
   call void @llvm.lifetime.start.p0i8(i64 8, i32* %p)
   store i32 %pv, i32* %p
   store i32 %qv, i32* %q
   ret void
 }
 
 ;; Check that we respect lifetime.start/lifetime.end intrinsics when deleting
 ;; stores that, without the lifetime calls, would be writebacks.
 define void @test_writeback_lifetimes_multi_arg(i32* %p, i32* %q) {
 ; CHECK-NOMEMSSA-LABEL: @test_writeback_lifetimes_multi_arg(
 ; CHECK-NOMEMSSA-NEXT:  entry:
-; CHECK-NOMEMSSA-NEXT:    [[PV:%.*]] = load i32, i32* [[P:%.*]], align 4
-; CHECK-NOMEMSSA-NEXT:    [[QV:%.*]] = load i32, i32* [[Q:%.*]], align 4
-; CHECK-NOMEMSSA-NEXT:    call void @llvm.lifetime.end.p0i32(i64 8, i32* [[P]])
-; CHECK-NOMEMSSA-NEXT:    call void @llvm.lifetime.start.p0i32(i64 8, i32* [[P]])
-; CHECK-NOMEMSSA-NEXT:    store i32 [[PV]], i32* [[P]], align 4
-; CHECK-NOMEMSSA-NEXT:    store i32 [[QV]], i32* [[Q]], align 4
+; CHECK-NOMEMSSA-NEXT:    [[PV:%.*]] = load i32, ptr [[P:%.*]], align 4
+; CHECK-NOMEMSSA-NEXT:    [[QV:%.*]] = load i32, ptr [[Q:%.*]], align 4
+; CHECK-NOMEMSSA-NEXT:    call void @llvm.lifetime.end.p0(i64 8, ptr [[P]])
+; CHECK-NOMEMSSA-NEXT:    call void @llvm.lifetime.start.p0(i64 8, ptr [[P]])
+; CHECK-NOMEMSSA-NEXT:    store i32 [[PV]], ptr [[P]], align 4
+; CHECK-NOMEMSSA-NEXT:    store i32 [[QV]], ptr [[Q]], align 4
 ; CHECK-NOMEMSSA-NEXT:    ret void
 ;
 ; CHECK-LABEL: @test_writeback_lifetimes_multi_arg(
 ; CHECK-NEXT:  entry:
-; CHECK-NEXT:    [[PV:%.*]] = load i32, i32* [[P:%.*]], align 4
-; CHECK-NEXT:    [[QV:%.*]] = load i32, i32* [[Q:%.*]], align 4
-; CHECK-NEXT:    call void @llvm.lifetime.end.p0i32(i64 8, i32* [[P]])
-; CHECK-NEXT:    call void @llvm.lifetime.start.p0i32(i64 8, i32* [[P]])
-; CHECK-NEXT:    store i32 [[PV]], i32* [[P]], align 4
-; CHECK-NEXT:    store i32 [[QV]], i32* [[Q]], align 4
+; CHECK-NEXT:    [[PV:%.*]] = load i32, ptr [[P:%.*]], align 4
+; CHECK-NEXT:    [[QV:%.*]] = load i32, ptr [[Q:%.*]], align 4
+; CHECK-NEXT:    call void @llvm.lifetime.end.p0(i64 8, ptr [[P]])
+; CHECK-NEXT:    call void @llvm.lifetime.start.p0(i64 8, ptr [[P]])
+; CHECK-NEXT:    store i32 [[PV]], ptr [[P]], align 4
+; CHECK-NEXT:    store i32 [[QV]], ptr [[Q]], align 4
 ; CHECK-NEXT:    ret void
 ;
 entry:
   %pv = load i32, i32* %p
   %qv = load i32, i32* %q
   call void @llvm.lifetime.end.p0i8(i64 8, i32* %p)
   call void @llvm.lifetime.start.p0i8(i64 8, i32* %p)
   store i32 %pv, i32* %p
   store i32 %qv, i32* %q
   ret void
 }
 
 declare void @llvm.lifetime.end.p0i8(i64, i32*)
 declare void @llvm.lifetime.start.p0i8(i64, i32*)

llvm/test/Transforms/EarlyCSE/noalias-scope-decl.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -S < %s -early-cse -earlycse-debug-hash | FileCheck %s
+; RUN: opt -S < %s -early-cse -earlycse-debug-hash -normalize-opaque-pointers | FileCheck %s
 
 ; Store-to-load forwarding across a @llvm.experimental.noalias.scope.decl.
 
 define float @s2l(float* %p) {
 ; CHECK-LABEL: @s2l(
-; CHECK-NEXT:    store float 0.000000e+00, float* [[P:%.*]], align 4
-; CHECK-NEXT:    call void @llvm.experimental.noalias.scope.decl(metadata !0)
+; CHECK-NEXT:    store float 0.000000e+00, ptr [[P:%.*]], align 4
+; CHECK-NEXT:    call void @llvm.experimental.noalias.scope.decl(metadata [[META0:![0-9]+]])
 ; CHECK-NEXT:    ret float 0.000000e+00
 ;
   store float 0.0, float* %p
   call void @llvm.experimental.noalias.scope.decl(metadata !0)
   %t = load float, float* %p
   ret float %t
 }
 
 ; Redundant load elimination across a @llvm.experimental.noalias.scope.decl.
 
 define float @rle(float* %p) {
 ; CHECK-LABEL: @rle(
-; CHECK-NEXT:    [[R:%.*]] = load float, float* [[P:%.*]], align 4
-; CHECK-NEXT:    call void @llvm.experimental.noalias.scope.decl(metadata !0)
+; CHECK-NEXT:    [[R:%.*]] = load float, ptr [[P:%.*]], align 4
+; CHECK-NEXT:    call void @llvm.experimental.noalias.scope.decl(metadata [[META0]])
 ; CHECK-NEXT:    [[T:%.*]] = fadd float [[R]], [[R]]
 ; CHECK-NEXT:    ret float [[T]]
 ;
   %r = load float, float* %p
   call void @llvm.experimental.noalias.scope.decl(metadata !0)
   %s = load float, float* %p
   %t = fadd float %r, %s
   ret float %t
 }
 
 declare void @llvm.experimental.noalias.scope.decl(metadata)
 
 !0 = !{ !1 }
 !1 = distinct !{ !1, !2 }
 !2 = distinct !{ !2 }

llvm/test/Transforms/EarlyCSE/phi.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -early-cse -earlycse-debug-hash -S < %s | FileCheck %s
-; RUN: opt -basic-aa -early-cse-memssa -S < %s | FileCheck %s
+; RUN: opt -early-cse -earlycse-debug-hash -normalize-opaque-pointers -S < %s | FileCheck %s
+; RUN: opt -basic-aa -early-cse-memssa -normalize-opaque-pointers -S < %s | FileCheck %s
 
 ; Most basic case, fully identical PHI nodes
 define void @test0(i32 %v0, i32 %v1, i1 %c, i32* %d0, i32* %d1) {
 ; CHECK-LABEL: @test0(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    br i1 [[C:%.*]], label [[B0:%.*]], label [[B1:%.*]]
 ; CHECK:       b0:
 ; CHECK-NEXT:    br label [[END:%.*]]
 ; CHECK:       b1:
 ; CHECK-NEXT:    br label [[END]]
 ; CHECK:       end:
 ; CHECK-NEXT:    [[I0:%.*]] = phi i32 [ [[V0:%.*]], [[B0]] ], [ [[V1:%.*]], [[B1]] ]
 ; CHECK-NEXT:    [[I1:%.*]] = phi i32 [ [[V0]], [[B0]] ], [ [[V1]], [[B1]] ]
-; CHECK-NEXT:    store i32 [[I0]], i32* [[D0:%.*]], align 4
-; CHECK-NEXT:    store i32 [[I1]], i32* [[D1:%.*]], align 4
+; CHECK-NEXT:    store i32 [[I0]], ptr [[D0:%.*]], align 4
+; CHECK-NEXT:    store i32 [[I1]], ptr [[D1:%.*]], align 4
 ; CHECK-NEXT:    ret void
 ;
 entry:
   br i1 %c, label %b0, label %b1
 
 b0:
   br label %end
 

 ; CHECK-NEXT:    br i1 [[C:%.*]], label [[B0:%.*]], label [[B1:%.*]]
 ; CHECK:       b0:
 ; CHECK-NEXT:    br label [[END:%.*]]
 ; CHECK:       b1:
 ; CHECK-NEXT:    br label [[END]]
 ; CHECK:       end:
 ; CHECK-NEXT:    [[I0:%.*]] = phi i32 [ [[V0:%.*]], [[B0]] ], [ [[V1:%.*]], [[B1]] ]
 ; CHECK-NEXT:    [[I1:%.*]] = phi i32 [ [[V1]], [[B1]] ], [ [[V0]], [[B0]] ]
-; CHECK-NEXT:    store i32 [[I0]], i32* [[D0:%.*]], align 4
-; CHECK-NEXT:    store i32 [[I1]], i32* [[D1:%.*]], align 4
+; CHECK-NEXT:    store i32 [[I0]], ptr [[D0:%.*]], align 4
+; CHECK-NEXT:    store i32 [[I1]], ptr [[D1:%.*]], align 4
 ; CHECK-NEXT:    ret void
 ;
 entry:
   br i1 %c, label %b0, label %b1
 
 b0:
   br label %end
 

 ; CHECK-NEXT:    br i1 [[C:%.*]], label [[B0:%.*]], label [[B1:%.*]]
 ; CHECK:       b0:
 ; CHECK-NEXT:    br label [[END:%.*]]
 ; CHECK:       b1:
 ; CHECK-NEXT:    br label [[END]]
 ; CHECK:       end:
 ; CHECK-NEXT:    [[I0:%.*]] = phi i32 [ [[V0:%.*]], [[B0]] ], [ [[V1:%.*]], [[B1]] ]
 ; CHECK-NEXT:    [[I1:%.*]] = phi i32 [ [[V0]], [[B0]] ], [ [[V2:%.*]], [[B1]] ]
-; CHECK-NEXT:    store i32 [[I0]], i32* [[D0:%.*]], align 4
-; CHECK-NEXT:    store i32 [[I1]], i32* [[D1:%.*]], align 4
+; CHECK-NEXT:    store i32 [[I0]], ptr [[D0:%.*]], align 4
+; CHECK-NEXT:    store i32 [[I1]], ptr [[D1:%.*]], align 4
 ; CHECK-NEXT:    ret void
 ;
 entry:
   br i1 %c, label %b0, label %b1
 
 b0:
   br label %end
 

 ; CHECK-NEXT:    br i1 [[C:%.*]], label [[B0:%.*]], label [[B1:%.*]]
 ; CHECK:       b0:
 ; CHECK-NEXT:    br label [[END:%.*]]
 ; CHECK:       b1:
 ; CHECK-NEXT:    br label [[END]]
 ; CHECK:       end:
 ; CHECK-NEXT:    [[I0:%.*]] = phi i32 [ [[V0:%.*]], [[B0]] ], [ [[V1:%.*]], [[B1]] ]
 ; CHECK-NEXT:    [[I1:%.*]] = phi i32 [ [[V2:%.*]], [[B1]] ], [ [[V0]], [[B0]] ]
-; CHECK-NEXT:    store i32 [[I0]], i32* [[D0:%.*]], align 4
-; CHECK-NEXT:    store i32 [[I1]], i32* [[D1:%.*]], align 4
+; CHECK-NEXT:    store i32 [[I0]], ptr [[D0:%.*]], align 4
+; CHECK-NEXT:    store i32 [[I1]], ptr [[D1:%.*]], align 4
 ; CHECK-NEXT:    ret void
 ;
 entry:
   br i1 %c, label %b0, label %b1
 
 b0:
   br label %end
 

 ; CHECK-NEXT:    br i1 [[C:%.*]], label [[B0:%.*]], label [[B1:%.*]]
 ; CHECK:       b0:
 ; CHECK-NEXT:    br label [[END:%.*]]
 ; CHECK:       b1:
 ; CHECK-NEXT:    br label [[END]]
 ; CHECK:       end:
 ; CHECK-NEXT:    [[I0:%.*]] = phi i32 [ [[V0:%.*]], [[B0]] ], [ [[V1:%.*]], [[B1]] ]
 ; CHECK-NEXT:    [[I1:%.*]] = phi i32 [ [[V1]], [[B1]] ], [ [[V0]], [[B0]] ]
-; CHECK-NEXT:    store i32 [[I0]], i32* [[D0:%.*]], align 4
-; CHECK-NEXT:    store i32 [[I1]], i32* [[D1:%.*]], align 4
+; CHECK-NEXT:    store i32 [[I0]], ptr [[D0:%.*]], align 4
+; CHECK-NEXT:    store i32 [[I1]], ptr [[D1:%.*]], align 4
 ; CHECK-NEXT:    ret void
 ;
 entry:
   br i1 %c, label %b0, label %b1
 
 b0:
   br label %end
 

 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    br i1 [[C:%.*]], label [[B0:%.*]], label [[B1:%.*]]
 ; CHECK:       b0:
 ; CHECK-NEXT:    br label [[END:%.*]]
 ; CHECK:       b1:
 ; CHECK-NEXT:    br label [[END]]
 ; CHECK:       end:
 ; CHECK-NEXT:    [[I1:%.*]] = phi i32 [ [[V0:%.*]], [[B0]] ], [ [[V1:%.*]], [[B1]] ]
-; CHECK-NEXT:    store i32 [[I1]], i32* [[D1:%.*]], align 4
+; CHECK-NEXT:    store i32 [[I1]], ptr [[D1:%.*]], align 4
 ; CHECK-NEXT:    ret void
 ;
 entry:
   br i1 %c, label %b0, label %b1
 
 b0:
   br label %end
 

 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    br i1 [[C:%.*]], label [[B0:%.*]], label [[B1:%.*]]
 ; CHECK:       b0:
 ; CHECK-NEXT:    br label [[END:%.*]]
 ; CHECK:       b1:
 ; CHECK-NEXT:    br label [[END]]
 ; CHECK:       end:
 ; CHECK-NEXT:    [[I0:%.*]] = phi i32 [ [[V0:%.*]], [[B0]] ], [ [[V1:%.*]], [[B1]] ]
-; CHECK-NEXT:    store i32 [[I0]], i32* [[D0:%.*]], align 4
+; CHECK-NEXT:    store i32 [[I0]], ptr [[D0:%.*]], align 4
 ; CHECK-NEXT:    ret void
 ;
 entry:
   br i1 %c, label %b0, label %b1
 
 b0:
   br label %end
 

 ; CHECK:       b0:
 ; CHECK-NEXT:    br label [[END:%.*]]
 ; CHECK:       b1:
 ; CHECK-NEXT:    br label [[END]]
 ; CHECK:       end:
 ; CHECK-NEXT:    [[IBAD:%.*]] = phi i16 [ [[V2:%.*]], [[B0]] ], [ [[V3:%.*]], [[B1]] ]
 ; CHECK-NEXT:    [[I0:%.*]] = phi i32 [ [[V0:%.*]], [[B0]] ], [ [[V1:%.*]], [[B1]] ]
 ; CHECK-NEXT:    [[I1:%.*]] = phi i32 [ [[V0]], [[B0]] ], [ [[V1]], [[B1]] ]
-; CHECK-NEXT:    store i32 [[I0]], i32* [[D0:%.*]], align 4
-; CHECK-NEXT:    store i32 [[I1]], i32* [[D1:%.*]], align 4
-; CHECK-NEXT:    store i16 [[IBAD]], i16* [[D2:%.*]], align 2
+; CHECK-NEXT:    store i32 [[I0]], ptr [[D0:%.*]], align 4
+; CHECK-NEXT:    store i32 [[I1]], ptr [[D1:%.*]], align 4
+; CHECK-NEXT:    store i16 [[IBAD]], ptr [[D2:%.*]], align 2
 ; CHECK-NEXT:    ret void
 ;
 entry:
   br i1 %c, label %b0, label %b1
 
 b0:
   br label %end
 

 ; CHECK:       b0:
 ; CHECK-NEXT:    br label [[END:%.*]]
 ; CHECK:       b1:
 ; CHECK-NEXT:    br label [[END]]
 ; CHECK:       end:
 ; CHECK-NEXT:    [[I0:%.*]] = phi i32 [ [[V0:%.*]], [[B0]] ], [ [[V1:%.*]], [[B1]] ]
 ; CHECK-NEXT:    [[IBAD:%.*]] = phi i16 [ [[V2:%.*]], [[B0]] ], [ [[V3:%.*]], [[B1]] ]
 ; CHECK-NEXT:    [[I1:%.*]] = phi i32 [ [[V0]], [[B0]] ], [ [[V1]], [[B1]] ]
-; CHECK-NEXT:    store i32 [[I0]], i32* [[D0:%.*]], align 4
-; CHECK-NEXT:    store i32 [[I1]], i32* [[D1:%.*]], align 4
-; CHECK-NEXT:    store i16 [[IBAD]], i16* [[D2:%.*]], align 2
+; CHECK-NEXT:    store i32 [[I0]], ptr [[D0:%.*]], align 4
+; CHECK-NEXT:    store i32 [[I1]], ptr [[D1:%.*]], align 4
+; CHECK-NEXT:    store i16 [[IBAD]], ptr [[D2:%.*]], align 2
 ; CHECK-NEXT:    ret void
 ;
 entry:
   br i1 %c, label %b0, label %b1
 
 b0:
   br label %end
 

 ; CHECK:       b0:
 ; CHECK-NEXT:    br label [[END:%.*]]
 ; CHECK:       b1:
 ; CHECK-NEXT:    br label [[END]]
 ; CHECK:       end:
 ; CHECK-NEXT:    [[I0:%.*]] = phi i32 [ [[V0:%.*]], [[B0]] ], [ [[V1:%.*]], [[B1]] ]
 ; CHECK-NEXT:    [[I1:%.*]] = phi i32 [ [[V0]], [[B0]] ], [ [[V1]], [[B1]] ]
 ; CHECK-NEXT:    [[IBAD:%.*]] = phi i16 [ [[V2:%.*]], [[B0]] ], [ [[V3:%.*]], [[B1]] ]
-; CHECK-NEXT:    store i32 [[I0]], i32* [[D0:%.*]], align 4
-; CHECK-NEXT:    store i32 [[I1]], i32* [[D1:%.*]], align 4
-; CHECK-NEXT:    store i16 [[IBAD]], i16* [[D2:%.*]], align 2
+; CHECK-NEXT:    store i32 [[I0]], ptr [[D0:%.*]], align 4
+; CHECK-NEXT:    store i32 [[I1]], ptr [[D1:%.*]], align 4
+; CHECK-NEXT:    store i16 [[IBAD]], ptr [[D2:%.*]], align 2
 ; CHECK-NEXT:    ret void
 ;
 entry:
   br i1 %c, label %b0, label %b1
 
 b0:
   br label %end
 

llvm/test/Transforms/EarlyCSE/pr33406.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -early-cse-memssa -earlycse-debug-hash -S %s | FileCheck %s
+; RUN: opt -early-cse-memssa -earlycse-debug-hash -normalize-opaque-pointers -S %s | FileCheck %s
 
 @b = external global i32
 
 define void @patatino() {
 ; CHECK-LABEL: @patatino(
 ; CHECK-NEXT:  for.cond:
 ; CHECK-NEXT:    br i1 true, label [[IF_END:%.*]], label [[FOR_INC:%.*]]
 ; CHECK:       if.end:
-; CHECK-NEXT:    [[TINKYWINKY:%.*]] = load i32, i32* @b, align 4
+; CHECK-NEXT:    [[TINKYWINKY:%.*]] = load i32, ptr @b, align 4
 ; CHECK-NEXT:    br i1 true, label [[FOR_INC]], label [[FOR_INC]]
 ; CHECK:       for.inc:
 ; CHECK-NEXT:    ret void
 ;
 for.cond:
   br i1 true, label %if.end, label %for.inc
 
 if.end:
   %tinkywinky = load i32, i32* @b
   store i32 %tinkywinky, i32* @b
   br i1 true, label %for.inc, label %for.inc
 
 for.inc:
   ret void
 }

llvm/test/Transforms/EarlyCSE/readnone-mayunwind.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -S -early-cse -earlycse-debug-hash < %s | FileCheck %s
+; RUN: opt -S -early-cse -earlycse-debug-hash -normalize-opaque-pointers < %s | FileCheck %s
 
 declare void @readnone_may_unwind() readnone
 
 define void @f(i32* %ptr) {
 ; CHECK-LABEL: @f(
-; CHECK-NEXT:    store i32 100, i32* [[PTR:%.*]], align 4
+; CHECK-NEXT:    store i32 100, ptr [[PTR:%.*]], align 4
 ; CHECK-NEXT:    call void @readnone_may_unwind()
-; CHECK-NEXT:    store i32 200, i32* [[PTR]], align 4
+; CHECK-NEXT:    store i32 200, ptr [[PTR]], align 4
 ; CHECK-NEXT:    ret void
 ;
 
   store i32 100, i32* %ptr
   call void @readnone_may_unwind()
   store i32 200, i32* %ptr
   ret void
 }

llvm/test/Transforms/EarlyCSE/writeonly.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -S -early-cse -earlycse-debug-hash < %s | FileCheck %s
+; RUN: opt -S -early-cse -earlycse-debug-hash -normalize-opaque-pointers < %s | FileCheck %s
 
 @var = global i32 undef
 declare void @foo() nounwind
 
 define void @test() {
 ; CHECK-LABEL: @test(
 ; CHECK-NEXT:    call void @foo() #[[ATTR1:[0-9]+]]
-; CHECK-NEXT:    store i32 2, i32* @var, align 4
+; CHECK-NEXT:    store i32 2, ptr @var, align 4
 ; CHECK-NEXT:    ret void
 ;
   store i32 1, i32* @var
   call void @foo() writeonly
   store i32 2, i32* @var
   ret void
 }

llvm/tools/opt/NewPMDriver.cpp

 
 #include "NewPMDriver.h"
 #include "PassPrinters.h"
 #include "llvm/ADT/SmallVector.h"
 #include "llvm/ADT/StringRef.h"
 #include "llvm/Analysis/AliasAnalysis.h"
 #include "llvm/Analysis/CGSCCPassManager.h"
 #include "llvm/Analysis/TargetLibraryInfo.h"
+#include "llvm/Bitcode/BitcodeReader.h"
+#include "llvm/Bitcode/BitcodeWriter.h"
 #include "llvm/Bitcode/BitcodeWriterPass.h"
 #include "llvm/Config/llvm-config.h"
 #include "llvm/IR/Dominators.h"
 #include "llvm/IR/IRPrintingPasses.h"
 #include "llvm/IR/LLVMContext.h"
 #include "llvm/IR/Module.h"
 #include "llvm/IR/PassManager.h"
 #include "llvm/IR/Verifier.h"
ProfileRemappingFile("profile-remapping-file",
                          cl::desc("Path to the profile remapping file."),
                          cl::Hidden);
 static cl::opt<bool> DebugInfoForProfiling(
     "new-pm-debug-info-for-profiling", cl::init(false), cl::Hidden,
     cl::desc("Emit special debug info to enable PGO profile generation."));
 static cl::opt<bool> PseudoProbeForProfiling(
     "new-pm-pseudo-probe-for-profiling", cl::init(false), cl::Hidden,
     cl::desc("Emit pseudo probes to enable PGO profile generation."));
+static cl::opt<bool> NormalizeOpaquePointers(
+    "normalize-opaque-pointers", cl::Hidden,
+    cl::desc("Convert module to opaque pointers before printing"));
 /// @}}
 
+static std::unique_ptr<Module> cloneModuleIntoContext(
+    LLVMContext &NewCtx, const Module &M, bool ShouldPreserveUseListOrder) {
+  SmallVector<char, 0> Buffer;
+  raw_svector_ostream OS(Buffer);
+  WriteBitcodeToFile(M, OS, ShouldPreserveUseListOrder);
+  MemoryBufferRef MBuf(OS.str(), "temporary bitcode");
+  Expected<std::unique_ptr<Module>> Module = parseBitcodeFile(MBuf, NewCtx);
+  if (!Module)
+    handleAllErrors(Module.takeError());
+  return std::move(*Module);
+}
+
+static void normalizeModuleForOpaquePointers(Module &M) {
+  for (Function &F : M.functions()) {
+    for (BasicBlock &BB : F) {
+      for (Instruction &I : make_early_inc_range(BB)) {
+        // Drop no-op bitcasts from ptr to ptr, which will usually not be
+        // present with opaque pointers.
+        if (auto *BC = dyn_cast<BitCastInst>(&I)) {
+          if (BC->getType() == BC->getOperand(0)->getType() &&
+              BC->getType()->isPointerTy()) {
+            BC->replaceAllUsesWith(BC->getOperand(0));
+            BC->eraseFromParent();
+          }
+        }
+      }
+    }
+  }
+}
+
+class CustomPrintModulePass : public PassInfoMixin<PrintModulePass> {
+  raw_ostream &OS;
+  bool ShouldPreserveUseListOrder;
+
+public:
+  CustomPrintModulePass(raw_ostream &OS, bool ShouldPreserveUseListOrder)
+      : OS(OS), ShouldPreserveUseListOrder(ShouldPreserveUseListOrder) {}
+
+  PreservedAnalyses run(Module &M, AnalysisManager<Module> &) {
+    if (NormalizeOpaquePointers && M.getContext().supportsTypedPointers()) {
+      LLVMContext OpaqueCtx;
+      OpaqueCtx.enableOpaquePointers();
+      std::unique_ptr<Module> OpaqueM =
+          cloneModuleIntoContext(OpaqueCtx, M, ShouldPreserveUseListOrder);
+      normalizeModuleForOpaquePointers(*OpaqueM);
+      OpaqueM->print(OS, nullptr, ShouldPreserveUseListOrder);
+    } else {
+      M.print(OS, nullptr, ShouldPreserveUseListOrder);
+    }
+    return PreservedAnalyses::all();
+  }
+  static bool isRequired() { return true; }
+};
+
 template <typename PassManagerT>
 bool tryParsePipelineText(PassBuilder &PB,
                           const cl::opt<std::string> &PipelineOpt) {
   if (PipelineOpt.empty())
     return false;
 
   // Verify the pipeline is parseable:
   PassManagerT PM;
if (EnableDebugify)
     MPM.addPass(NewPMCheckDebugifyPass());
 
   // Add any relevant output pass at the end of the pipeline.
   switch (OK) {
   case OK_NoOutput:
     break; // No output pass needed.
   case OK_OutputAssembly:
     MPM.addPass(
-        PrintModulePass(Out->os(), "", ShouldPreserveAssemblyUseListOrder));
+        CustomPrintModulePass(Out->os(), ShouldPreserveAssemblyUseListOrder));
     break;
   case OK_OutputBitcode:
     MPM.addPass(BitcodeWriterPass(Out->os(), ShouldPreserveBitcodeUseListOrder,
                                   EmitSummaryIndex, EmitModuleHash));
     break;
   case OK_OutputThinLTOBitcode:
     MPM.addPass(ThinLTOBitcodeWriterPass(
         Out->os(), ThinLTOLinkOut ? &ThinLTOLinkOut->os() : nullptr));