AMDGPU: Combine is.shared/is.private of null/undef

[rampitec]

llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp

900

Why cannot we have a shared or private null pointer?

[arsenm]

llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp

900

The query is for whether the particular address points into the aperture. The null pointer doesn't point at anything, so therefore it doesn't point into the shared/private segment

[rampitec]

llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp

900

You can have a flat pointer pointing exactly into the address zero of LDS or private. Aren't these addresses also null?

[rampitec]

llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp

900

I believe this is not correct and clearly change in behavior:

define i1 @test(i32 addrspace(1)* %res) {
  %cast = addrspacecast i8 addrspace(5)* null to i8*
  %is_private = tail call i1 @llvm.amdgcn.is.private(i8* %cast)
  ret i1 %is_private
}

declare i1 @llvm.amdgcn.is.private(i8* nocapture)

Right now it is true:

s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
v_mov_b32_e32 v0, 1
s_setpc_b64 s[30:31]

[rampitec]

LGTM

llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp

900

Ah, OK. Checked definition of is_private and is_shared. They only take flat pointers, and flat null is not the same as private or shared null.

[arsenm]

45f16eabd67b1d3f8fab3ed24c74b9b9dac2239e

llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp

case Intrinsic::amdgcn_fma_legacy: {
     // normal fma instead.
     if (canSimplifyLegacyMulToMul(Op0, Op1, IC)) {
       II.setCalledOperand(Intrinsic::getDeclaration(
           II.getModule(), Intrinsic::fma, II.getType()));
       return ⅈ
     }
     break;
   }
+  case Intrinsic::amdgcn_is_shared:
+  case Intrinsic::amdgcn_is_private: {
+    if (isa<UndefValue>(II.getArgOperand(0)))
+      return IC.replaceInstUsesWith(II, UndefValue::get(II.getType()));
+
+    if (isa<ConstantPointerNull>(II.getArgOperand(0)))
+      return IC.replaceInstUsesWith(II, ConstantInt::getFalse(II.getType()));
+    break;
+  }
   default: {
     if (const AMDGPU::ImageDimIntrinsicInfo *ImageDimIntr =
             AMDGPU::getImageDimIntrinsicInfo(II.getIntrinsicID())) {
       return simplifyAMDGCNImageIntrinsic(ST, ImageDimIntr, II, IC);
     }
   }
   }
   return None;

llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll

 ;
   %s32 = fpext half %s to float
   %t32 = fpext half %t to float
   %slice32 = fpext half %slice to float
   %res = call nnan <4 x float> @llvm.amdgcn.image.sample.2darray.v4f32.f32(i32 15, float %s32, float %t32, float %slice32, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0)
   store <4 x float> %res, <4 x float> addrspace(1)* %out
   ret void
 }
+
+; --------------------------------------------------------------------
+; llvm.amdgcn.is.shared
+; --------------------------------------------------------------------
+
+declare i1 @llvm.amdgcn.is.shared(i8*) nounwind readnone
+
+define i1 @test_is_shared_null() nounwind {
+; CHECK-LABEL: @test_is_shared_null(
+; CHECK-NEXT:    ret i1 false
+;
+  %val = call i1 @llvm.amdgcn.is.shared(i8* null)
+  ret i1 %val
+}
+
+define i1 @test_is_shared_undef() nounwind {
+; CHECK-LABEL: @test_is_shared_undef(
+; CHECK-NEXT:    ret i1 undef
+;
+  %val = call i1 @llvm.amdgcn.is.shared(i8* undef)
+  ret i1 %val
+}
+
+; --------------------------------------------------------------------
+; llvm.amdgcn.is.private
+; --------------------------------------------------------------------
+
+declare i1 @llvm.amdgcn.is.private(i8*) nounwind readnone
+
+define i1 @test_is_private_null() nounwind {
+; CHECK-LABEL: @test_is_private_null(
+; CHECK-NEXT:    ret i1 false
+;
+  %val = call i1 @llvm.amdgcn.is.private(i8* null)
+  ret i1 %val
+}
+
+define i1 @test_is_private_undef() nounwind {
+; CHECK-LABEL: @test_is_private_undef(
+; CHECK-NEXT:    ret i1 undef
+;
+  %val = call i1 @llvm.amdgcn.is.private(i8* undef)
+  ret i1 %val
+}