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Differential D114551

[mlir][spirv] Float atomics should not imply Shader
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Authored by Hardcode84 on Nov 24 2021, 10:57 AM.

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antiagainst
Commits
rG467acf3b6ba2: [mlir][spirv] Float atomics should not imply Shader

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Hardcode84 created this revision.Nov 24 2021, 10:57 AM
Herald added a reviewer: antiagainst. · View Herald TranscriptNov 24 2021, 10:57 AM
Herald added subscribers: sdasgup3, wenzhicui, wrengr and 23 others. · View Herald Transcript
Hardcode84 requested review of this revision.Nov 24 2021, 10:57 AM
Herald added a project: Restricted Project. · View Herald TranscriptNov 24 2021, 10:57 AM
Herald added subscribers: stephenneuendorffer, nicolasvasilache. · View Herald Transcript
Hardcode84 updated this revision to Diff 389562.Nov 24 2021, 11:01 AM

change comment

antiagainst requested changes to this revision.Nov 24 2021, 12:03 PM

The change looks good to me. But could you open a pull request first against SPIRV-Headers repo and mention the pull request link in the comment so that we have clear tracking? Thanks!

This revision now requires changes to proceed.Nov 24 2021, 12:03 PM
Harbormaster completed remote builds in B135898: Diff 389562.Nov 24 2021, 12:19 PM
Hardcode84 updated this revision to Diff 389594.Nov 24 2021, 12:33 PM

add link to SPIRV-Headers PR

Harbormaster completed remote builds in B135925: Diff 389594.Nov 24 2021, 1:38 PM
antiagainst accepted this revision.Nov 24 2021, 2:21 PM

Awesome, thanks!

This revision is now accepted and ready to land.Nov 24 2021, 2:21 PM
Closed by commit rG467acf3b6ba2: [mlir][spirv] Float atomics should not imply Shader (authored by Hardcode84). · Explain WhyNov 25 2021, 1:08 AM
This revision was automatically updated to reflect the committed changes.
Hardcode84 added a commit: rG467acf3b6ba2: [mlir][spirv] Float atomics should not imply Shader.

Revision Contents

PathSize
mlir/
include/
mlir/
Dialect/
SPIRV/
IR/
9 lines

Diff 389554

mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td

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} }
def SPV_C_IntegerFunctions2INTEL : I32EnumAttrCase<"IntegerFunctions2INTEL", 5584> { def SPV_C_IntegerFunctions2INTEL : I32EnumAttrCase<"IntegerFunctions2INTEL", 5584> {
list<I32EnumAttrCase> implies = [SPV_C_Shader]; list<I32EnumAttrCase> implies = [SPV_C_Shader];
list<Availability> availability = [ list<Availability> availability = [
Extension<[SPV_INTEL_shader_integer_functions2]> Extension<[SPV_INTEL_shader_integer_functions2]>
]; ];
} }
def SPV_C_AtomicFloat32AddEXT : I32EnumAttrCase<"AtomicFloat32AddEXT", 6033> { def SPV_C_AtomicFloat32AddEXT : I32EnumAttrCase<"AtomicFloat32AddEXT", 6033> {
list<I32EnumAttrCase> implies = [SPV_C_Shader]; // Float atomics also supported in kernels (Specifically in Intel L0 gpu drivers).
// list<I32EnumAttrCase> implies = [SPV_C_Shader];
list<Availability> availability = [ list<Availability> availability = [
Extension<[SPV_EXT_shader_atomic_float_add]> Extension<[SPV_EXT_shader_atomic_float_add]>
]; ];
} }
def SPV_C_AtomicFloat64AddEXT : I32EnumAttrCase<"AtomicFloat64AddEXT", 6034> { def SPV_C_AtomicFloat64AddEXT : I32EnumAttrCase<"AtomicFloat64AddEXT", 6034> {
list<I32EnumAttrCase> implies = [SPV_C_Shader]; // Float atomics also supported in kernels (Specifically in Intel L0 gpu drivers).
// list<I32EnumAttrCase> implies = [SPV_C_Shader];
list<Availability> availability = [ list<Availability> availability = [
Extension<[SPV_EXT_shader_atomic_float_add]> Extension<[SPV_EXT_shader_atomic_float_add]>
]; ];
} }
def SPV_C_AtomicFloat16AddEXT : I32EnumAttrCase<"AtomicFloat16AddEXT", 6095> { def SPV_C_AtomicFloat16AddEXT : I32EnumAttrCase<"AtomicFloat16AddEXT", 6095> {
list<I32EnumAttrCase> implies = [SPV_C_Shader]; // Float atomics also supported in kernels (Specifically in Intel L0 gpu drivers).
// list<I32EnumAttrCase> implies = [SPV_C_Shader];
list<Availability> availability = [ list<Availability> availability = [
Extension<[SPV_EXT_shader_atomic_float16_add]> Extension<[SPV_EXT_shader_atomic_float16_add]>
]; ];
} }
def SPV_C_TessellationPointSize : I32EnumAttrCase<"TessellationPointSize", 23> { def SPV_C_TessellationPointSize : I32EnumAttrCase<"TessellationPointSize", 23> {
list<I32EnumAttrCase> implies = [SPV_C_Tessellation]; list<I32EnumAttrCase> implies = [SPV_C_Tessellation];
} }
def SPV_C_GeometryPointSize : I32EnumAttrCase<"GeometryPointSize", 24> { def SPV_C_GeometryPointSize : I32EnumAttrCase<"GeometryPointSize", 24> {
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