[AArch64][GlobalISel] Run overlapping_and after legalization

[paquette]

Summary

When we have code with truncates, those truncates may be changed into G_ANDs with constants. These may, in turn, feed into other G_AND instructions.

Running this combine post-legalize allows us to optimize examples like this one:

https://godbolt.org/z/zrGY4dfEW

SDAG currently optimizes the example above so that there is only one and. GISel doesn't optimize it, because the G_AND we'd optimize here is translated as a G_TRUNC. Later, that G_TRUNC is turned into a G_AND during legalization.

llvm/lib/Target/AArch64/AArch64Combine.td

: GICombinerHelper<"AArch64GenPostLegalizerCombinerHelper",
                         hoist_logic_op_with_same_opcode_hands,
                         redundant_and, xor_of_and_with_same_reg,
                         extractvecelt_pairwise_add, redundant_or,
                         mul_const, redundant_sext_inreg,
                         form_bitfield_extract, rotate_out_of_range,
                         icmp_to_true_false_known_bits, merge_unmerge,
                         select_combines, fold_merge_to_zext,
                         constant_fold, identity_combines,
-                        ptr_add_immed_chain]> {
+                        ptr_add_immed_chain, overlapping_and]> {
   let DisableRuleOption = "aarch64postlegalizercombiner-disable-rule";
 }

llvm/test/CodeGen/AArch64/GlobalISel/opt-overlapping-and-postlegalize.mir

+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -debugify-and-strip-all-safe -mtriple arm64-apple-ios -O0 -run-pass=aarch64-postlegalizer-combiner --aarch64postlegalizercombinerhelper-only-enable-rule="overlapping_and" -global-isel -verify-machineinstrs %s -o - | FileCheck %s
+# REQUIRES: asserts
+
+# Test running the overlapping_and combine post-legalization.
+
+...
+---
+name:            test
+legalized:       true
+tracksRegLiveness: true
+body:             |
+  bb.0:
+    liveins: $w0
+    ; CHECK-LABEL: name: test
+    ; CHECK: liveins: $w0
+    ; CHECK-NEXT: {{  $}}
+    ; CHECK-NEXT: %copy:_(s32) = COPY $w0
+    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 192
+    ; CHECK-NEXT: %and2:_(s32) = G_AND %copy, [[C]]
+    ; CHECK-NEXT: $w0 = COPY %and2(s32)
+    ; CHECK-NEXT: RET_ReallyLR implicit $w0
+    %copy:_(s32) = COPY $w0
+    %cst_neg_64:_(s32) = G_CONSTANT i32 -64
+    %and1:_(s32) = G_AND %copy, %cst_neg_64
+    %cst_255:_(s32) = G_CONSTANT i32 255
+    %and2:_(s32) = G_AND %and1, %cst_255
+    $w0 = COPY %and2(s32)
+    RET_ReallyLR implicit $w0
+...