[libunwind] Support cfi_undefined and cfi_register for float registers.

[danielkiss]

Summary

During a backtrace the .cfi_undefined for a float register causes an assert in libunwind.

[MaskRay]

The test fails with g++ on an aarch64-linux-gnu machine.

libunwind/test/floatregister.pass.cpp

11

Does target={{aarch64-.+}} work?

There is no RUN line.

[danielkiss]

In D110144#3013599, @MaskRay wrote:

The test fails with g++ on an aarch64-linux-gnu machine.

this works for me:

>uname -m -o
aarch64 GNU/Linux
>g++ --vesion
g++ (Ubuntu 9.3.0-17ubuntu1~20.04) 9.3.0
>g++ libunwind/test/floatregister.pass.cpp -Wl,--export-dynamic -Wl,-ldl

libunwind/test/floatregister.pass.cpp

11

Does target={{aarch64-.+}} work?

It could. Maybe Windows won't work due to dladdr IIRC.

There is no RUN line.

As none of the test here needs one.

[MaskRay]

This tests needs -Wl,--export-dynamic to work. I missed the fact.

--export-dynamic is specified by if triple is not None and 'linux' in triple: self.cxx.link_flags += ['-Wl,--export-dynamic'] in test/libunwind/test/config.py.
Ideally the test itself should specify such a flag, but the change LGTM.

libunwind/test/floatregister.pass.cpp

41

The comment can be improved by saying what the 4 directives do.

[MaskRay]

libunwind/test/floatregister.pass.cpp

17

assert and signal are not used

Other clean-ups?

30

depend

34

avoid braces around one-line simple statements.

[danielkiss]

Thanks so much for the quick review.

[MaskRay]

libunwind/test/floatregister.pass.cpp

40

[mstorsjo]

This broke building for armv7-mingw. The Register_arm version of getFloatRegister() is not const, contrary to the other getFloatRegister() implementations for other architectures. It's not a plain oversight, as Registers_arm::getFloatRegister has a bunch of logic for fetching the relevant register banks (VFP 0-15, VFP 16-31 or WMMX) if not yet fetched, so it can't be made const easily. And I don't think it's a place where it's necessarily right to make the member variables mutable either...

[mstorsjo]

The one tweak that does seem to work though, is to make DwarfInstructions<A, R>::getSavedFloatRegister take a non-const R argument.

[mstorsjo]

Ping @danielkiss This broke building for dwarf configurations on arm, see comments above.

[danielkiss]

@mstorsjo sorry for that, other tweak would be just the exclude the RegisterInRegister case for arm. I feel better with this than chaining the interface.

#ifndef _LIBUNWIND_TARGET_ARM
    return registers.getFloatRegister((int)savedReg.value);
#endif

[danielkiss]

Both fixes are simple, I prefer the first one but I really interested in what others think.
D110731
D110732

libunwind/src/DwarfInstructions.hpp

double DwarfInstructions<A, R>::getSavedFloatRegister(
   switch (savedReg.location) {
   case CFI_Parser<A>::kRegisterInCFA:
     return addressSpace.getDouble(cfa + (pint_t)savedReg.value);
 
   case CFI_Parser<A>::kRegisterAtExpression:
     return addressSpace.getDouble(
         evaluateExpression((pint_t)savedReg.value, addressSpace,
                             registers, cfa));
-
+  case CFI_Parser<A>::kRegisterInRegister:
+    return registers.getFloatRegister((int)savedReg.value);
+  case CFI_Parser<A>::kRegisterUndefined:
+    return 0.0;
   case CFI_Parser<A>::kRegisterIsExpression:
   case CFI_Parser<A>::kRegisterUnused:
-  case CFI_Parser<A>::kRegisterUndefined:
   case CFI_Parser<A>::kRegisterOffsetFromCFA:
-  case CFI_Parser<A>::kRegisterInRegister:
     // FIX ME
     break;
   }
   _LIBUNWIND_ABORT("unsupported restore location for float register");
 }
 
 template <typename A, typename R>
 v128 DwarfInstructions<A, R>::getSavedVectorRegister(

libunwind/test/floatregister.pass.cpp

+// -*- C++ -*-
+//===----------------------------------------------------------------------===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+// REQUIRES: linux && target={{aarch64-.+}}
+
+// Basic test for float registers number are accepted.
+
+#include <dlfcn.h>
+#include <stdlib.h>
+#include <string.h>
+#include <unwind.h>
+
+_Unwind_Reason_Code frame_handler(struct _Unwind_Context *ctx, void *arg) {
+  (void)arg;
+  Dl_info info = {0, 0, 0, 0};
+
+  // Unwind util the main is reached, above frames depend on the platform and
+  // architecture.
+  if (dladdr(reinterpret_cast<void *>(_Unwind_GetIP(ctx)), &info) &&
+      info.dli_sname && !strcmp("main", info.dli_sname))
+    _Exit(0);
+
+  return _URC_NO_REASON;
+}
+
+__attribute__((noinline)) void foo() {
+  // Provide some CFI directives that instructs the unwinder where given
+  // float register is.
+#if defined(__aarch64__)
+  // DWARF register number for V0-V31 registers are 64-95.
+  // Previous value of V0 is saved at offset 0 from CFA.
+  asm volatile(".cfi_offset 64, 0");
+  // From now on the previous value of register can't be restored anymore.
+  asm volatile(".cfi_undefined 65");
+  asm volatile(".cfi_undefined 95");
+  // Previous value of V2 is in V30.
+  asm volatile(".cfi_register  66, 94");
+#endif
+  _Unwind_Backtrace(frame_handler, NULL);
+}
+
+int main() {
+  foo();
+  return -2;
+}