This patch makes instruction-referencing accepts an additional scenario where values can be read from physical registers at the start of blocks. As far as I was aware, this only happened:
- With arguments in the entry block,
- With constant physical registers,
To which this patch adds a third case:
- With exception-handling landing-pad blocks.
Observe the llvm-ir in the attached test: the operand of the dbg.value traces back to the "landingpad" instruction, which becomes some copies from physregs. Right now, that's deemed unacceptable, and the assertion fires.
The fix is to just accept this scenario; this is a case where the value in question is defined by a register and a position, not by an instruction that defines it. Reading it with a DBG_PHI is the correct behaviour, there isn't a non-copy instruction that we can refer to.
Is that an accidental newline in there?