[AArch64][GlobalISel] Legalize + select v2p0 -> v264 G_PTRTOINT

[paquette]

Summary

1. Just mark this case as legal because it can just be a copy.

2. Ensure the copy in the existing code actually gets selected. Without doing this, we'll crash because the destination won't have a register class. We could probably just set the register class here directly, but selectCopy has some nice things like verifying that the selected copy is correct.

This fell back 35 times in a build of clang with GISel for AArch64.

llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp

if (DstRB.getID() == AArch64::GPRRegBankID) {
         I.eraseFromParent();
         return true;
       }
 
       // We might have a vector G_PTRTOINT, in which case just emit a COPY.
       if (Opcode == TargetOpcode::G_PTRTOINT) {
         assert(DstTy.isVector() && "Expected an FPR ptrtoint to be a vector");
         I.setDesc(TII.get(TargetOpcode::COPY));
-        return true;
+        return selectCopy(I, TII, MRI, TRI, RBI);
       }
     }
 
     return false;
   }
 
   case TargetOpcode::G_ANYEXT: {
     const Register DstReg = I.getOperand(0).getReg();

llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp

AArch64LegalizerInfo::AArch64LegalizerInfo(const AArch64Subtarget &ST)
 
   if (TM.getCodeModel() == CodeModel::Small)
     getActionDefinitionsBuilder(G_GLOBAL_VALUE).custom();
   else
     getActionDefinitionsBuilder(G_GLOBAL_VALUE).legalFor({p0});
 
   getActionDefinitionsBuilder(G_PTRTOINT)
       .legalForCartesianProduct({s1, s8, s16, s32, s64}, {p0})
+      .legalFor({{v2s64, v2p0}})
       .maxScalar(0, s64)
       .widenScalarToNextPow2(0, /*Min*/ 8);
 
   getActionDefinitionsBuilder(G_INTTOPTR)
       .unsupportedIf([&](const LegalityQuery &Query) {
         return Query.Types[0].getSizeInBits() != Query.Types[1].getSizeInBits();
       })
       .legalFor({{p0, s64}, {v2p0, v2s64}});

llvm/test/CodeGen/AArch64/GlobalISel/legalize-ptrtoint.mir

+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -march=aarch64 -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s
+
+...
+---
+name:            v2s64_v2p0_legal
+tracksRegLiveness: true
+body:             |
+  bb.0:
+    liveins: $q0
+
+    ; CHECK-LABEL: name: v2s64_v2p0_legal
+    ; CHECK: liveins: $q0
+    ; CHECK: %ptr:_(<2 x p0>) = COPY $q0
+    ; CHECK: %int:_(<2 x s64>) = G_PTRTOINT %ptr(<2 x p0>)
+    ; CHECK: $q0 = COPY %int(<2 x s64>)
+    ; CHECK: RET_ReallyLR implicit $q0
+    %ptr:_(<2 x p0>) = COPY $q0
+    %int:_(<2 x s64>) = G_PTRTOINT %ptr(<2 x p0>)
+    $q0 = COPY %int(<2 x s64>)
+    RET_ReallyLR implicit $q0
+...

llvm/test/CodeGen/AArch64/GlobalISel/select-int-ptr-casts.mir

 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
 # RUN: llc -mtriple=aarch64-- -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
 
 --- |
   target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
 
   define void @inttoptr_p0_s64() { ret void }
   define void @ptrtoint_s64_p0() { ret void }
   define void @ptrtoint_s32_p0() { ret void }
   define void @ptrtoint_s16_p0() { ret void }
   define void @ptrtoint_s8_p0() { ret void }
   define void @ptrtoint_s1_p0() { ret void }
   define void @inttoptr_v2p0_v2s64() { ret void }
+  define void @ptrtoint_v2s64_v2p0() { ret void }
 ...
 
 ---
 name:            inttoptr_p0_s64
 legalized:       true
 regBankSelected: true
 
 registers:
bb.0:
     ; CHECK: RET_ReallyLR implicit $x0
     %1:fpr(<2 x s64>) = COPY $q0
     %2:fpr(<2 x p0>) = G_INTTOPTR %1(<2 x s64>)
     %4:gpr(s64) = G_CONSTANT i64 0
     %3:fpr(p0) = G_EXTRACT_VECTOR_ELT %2(<2 x p0>), %4(s64)
     $x0 = COPY %3(p0)
     RET_ReallyLR implicit $x0
 ...
+...
+---
+name:            ptrtoint_v2s64_v2p0
+legalized:       true
+regBankSelected: true
+tracksRegLiveness: true
+body:             |
+  bb.0:
+    liveins: $q0
+    ; CHECK-LABEL: name: ptrtoint_v2s64_v2p0
+    ; CHECK: liveins: $q0
+    ; CHECK: %ptr:fpr128 = COPY $q0
+    ; CHECK: $q0 = COPY %ptr
+    ; CHECK: RET_ReallyLR implicit $q0
+    %ptr:fpr(<2 x p0>) = COPY $q0
+    %int:fpr(<2 x s64>) = G_PTRTOINT %ptr(<2 x p0>)
+    $q0 = COPY %int(<2 x s64>)
+    RET_ReallyLR implicit $q0
+...