[hwasan] barrier after tagging and before tag check.

[fmayer]

Summary

this makes sure that the memory accesses and the tagging are not reordered,
which happens in practice when building android.

without this change, building android with use-after-scope makes it
crashloop, with this it works.

[fmayer]

Replaced by D107901.

llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp

bool HWAddressSanitizer::instrumentMemAccess(InterestingMemoryOperand &O) {
   Value *Addr = O.getPtr();
 
   LLVM_DEBUG(dbgs() << "Instrumenting: " << O.getInsn() << "\n");
 
   if (O.MaybeMask)
     return false; // FIXME
 
   IRBuilder<> IRB(O.getInsn());
+  IRB.CreateFence(AtomicOrdering::Acquire, SyncScope::SingleThread);
   if (isPowerOf2_64(O.TypeSize) &&
       (O.TypeSize / 8 <= (1ULL << (kNumberOfAccessSizes - 1))) &&
       (!O.Alignment || *O.Alignment >= (1ULL << Mapping.Scale) ||
        *O.Alignment >= O.TypeSize / 8)) {
     size_t AccessSizeIndex = TypeSizeToSizeIndex(O.TypeSize);
     if (InstrumentWithCalls) {
       IRB.CreateCall(HwasanMemoryAccessCallback[O.IsWrite][AccessSizeIndex],
                      IRB.CreatePointerCast(Addr, IntptrTy));
if (InstrumentWithCalls) {
     if (Size != AlignedSize) {
       IRB.CreateStore(
           ConstantInt::get(Int8Ty, Size % Mapping.getObjectAlignment()),
           IRB.CreateConstGEP1_32(Int8Ty, ShadowPtr, ShadowSize));
       IRB.CreateStore(JustTag, IRB.CreateConstGEP1_32(
                                    Int8Ty, IRB.CreateBitCast(AI, Int8PtrTy),
                                    AlignedSize - 1));
     }
+    IRB.CreateFence(AtomicOrdering::Release, SyncScope::SingleThread);
   }
 }
 
 unsigned HWAddressSanitizer::retagMask(unsigned AllocaNo) {
   if (TargetTriple.getArch() == Triple::x86_64)
     return AllocaNo & TagMaskByte;
 
   // A list of 8-bit numbers that have at most one run of non-zero bits.