[AArch64][GlobalISel] Mark v2s64 -> v2p0 G_INTTOPTR as legal

[paquette]

Summary

Allow

%x:_<2 x p0> = G_INTTOPTR %y:_<2 x s64>

This shows up when building clang for AArch64 with GlobalISel.

Also show that we can select it.

This should match SDAG's behaviour: https://godbolt.org/z/33oqYoaYv

llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp

getActionDefinitionsBuilder(G_PTRTOINT)
       .legalForCartesianProduct({s1, s8, s16, s32, s64}, {p0})
       .maxScalar(0, s64)
       .widenScalarToNextPow2(0, /*Min*/ 8);
 
   getActionDefinitionsBuilder(G_INTTOPTR)
       .unsupportedIf([&](const LegalityQuery &Query) {
         return Query.Types[0].getSizeInBits() != Query.Types[1].getSizeInBits();
       })
-      .legalFor({{p0, s64}});
+      .legalFor({{p0, s64}, {v2p0, v2s64}});
 
   // Casts for 32 and 64-bit width type are just copies.
   // Same for 128-bit width type, except they are on the FPR bank.
   getActionDefinitionsBuilder(G_BITCAST)
       // FIXME: This is wrong since G_BITCAST is not allowed to change the
       // number of bits but it's what the previous code described and fixing
       // it breaks tests.
       .legalForCartesianProduct({s1, s8, s16, s32, s64, s128, v16s8, v8s8, v4s8,

llvm/test/CodeGen/AArch64/GlobalISel/legalize-inttoptr.mir

+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple aarch64 -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s
+
+...
+---
+name:            p0_s64_legal
+tracksRegLiveness: true
+body:             |
+  bb.0:
+    liveins: $q0, $x0
+    ; CHECK-LABEL: name: p0_s64_legal
+    ; CHECK: liveins: $q0, $x0
+    ; CHECK: %copy:_(s64) = COPY $x0
+    ; CHECK: %inttoptr:_(p0) = G_INTTOPTR %copy(s64)
+    ; CHECK: $x0 = COPY %inttoptr(p0)
+    ; CHECK: RET_ReallyLR implicit $x0
+    %copy:_(s64) = COPY $x0
+    %inttoptr:_(p0) = G_INTTOPTR %copy(s64)
+    $x0 = COPY %inttoptr(p0)
+    RET_ReallyLR implicit $x0
+...
+---
+name:            v2s64_to_v2p0_legal
+tracksRegLiveness: true
+body:             |
+  bb.0:
+    liveins: $q0, $x0
+
+    ; CHECK-LABEL: name: v2s64_to_v2p0_legal
+    ; CHECK: liveins: $q0, $x0
+    ; CHECK: %copy:_(<2 x s64>) = COPY $q0
+    ; CHECK: %idx:_(s64) = G_CONSTANT i64 0
+    ; CHECK: %inttoptr:_(<2 x p0>) = G_INTTOPTR %copy(<2 x s64>)
+    ; CHECK: %extract:_(p0) = G_EXTRACT_VECTOR_ELT %inttoptr(<2 x p0>), %idx(s64)
+    ; CHECK: $x0 = COPY %extract(p0)
+    ; CHECK: RET_ReallyLR implicit $x0
+    %copy:_(<2 x s64>) = COPY $q0
+    %idx:_(s64) = G_CONSTANT i64 0
+    %inttoptr:_(<2 x p0>) = G_INTTOPTR %copy(<2 x s64>)
+    %extract:_(p0) = G_EXTRACT_VECTOR_ELT %inttoptr(<2 x p0>), %idx(s64)
+    $x0 = COPY %extract(p0)
+    RET_ReallyLR implicit $x0
+
+...

llvm/test/CodeGen/AArch64/GlobalISel/select-int-ptr-casts.mir

 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
 # RUN: llc -mtriple=aarch64-- -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
 
 --- |
   target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
 
   define void @inttoptr_p0_s64() { ret void }
   define void @ptrtoint_s64_p0() { ret void }
   define void @ptrtoint_s32_p0() { ret void }
   define void @ptrtoint_s16_p0() { ret void }
   define void @ptrtoint_s8_p0() { ret void }
   define void @ptrtoint_s1_p0() { ret void }
+  define void @inttoptr_v2p0_v2s64() { ret void }
 ...
 
 ---
 name:            inttoptr_p0_s64
 legalized:       true
 regBankSelected: true
 
 registers:
bb.0:
     ; CHECK: [[COPY1:%[0-9]+]]:gpr32 = COPY [[COPY]].sub_32
     ; CHECK: [[COPY2:%[0-9]+]]:gpr32all = COPY [[COPY1]]
     ; CHECK: $w0 = COPY [[COPY2]]
     %0(p0) = COPY $x0
     %1(s1) = G_PTRTOINT %0
     %2:gpr(s32) = G_ANYEXT %1
     $w0 = COPY %2(s32)
 ...
+
+---
+name:            inttoptr_v2p0_v2s64
+legalized:       true
+regBankSelected: true
+tracksRegLiveness: true
+body:             |
+  bb.0:
+    liveins: $q0, $x0
+    ; CHECK-LABEL: name: inttoptr_v2p0_v2s64
+    ; CHECK: liveins: $q0, $x0
+    ; CHECK: [[COPY:%[0-9]+]]:fpr128 = COPY $q0
+    ; CHECK: [[COPY1:%[0-9]+]]:fpr64 = COPY [[COPY]].dsub
+    ; CHECK: $x0 = COPY [[COPY1]]
+    ; CHECK: RET_ReallyLR implicit $x0
+    %1:fpr(<2 x s64>) = COPY $q0
+    %2:fpr(<2 x p0>) = G_INTTOPTR %1(<2 x s64>)
+    %4:gpr(s64) = G_CONSTANT i64 0
+    %3:fpr(p0) = G_EXTRACT_VECTOR_ELT %2(<2 x p0>), %4(s64)
+    $x0 = COPY %3(p0)
+    RET_ReallyLR implicit $x0
+...