[DFSan] Properly set argument ABI attributes

[aeubanks]

Summary

Calls must properly match argument ABI attributes with the callee.

Found via D103412.

[morehouse]

LGTM

llvm/lib/Transforms/Instrumentation/DataFlowSanitizer.cpp

CallInst::Create(DFSanVarargWrapperFn,
                      IRBuilder<>(BB).CreateGlobalStringPtr(F->getName()), "",
                      BB);
     new UnreachableInst(*Ctx, BB);
   } else {
     auto ArgIt = pointer_iterator<Argument *>(NewF->arg_begin());
     std::vector<Value *> Args(ArgIt, ArgIt + FT->getNumParams());
 
     CallInst *CI = CallInst::Create(F, Args, "", BB);
+    CI->setAttributes(F->getAttributes());
     if (FT->getReturnType()->isVoidTy())
       ReturnInst::Create(*Ctx, BB);
     else
       ReturnInst::Create(*Ctx, CI, BB);
   }
 
   return NewF;
 }
if (ClEventCallbacks) {
     Value *Addr8 = IRB.CreateBitCast(LI.getPointerOperand(), DFSF.DFS.Int8Ptr);
     IRB.CreateCall(DFSF.DFS.DFSanLoadCallbackFn, {PrimitiveShadow, Addr8});
   }
 }
 
 Value *DFSanFunction::updateOriginIfTainted(Value *Shadow, Value *Origin,
                                             IRBuilder<> &IRB) {
   assert(DFS.shouldTrackOrigins());
-  return IRB.CreateCall(DFS.DFSanChainOriginIfTaintedFn, {Shadow, Origin});
+  auto *CB = IRB.CreateCall(DFS.DFSanChainOriginIfTaintedFn, {Shadow, Origin});
+  CB->setAttributes(CB->getCalledFunction()->getAttributes());
+  return CB;
 }
 
 Value *DFSanFunction::updateOrigin(Value *V, IRBuilder<> &IRB) {
   if (!DFS.shouldTrackOrigins())
     return V;
-  return IRB.CreateCall(DFS.DFSanChainOriginFn, V);
+  auto *CB = IRB.CreateCall(DFS.DFSanChainOriginFn, V);
+  CB->setAttributes(CB->getCalledFunction()->getAttributes());
+  return CB;
 }
 
 Value *DFSanFunction::originToIntptr(IRBuilder<> &IRB, Value *Origin) {
   const unsigned OriginSize = DataFlowSanitizer::OriginWidthBytes;
   const DataLayout &DL = F->getParent()->getDataLayout();
   unsigned IntptrSize = DL.getTypeStoreSize(DFS.IntptrTy);
   if (IntptrSize == OriginSize)
     return Origin;
void DFSanFunction::storeOrigin(Instruction *Pos, Value *Addr, uint64_t Size,
   if (auto *ConstantShadow = dyn_cast<Constant>(CollapsedShadow)) {
     if (!ConstantShadow->isZeroValue())
       paintOrigin(IRB, updateOrigin(Origin, IRB), StoreOriginAddr, Size,
                   OriginAlignment);
     return;
   }
 
   if (shouldInstrumentWithCall()) {
-    IRB.CreateCall(DFS.DFSanMaybeStoreOriginFn,
+    auto *CB = IRB.CreateCall(DFS.DFSanMaybeStoreOriginFn,
                               {CollapsedShadow,
                                IRB.CreatePointerCast(Addr, IRB.getInt8PtrTy()),
                                ConstantInt::get(DFS.IntptrTy, Size), Origin});
+    CB->setAttributes(CB->getCalledFunction()->getAttributes());
   } else {
     Value *Cmp = convertToBool(CollapsedShadow, IRB, "_dfscmp");
     Instruction *CheckTerm = SplitBlockAndInsertIfThen(
         Cmp, &*IRB.GetInsertPoint(), false, DFS.OriginStoreWeights, &DT);
     IRBuilder<> IRBNew(CheckTerm);
     paintOrigin(IRBNew, updateOrigin(Origin, IRBNew), StoreOriginAddr, Size,
                 OriginAlignment);
     ++NumOriginStores;

 }
 
 void DFSanVisitor::visitMemSetInst(MemSetInst &I) {
   IRBuilder<> IRB(&I);
   Value *ValShadow = DFSF.getShadow(I.getValue());
   Value *ValOrigin = DFSF.DFS.shouldTrackOrigins()
                          ? DFSF.getOrigin(I.getValue())
                          : DFSF.DFS.ZeroOrigin;
-  IRB.CreateCall(
+  auto *CB = IRB.CreateCall(
       DFSF.DFS.DFSanSetLabelFn,
       {ValShadow, ValOrigin,
        IRB.CreateBitCast(I.getDest(), Type::getInt8PtrTy(*DFSF.DFS.Ctx)),
        IRB.CreateZExtOrTrunc(I.getLength(), DFSF.DFS.IntptrTy)});
+  CB->setAttributes(CB->getCalledFunction()->getAttributes());
 }
 
 void DFSanVisitor::visitMemTransferInst(MemTransferInst &I) {
   IRBuilder<> IRB(&I);
 
   // CopyOrMoveOrigin transfers origins by refering to their shadows. So we
   // need to move origins before moving shadows.
   if (DFSF.DFS.shouldTrackOrigins()) {

llvm/test/Instrumentation/DataFlowSanitizer/memset.ll

 ; RUN: opt < %s -dfsan -dfsan-args-abi -S | FileCheck %s
 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
 target triple = "x86_64-unknown-linux-gnu"
 
 ; CHECK: @__dfsan_shadow_width_bits = weak_odr constant i32 [[#SBITS:]]
 ; CHECK: @__dfsan_shadow_width_bytes = weak_odr constant i32 [[#SBYTES:]]
 
 declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i1)
 
 define void @ms(i8* %p, i8 %v) {
   ; CHECK-LABEL: @"dfs$ms"
   ; CHECK-SAME: (i8* %0, i8 %1, i[[#SBITS]] %2, i[[#SBITS]] %3)
-  ; CHECK: call void @__dfsan_set_label(i[[#SBITS]] %3, i32 0, i8* %0, i64 1)
+  ; CHECK: call void @__dfsan_set_label(i[[#SBITS]] zeroext %3, i32 zeroext 0, i8* %0, i64 1)
   call void @llvm.memset.p0i8.i64(i8* %p, i8 %v, i64 1, i1 1)
   ret void
 }

llvm/test/Instrumentation/DataFlowSanitizer/origin_mem_intrinsic.ll

define void @memmove(i8* %d, i8* %s, i32 %l) {
   call void @llvm.memmove.p0i8.p0i8.i32(i8* %d, i8* %s, i32 %l, i1 0)
   ret void
 }
 
 define void @memset(i8* %p, i8 %v) {
   ; CHECK: @"dfs$memset"
   ; CHECK: [[O:%.*]] = load i32, i32* getelementptr inbounds ([200 x i32], [200 x i32]* @__dfsan_arg_origin_tls, i64 0, i64 1), align 4
   ; CHECK: [[S:%.*]] = load i[[#SBITS]], i[[#SBITS]]* inttoptr (i64 add (i64 ptrtoint ([100 x i64]* @__dfsan_arg_tls to i64), i64 2) to i[[#SBITS]]*), align [[ALIGN:2]]
-  ; CHECK: call void @__dfsan_set_label(i[[#SBITS]] [[S]], i32 [[O]], i8* %p, i64 1)
+  ; CHECK: call void @__dfsan_set_label(i[[#SBITS]] zeroext [[S]], i32 zeroext [[O]], i8* %p, i64 1)
   call void @llvm.memset.p0i8.i64(i8* %p, i8 %v, i64 1, i1 1)
   ret void
-}
+}
 

llvm/test/Instrumentation/DataFlowSanitizer/origin_store.ll

define void @store_nonzero_to_escaped_alloca(i16 %a) {
   ; CHECK16-NEXT: %[[#SHADOW_ADDR:]] = mul i64 %[[#SHADOW_ADDR]], 2
   ; CHECK-NEXT:   %[[#SHADOW_PTR0:]] = inttoptr i64 %[[#SHADOW_ADDR]] to i[[#SBITS]]*
   ; CHECK-NEXT:   %[[#ORIGIN_OFFSET:]] = add i64 %[[#INTP+1]], [[#%.10d,ORIGIN_MASK:]]
   ; CHECK-NEXT:   %[[#ORIGIN_ADDR:]] = and i64 %[[#ORIGIN_OFFSET]], -4
   ; CHECK-NEXT:   %[[#ORIGIN_PTR:]] = inttoptr i64 %[[#ORIGIN_ADDR]] to i32*
   ; CHECK:        %_dfscmp = icmp ne i[[#SBITS]] %[[#AS]], 0
   ; CHECK-NEXT:   br i1 %_dfscmp, label %[[L1:.*]], label %[[L2:.*]],
   ; CHECK:       [[L1]]:
-  ; CHECK-NEXT:   %[[#NO:]] = call i32 @__dfsan_chain_origin(i32 %[[#AO]])
+  ; CHECK-NEXT:   %[[#NO:]] = call zeroext i32 @__dfsan_chain_origin(i32 zeroext %[[#AO]])
   ; CHECK-NEXT:   store i32 %[[#NO]], i32* %[[#ORIGIN_PTR]], align 4
   ; CHECK-NEXT:   br label %[[L2]]
   ; CHECK:       [[L2]]:
   ; CHECK-NEXT:    store i16 %a, i16* %p, align 2
   
   %p = alloca i16
   store i16 %a, i16* %p
   call void @foo(i16* %p)
define void @store64_align8(i64* %p, i64 %a) {
 
   ; COMBINE_STORE_PTR-NEXT: %[[#AS:]] = or i[[#SBITS]] %[[#AS]], %[[#PS]]
   ; COMBINE_STORE_PTR-NEXT: %[[#NE:]] = icmp ne i[[#SBITS]] %[[#PS]], 0
   ; COMBINE_STORE_PTR-NEXT: %[[#AO:]] = select i1 %[[#NE]], i32 %[[#PO]], i32 %[[#AO]]
 
   ; CHECK:       %_dfscmp = icmp ne i[[#SBITS]] %[[#AS]], 0
   ; CHECK-NEXT:  br i1 %_dfscmp, label %[[L1:.*]], label %[[L2:.*]],
   ; CHECK:      [[L1]]:
-  ; CHECK-NEXT:  %[[#NO:]] = call i32 @__dfsan_chain_origin(i32 %[[#AO]])
+  ; CHECK-NEXT:  %[[#NO:]] = call zeroext i32 @__dfsan_chain_origin(i32 zeroext %[[#AO]])
   ; CHECK-NEXT:  %[[#NO_ZEXT:]] = zext i32 %[[#NO]] to i64
   ; CHECK-NEXT:  %[[#NO_SHL:]] = shl i64 %[[#NO_ZEXT]], 32
   ; CHECK-NEXT:  %[[#NO2:]] = or i64 %[[#NO_ZEXT]], %[[#NO_SHL]]
   ; CHECK-NEXT:  %[[#O_PTR:]] = bitcast i32* {{.*}} to i64*
   ; CHECK-NEXT:  store i64 %[[#NO2]], i64* %[[#O_PTR]], align 8
   ; CHECK-NEXT:  br label %[[L2]]
   ; CHECK:      [[L2]]:
   ; CHECK-NEXT:  store i64 %a, i64* %p, align 8
define void @store64_align2(i64* %p, i64 %a) {
 
   ; COMBINE_STORE_PTR-NEXT: %[[#AS:]] = or i[[#SBITS]] %[[#AS]], %[[#PS]]
   ; COMBINE_STORE_PTR-NEXT: %[[#NE:]] = icmp ne i[[#SBITS]] %[[#PS]], 0
   ; COMBINE_STORE_PTR-NEXT: %[[#AO:]] = select i1 %[[#NE]], i32 %[[#PO]], i32 %[[#AO]]
 
   ; CHECK:      %_dfscmp = icmp ne i[[#SBITS]] %[[#AS]], 0
   ; CHECK-NEXT: br i1 %_dfscmp, label %[[L1:.*]], label %[[L2:.*]],
   ; CHECK:     [[L1]]:
-  ; CHECK-NEXT: %[[#NO:]] = call i32 @__dfsan_chain_origin(i32 %[[#AO]])
+  ; CHECK-NEXT: %[[#NO:]] = call zeroext i32 @__dfsan_chain_origin(i32 zeroext %[[#AO]])
   ; CHECK-NEXT: store i32 %[[#NO]], i32* %[[#O_PTR0:]], align 4
   ; CHECK-NEXT: %[[#O_PTR1:]] = getelementptr i32, i32* %[[#O_PTR0]], i32 1
   ; CHECK-NEXT: store i32 %[[#NO]], i32* %[[#O_PTR1]], align 4
   ; CHECK:     [[L2]]:
   ; CHECK-NEXT: store i64 %a, i64* %p, align 2
   
   store i64 %a, i64* %p, align 2
   ret void
define void @store96_align8(i96* %p, i96 %a) {
 
   ; COMBINE_STORE_PTR-NEXT: %[[#AS:]] = or i[[#SBITS]] %[[#AS]], %[[#PS]]
   ; COMBINE_STORE_PTR-NEXT: %[[#NE:]] = icmp ne i[[#SBITS]] %[[#PS]], 0
   ; COMBINE_STORE_PTR-NEXT: %[[#AO:]] = select i1 %[[#NE]], i32 %[[#PO]], i32 %[[#AO]]
 
   ; CHECK:      %_dfscmp = icmp ne i[[#SBITS]] %[[#AS]], 0
   ; CHECK-NEXT: br i1 %_dfscmp, label %[[L1:.*]], label %[[L2:.*]],
   ; CHECK:     [[L1]]:
-  ; CHECK-NEXT: %[[#NO:]] = call i32 @__dfsan_chain_origin(i32 %[[#AO]])
+  ; CHECK-NEXT: %[[#NO:]] = call zeroext i32 @__dfsan_chain_origin(i32 zeroext %[[#AO]])
   ; CHECK-NEXT: %[[#NO_ZEXT:]] = zext i32 %[[#NO]] to i64
   ; CHECK-NEXT: %[[#NO_SHL:]] = shl i64 %[[#NO_ZEXT]], 32
   ; CHECK-NEXT: %[[#NO2:]] = or i64 %[[#NO_ZEXT]], %[[#NO_SHL]]
   ; CHECK-NEXT: %[[#O_PTR64:]] = bitcast i32* %[[#O_PTR0:]] to i64*
   ; CHECK-NEXT: store i64 %[[#NO2]], i64* %[[#O_PTR64]], align 8
   ; CHECK-NEXT: %[[#O_PTR1:]] = getelementptr i32, i32* %[[#O_PTR0]], i32 2
   ; CHECK-NEXT: store i32 %[[#NO]], i32* %[[#O_PTR1]], align 8
   ; CHECK:     [[L2]]:
   ; CHECK-NEXT: store i96 %a, i96* %p, align 8
   
   store i96 %a, i96* %p, align 8
   ret void
 }

llvm/test/Instrumentation/DataFlowSanitizer/origin_store_threshold.ll

 ; RUN: opt < %s -dfsan -dfsan-track-origins=1 -dfsan-fast-8-labels=true  -dfsan-instrument-with-call-threshold=0 -S | FileCheck %s
 ; RUN: opt < %s -dfsan -dfsan-track-origins=1 -dfsan-fast-16-labels=true -dfsan-instrument-with-call-threshold=0 -S | FileCheck %s
 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
 target triple = "x86_64-unknown-linux-gnu"
 
 ; CHECK: @__dfsan_shadow_width_bits = weak_odr constant i32 [[#SBITS:]]
 ; CHECK: @__dfsan_shadow_width_bytes = weak_odr constant i32 [[#SBYTES:]]
 
 define void @store_threshold([2 x i64]* %p, [2 x i64] %a) {
   ; CHECK: @"dfs$store_threshold"
   ; CHECK: [[AO:%.*]] = load i32, i32* getelementptr inbounds ([200 x i32], [200 x i32]* @__dfsan_arg_origin_tls, i64 0, i64 1), align 4
   ; CHECK: [[AS:%.*]] = load [2 x i[[#SBITS]]], [2 x i[[#SBITS]]]* inttoptr (i64 add (i64 ptrtoint ([100 x i64]* @__dfsan_arg_tls to i64), i64 2) to [2 x i[[#SBITS]]]*), align 2
   ; CHECK: [[AS0:%.*]] = extractvalue [2 x i[[#SBITS]]] [[AS]], 0
   ; CHECK: [[AS1:%.*]] = extractvalue [2 x i[[#SBITS]]] [[AS]], 1
   ; CHECK: [[AS01:%.*]] = or i[[#SBITS]] [[AS0]], [[AS1]]
   ; CHECK: [[ADDR:%.*]] = bitcast [2 x i64]* %p to i8*
-  ; CHECK: call void @__dfsan_maybe_store_origin(i[[#SBITS]] [[AS01]], i8* [[ADDR]], i64 16, i32 [[AO]])
+  ; CHECK: call void @__dfsan_maybe_store_origin(i[[#SBITS]] zeroext [[AS01]], i8* [[ADDR]], i64 16, i32 zeroext [[AO]])
   ; CHECK: store [2 x i64] %a, [2 x i64]* %p, align 8
 
   store [2 x i64] %a, [2 x i64]* %p
   ret void
 }

llvm/test/Instrumentation/DataFlowSanitizer/origin_track_load.ll

define i64 @load64(i64* %p) {
   ; CHECK-NEXT: %[[#PO:]] = load i32, i32* getelementptr inbounds ([200 x i32], [200 x i32]* @__dfsan_arg_origin_tls, i64 0, i64 0), align 4
   ; CHECK-NEXT: %[[#PS:]] = load i[[#SBITS]], i[[#SBITS]]* bitcast ([100 x i64]* @__dfsan_arg_tls to i[[#SBITS]]*), align [[ALIGN:2]]
 
   ; CHECK-NEXT: %[[#INTP:]] = bitcast i64* %p to i8*
   ; CHECK-NEXT: %[[#LABEL_ORIGIN:]] = call zeroext i64 @__dfsan_load_label_and_origin(i8* %[[#INTP]], i64 8)
   ; CHECK-NEXT: %[[#LABEL_ORIGIN_H32:]] = lshr i64 %[[#LABEL_ORIGIN]], 32
   ; CHECK-NEXT: %[[#LABEL:]] = trunc i64 %[[#LABEL_ORIGIN_H32]] to i[[#SBITS]]
   ; CHECK-NEXT: %[[#ORIGIN:]] = trunc i64 %[[#LABEL_ORIGIN]] to i32
-  ; CHECK-NEXT: %[[#ORIGIN_CHAINED:]] = call i32 @__dfsan_chain_origin_if_tainted(i[[#SBITS]] %[[#LABEL]], i32 %[[#ORIGIN]])
+  ; CHECK-NEXT: %[[#ORIGIN_CHAINED:]] = call zeroext i32 @__dfsan_chain_origin_if_tainted(i[[#SBITS]] zeroext %[[#LABEL]], i32 zeroext %[[#ORIGIN]])
 
   ; CHECK-NEXT: %[[#LABEL:]] = or i[[#SBITS]] %[[#LABEL]], %[[#PS]]
   ; CHECK-NEXT: %[[#NZ:]] = icmp ne i[[#SBITS]] %[[#PS]], 0
   ; CHECK-NEXT: %[[#ORIGIN_SEL:]] = select i1 %[[#NZ]], i32 %[[#PO]], i32 %[[#ORIGIN_CHAINED]]
 
   ; CHECK-NEXT: %a = load i64, i64* %p
   ; CHECK-NEXT: store i[[#SBITS]] %[[#LABEL]], i[[#SBITS]]* bitcast ([100 x i64]* @__dfsan_retval_tls to i[[#SBITS]]*), align [[ALIGN]]
   ; CHECK-NEXT: store i32 %[[#ORIGIN_SEL]], i32* @__dfsan_retval_origin_tls, align 4
 
   %a = load i64, i64* %p
   ret i64 %a
 }

llvm/test/Instrumentation/DataFlowSanitizer/shadow-args-zext.ll

 entry:
   %call = call zeroext i16 @k4(i64 signext 56, i64 signext 67, i64 signext 78, i64 signext 89)
   %conv = zext i16 %call to i32
   ret i32 %conv
 }
 
 declare zeroext i16 @dfsan_get_label(i64 signext)
 ; CHECK-LABEL: @"dfsw$dfsan_get_label"
-; CHECK: %{{.*}} = call i16 @__dfsw_dfsan_get_label(i64 %0, i[[#SBITS]] zeroext %1, i[[#SBITS]]* %{{.*}})
+; CHECK: %{{.*}} = call zeroext i16 @__dfsw_dfsan_get_label(i64 signext %0, i[[#SBITS]] zeroext %1, i[[#SBITS]]* %{{.*}})
 
 declare zeroext i16 @k2(i64 signext, i64 signext)
 ; CHECK-LABEL: @"dfsw$k2"
-; CHECK: %{{.*}} = call i16 @__dfsw_k2(i64 %{{.*}}, i64 %{{.*}}, i[[#SBITS]] zeroext %{{.*}}, i[[#SBITS]] zeroext %{{.*}}, i[[#SBITS]]* %{{.*}})
+; CHECK: %{{.*}} = call zeroext i16 @__dfsw_k2(i64 signext %{{.*}}, i64 signext %{{.*}}, i[[#SBITS]] zeroext %{{.*}}, i[[#SBITS]] zeroext %{{.*}}, i[[#SBITS]]* %{{.*}})
 
 declare zeroext i16 @k4(i64 signext, i64 signext, i64 signext, i64 signext)
 ; CHECK-LABEL: @"dfsw$k4"
-; CHECK: %{{.*}} = call i16 @__dfsw_k4(i64 %{{.*}}, i64 %{{.*}}, i64  %{{.*}}, i64 %{{.*}}, i[[#SBITS]] zeroext %{{.*}}, i[[#SBITS]] zeroext %{{.*}}, i[[#SBITS]] zeroext %{{.*}}, i[[#SBITS]] zeroext %{{.*}}, i[[#SBITS]]* %{{.*}})
+; CHECK: %{{.*}} = call zeroext i16 @__dfsw_k4(i64 signext %{{.*}}, i64 signext %{{.*}}, i64 signext %{{.*}}, i64 signext %{{.*}}, i[[#SBITS]] zeroext %{{.*}}, i[[#SBITS]] zeroext %{{.*}}, i[[#SBITS]] zeroext %{{.*}}, i[[#SBITS]] zeroext %{{.*}}, i[[#SBITS]]* %{{.*}})
 
 
 ; CHECK: declare zeroext i16 @__dfsw_dfsan_get_label(i64 signext, i[[#SBITS]], i[[#SBITS]]*)
 ; CHECK: declare zeroext i16 @__dfsw_k2(i64 signext, i64 signext, i[[#SBITS]], i[[#SBITS]], i[[#SBITS]]*)
 ; CHECK: declare zeroext i16 @__dfsw_k4(i64 signext, i64 signext, i64 signext, i64 signext, i[[#SBITS]], i[[#SBITS]], i[[#SBITS]], i[[#SBITS]], i[[#SBITS]]*)