[AVR] Add support for the tinyAVR 0-series and tinyAVR 1-seriesø

[justinlatimer]

Summary

[AVR] Add support for the tinyAVR 0-series and tinyAVR 1-series

[dylanmckay]

Add these devices into the constant list at https://github.com/llvm/llvm-project/blob/main/clang/lib/Basic/Targets/AVR.cpp#L30 so that Clang can define the required mcu defines.

I will accept this patch once that is done. Thanks for the patch @justinlatimer !

[justinlatimer]

Add devices into the clang AVR target constant list.

[justinlatimer]

@dylanmckay is there anything else I need to update on this patch? Thanks!

[dylanmckay]

Nope, thank you!

[justinlatimer]

@benshi001 would it be possible to get this committed? Thanks!

[benshi001]

I though the test clang/test/Misc/target-invalid-cpu-note.c should also be updated.

BTW: What info (especially name and email) would like to see in the commit message ?

[benshi001]

llvm/lib/Target/AVR/AVRDevices.td

515

attiny3214 is missing

[justinlatimer]

llvm/lib/Target/AVR/AVRDevices.td

515

I can't find any details on the attiny3214?

[benshi001]

llvm/lib/Target/AVR/AVRDevices.td

515

Let's just ignore that. I see attiny3214 in GCC but not find in microchip's website.

[benshi001]

This comment was removed by benshi001.

[benshi001]

Please tell me your email address which will be shown in the commit message.

[justinlatimer]

Update target-invalid-cpu-note.c test.

[justinlatimer]

For the commit message, my name is Justin Latimer and my email is [e-mail]. Thanks!

[justinlatimer]

Thanks a lot @benshi001!

clang/lib/Basic/Targets/AVR.cpp

 //===--- AVR.cpp - Implement AVR target feature support -------------------===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 //
static MCUInfo AVRMcus[] = {
     {"attiny4", "__AVR_ATtiny4__"},
     {"attiny5", "__AVR_ATtiny5__"},
     {"attiny9", "__AVR_ATtiny9__"},
     {"attiny10", "__AVR_ATtiny10__"},
     {"attiny20", "__AVR_ATtiny20__"},
     {"attiny40", "__AVR_ATtiny40__"},
     {"attiny102", "__AVR_ATtiny102__"},
     {"attiny104", "__AVR_ATtiny104__"},
+    {"attiny202", "__AVR_ATtiny202__"},
+    {"attiny402", "__AVR_ATtiny402__"},
+    {"attiny204", "__AVR_ATtiny204__"},
+    {"attiny404", "__AVR_ATtiny404__"},
+    {"attiny804", "__AVR_ATtiny804__"},
+    {"attiny1604", "__AVR_ATtiny1604__"},
+    {"attiny406", "__AVR_ATtiny406__"},
+    {"attiny806", "__AVR_ATtiny806__"},
+    {"attiny1606", "__AVR_ATtiny1606__"},
+    {"attiny807", "__AVR_ATtiny807__"},
+    {"attiny1607", "__AVR_ATtiny1607__"},
+    {"attiny212", "__AVR_ATtiny212__"},
+    {"attiny412", "__AVR_ATtiny412__"},
+    {"attiny214", "__AVR_ATtiny214__"},
+    {"attiny414", "__AVR_ATtiny414__"},
+    {"attiny814", "__AVR_ATtiny814__"},
+    {"attiny1614", "__AVR_ATtiny1614__"},
+    {"attiny416", "__AVR_ATtiny416__"},
+    {"attiny816", "__AVR_ATtiny816__"},
+    {"attiny1616", "__AVR_ATtiny1616__"},
+    {"attiny3216", "__AVR_ATtiny3216__"},
+    {"attiny417", "__AVR_ATtiny417__"},
+    {"attiny817", "__AVR_ATtiny817__"},
+    {"attiny1617", "__AVR_ATtiny1617__"},
+    {"attiny3217", "__AVR_ATtiny3217__"},
 };
 
 } // namespace targets
 } // namespace clang
 
 static constexpr llvm::StringLiteral ValidFamilyNames[] = {
     "avr1",      "avr2",      "avr25",     "avr3",      "avr31",
     "avr35",     "avr4",      "avr5",      "avr51",     "avr6",

clang/test/Misc/target-invalid-cpu-note.c

 // AVR-SAME: txmega64b1, atxmega64b3, atxmega64c3, atxmega64d3, atxmega64d4,
 // AVR-SAME: txmega64a1, atxmega64a1u, atxmega128a3, atxmega128a3u,
 // AVR-SAME: txmega128b1, atxmega128b3, atxmega128c3, atxmega128d3,
 // AVR-SAME: txmega128d4, atxmega192a3, atxmega192a3u, atxmega192c3,
 // AVR-SAME: txmega192d3, atxmega256a3, atxmega256a3u, atxmega256a3b,
 // AVR-SAME: txmega256a3bu, atxmega256c3, atxmega256d3, atxmega384c3,
 // AVR-SAME: txmega384d3, atxmega128a1, atxmega128a1u, atxmega128a4u,
 // AVR-SAME: ttiny4, attiny5, attiny9, attiny10, attiny20, attiny40, attiny102,
-// AVR-SAME: attiny104
+// AVR-SAME: attiny104, attiny202, attiny402, attiny204, attiny404, attiny804,
+// AVR-SAME: attiny1604, attiny406, attiny806, attiny1606, attiny807, attiny1607,
+// AVR-SAME: attiny212, attiny412, attiny214, attiny414, attiny814, attiny1614,
+// AVR-SAME: attiny416, attiny816, attiny1616, attiny3216, attiny417, attiny817,
+// AVR-SAME: attiny1617, attiny3217
 
 // RUN: not %clang_cc1 -triple riscv32 -target-cpu not-a-cpu -fsyntax-only %s 2>&1 | FileCheck %s --check-prefix RISCV32
 // RISCV32: error: unknown target CPU 'not-a-cpu'
 // RISCV32: note: valid target CPU values are: generic-rv32, rocket-rv32, sifive-e31
 
 // RUN: not %clang_cc1 -triple riscv64 -target-cpu not-a-cpu -fsyntax-only %s 2>&1 | FileCheck %s --check-prefix RISCV64
 // RISCV64: error: unknown target CPU 'not-a-cpu'
 // RISCV64: note: valid target CPU values are: generic-rv64, rocket-rv64, sifive-u54

llvm/lib/Target/AVR/AVRDevices.td

 def : Device<"attiny4",            FamilyTiny, ELFArchTiny>;
 def : Device<"attiny5",            FamilyTiny, ELFArchTiny>;
 def : Device<"attiny9",            FamilyTiny, ELFArchTiny>;
 def : Device<"attiny10",           FamilyTiny, ELFArchTiny>;
 def : Device<"attiny20",           FamilyTiny, ELFArchTiny>;
 def : Device<"attiny40",           FamilyTiny, ELFArchTiny>;
 def : Device<"attiny102",          FamilyTiny, ELFArchTiny>;
 def : Device<"attiny104",          FamilyTiny, ELFArchTiny>;
-
+def : Device<"attiny202",          FamilyXMEGA, ELFArchXMEGA3>;
+def : Device<"attiny402",          FamilyXMEGA, ELFArchXMEGA3>;
+def : Device<"attiny204",          FamilyXMEGA, ELFArchXMEGA3>;
+def : Device<"attiny404",          FamilyXMEGA, ELFArchXMEGA3>;
+def : Device<"attiny804",          FamilyXMEGA, ELFArchXMEGA3>;
+def : Device<"attiny1604",         FamilyXMEGA, ELFArchXMEGA3>;
+def : Device<"attiny406",          FamilyXMEGA, ELFArchXMEGA3>;
+def : Device<"attiny806",          FamilyXMEGA, ELFArchXMEGA3>;
+def : Device<"attiny1606",         FamilyXMEGA, ELFArchXMEGA3>;
+def : Device<"attiny807",          FamilyXMEGA, ELFArchXMEGA3>;
+def : Device<"attiny1607",         FamilyXMEGA, ELFArchXMEGA3>;
+def : Device<"attiny212",          FamilyXMEGA, ELFArchXMEGA3>;
+def : Device<"attiny412",          FamilyXMEGA, ELFArchXMEGA3>;
+def : Device<"attiny214",          FamilyXMEGA, ELFArchXMEGA3>;
+def : Device<"attiny414",          FamilyXMEGA, ELFArchXMEGA3>;
+def : Device<"attiny814",          FamilyXMEGA, ELFArchXMEGA3>;
+def : Device<"attiny1614",         FamilyXMEGA, ELFArchXMEGA3>;
+def : Device<"attiny416",          FamilyXMEGA, ELFArchXMEGA3>;
+def : Device<"attiny816",          FamilyXMEGA, ELFArchXMEGA3>;
+def : Device<"attiny1616",         FamilyXMEGA, ELFArchXMEGA3>;
+def : Device<"attiny3216",         FamilyXMEGA, ELFArchXMEGA3>;
+def : Device<"attiny417",          FamilyXMEGA, ELFArchXMEGA3>;
+def : Device<"attiny817",          FamilyXMEGA, ELFArchXMEGA3>;
+def : Device<"attiny1617",         FamilyXMEGA, ELFArchXMEGA3>;
+def : Device<"attiny3217",         FamilyXMEGA, ELFArchXMEGA3>;