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Differential D102278

AMDGPU: Fix assert on constant load from addrspacecasted pointer
ClosedPublic

Authored by arsenm on May 11 2021, 2:25 PM.

Details

Reviewers
hliao
rampitec
Summary

This was trying to create a bitcast between different address spaces.

Diff Detail

Event Timeline

arsenm created this revision.May 11 2021, 2:25 PM
Herald added subscribers: kerbowa, hiraditya, t-tye and 6 others. · View Herald TranscriptMay 11 2021, 2:25 PM
arsenm requested review of this revision.May 11 2021, 2:25 PM
Herald added a project: Restricted Project. · View Herald TranscriptMay 11 2021, 2:25 PM
Herald added a subscriber: wdng. · View Herald Transcript
hliao accepted this revision.May 11 2021, 2:27 PM

Good catch! LGTM!

This revision is now accepted and ready to land.May 11 2021, 2:27 PM
Harbormaster completed remote builds in B103857: Diff 344562.May 11 2021, 3:09 PM
arsenm closed this revision.May 11 2021, 5:21 PM

a15ed701ab30d0073f46139df850fe23b03fd3ac

Revision Contents

PathSize
llvm/
lib/
Target/
AMDGPU/
2 lines
test/
CodeGen/
AMDGPU/
69 lines

Diff 344562

llvm/lib/Target/AMDGPU/AMDGPULateCodeGenPrepare.cpp

Show First 20 Lines • Show All 159 Lines • ▼ Show 20 Linesbool AMDGPULateCodeGenPrepare::visitLoadInst(LoadInst &LI) {
unsigned AS = LI.getPointerAddressSpace(); unsigned AS = LI.getPointerAddressSpace();
unsigned LdBits = DL->getTypeStoreSize(LI.getType()) * 8; unsigned LdBits = DL->getTypeStoreSize(LI.getType()) * 8;
auto IntNTy = Type::getIntNTy(LI.getContext(), LdBits); auto IntNTy = Type::getIntNTy(LI.getContext(), LdBits);
PointerType *Int32PtrTy = Type::getInt32PtrTy(LI.getContext(), AS); PointerType *Int32PtrTy = Type::getInt32PtrTy(LI.getContext(), AS);
PointerType *Int8PtrTy = Type::getInt8PtrTy(LI.getContext(), AS); PointerType *Int8PtrTy = Type::getInt8PtrTy(LI.getContext(), AS);
auto *NewPtr = IRB.CreateBitCast( auto *NewPtr = IRB.CreateBitCast(
IRB.CreateConstGEP1_64(IRB.CreateBitCast(Base, Int8PtrTy), IRB.CreateConstGEP1_64(IRB.CreatePointerBitCastOrAddrSpaceCast(Base, Int8PtrTy),
Lint: Pre-merge checks
Inline Actions

clang-format: please reformat the code

-      IRB.CreateConstGEP1_64(IRB.CreatePointerBitCastOrAddrSpaceCast(Base, Int8PtrTy),
-                             Offset - Adjust),
+      IRB.CreateConstGEP1_64(
+          IRB.CreatePointerBitCastOrAddrSpaceCast(Base, Int8PtrTy),
+          Offset - Adjust),
Lint: Pre-merge checks: clang-format: please reformat the code ``` - IRB.CreateConstGEP1_64(IRB.
Offset - Adjust), Offset - Adjust),
Int32PtrTy); Int32PtrTy);
LoadInst *NewLd = IRB.CreateAlignedLoad(IRB.getInt32Ty(), NewPtr, Align(4)); LoadInst *NewLd = IRB.CreateAlignedLoad(IRB.getInt32Ty(), NewPtr, Align(4));
NewLd->copyMetadata(LI); NewLd->copyMetadata(LI);
NewLd->setMetadata(LLVMContext::MD_range, nullptr); NewLd->setMetadata(LLVMContext::MD_range, nullptr);
unsigned ShAmt = Adjust * 8; unsigned ShAmt = Adjust * 8;
auto *NewVal = IRB.CreateBitCast( auto *NewVal = IRB.CreateBitCast(
Show All 19 Lines

llvm/test/CodeGen/AMDGPU/amdgpu-late-codegenprepare.ll

  • This file was added.
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -amdgpu-late-codegenprepare %s | FileCheck %s
; Make sure we don't crash when trying to create a bitcast between
; address spaces
define amdgpu_kernel void @constant_from_offset_cast_generic_null() {
; CHECK-LABEL: @constant_from_offset_cast_generic_null(
; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32 addrspace(4)* bitcast (i8 addrspace(4)* getelementptr (i8, i8 addrspace(4)* addrspacecast (i8* null to i8 addrspace(4)*), i64 4) to i32 addrspace(4)*), align 4
; CHECK-NEXT: [[TMP2:%.*]] = lshr i32 [[TMP1]], 16
; CHECK-NEXT: [[TMP3:%.*]] = trunc i32 [[TMP2]] to i8
; CHECK-NEXT: store i8 [[TMP3]], i8 addrspace(1)* undef, align 1
; CHECK-NEXT: ret void
;
%load = load i8, i8 addrspace(4)* getelementptr inbounds (i8, i8 addrspace(4)* addrspacecast (i8* null to i8 addrspace(4)*), i64 6), align 1
store i8 %load, i8 addrspace(1)* undef
ret void
}
define amdgpu_kernel void @constant_from_offset_cast_global_null() {
; CHECK-LABEL: @constant_from_offset_cast_global_null(
; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32 addrspace(4)* bitcast (i8 addrspace(4)* getelementptr (i8, i8 addrspace(4)* addrspacecast (i8 addrspace(1)* null to i8 addrspace(4)*), i64 4) to i32 addrspace(4)*), align 4
; CHECK-NEXT: [[TMP2:%.*]] = lshr i32 [[TMP1]], 16
; CHECK-NEXT: [[TMP3:%.*]] = trunc i32 [[TMP2]] to i8
; CHECK-NEXT: store i8 [[TMP3]], i8 addrspace(1)* undef, align 1
; CHECK-NEXT: ret void
;
%load = load i8, i8 addrspace(4)* getelementptr inbounds (i8, i8 addrspace(4)* addrspacecast (i8 addrspace(1)* null to i8 addrspace(4)*), i64 6), align 1
store i8 %load, i8 addrspace(1)* undef
ret void
}
@gv = unnamed_addr addrspace(1) global [64 x i8] undef, align 4
define amdgpu_kernel void @constant_from_offset_cast_global_gv() {
; CHECK-LABEL: @constant_from_offset_cast_global_gv(
; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32 addrspace(4)* bitcast (i8 addrspace(4)* getelementptr (i8, i8 addrspace(4)* addrspacecast (i8 addrspace(1)* getelementptr inbounds ([64 x i8], [64 x i8] addrspace(1)* @gv, i32 0, i32 0) to i8 addrspace(4)*), i64 4) to i32 addrspace(4)*), align 4
; CHECK-NEXT: [[TMP2:%.*]] = lshr i32 [[TMP1]], 16
; CHECK-NEXT: [[TMP3:%.*]] = trunc i32 [[TMP2]] to i8
; CHECK-NEXT: store i8 [[TMP3]], i8 addrspace(1)* undef, align 1
; CHECK-NEXT: ret void
;
%load = load i8, i8 addrspace(4)* getelementptr inbounds (i8, i8 addrspace(4)* addrspacecast ([64 x i8] addrspace(1)* @gv to i8 addrspace(4)*), i64 6), align 1
store i8 %load, i8 addrspace(1)* undef
ret void
}
define amdgpu_kernel void @constant_from_offset_cast_generic_inttoptr() {
; CHECK-LABEL: @constant_from_offset_cast_generic_inttoptr(
; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32 addrspace(4)* bitcast (i8 addrspace(4)* getelementptr (i8, i8 addrspace(4)* addrspacecast (i8* inttoptr (i64 128 to i8*) to i8 addrspace(4)*), i64 4) to i32 addrspace(4)*), align 4
; CHECK-NEXT: [[TMP2:%.*]] = lshr i32 [[TMP1]], 16
; CHECK-NEXT: [[TMP3:%.*]] = trunc i32 [[TMP2]] to i8
; CHECK-NEXT: store i8 [[TMP3]], i8 addrspace(1)* undef, align 1
; CHECK-NEXT: ret void
;
%load = load i8, i8 addrspace(4)* getelementptr inbounds (i8, i8 addrspace(4)* addrspacecast (i8* inttoptr (i64 128 to i8*) to i8 addrspace(4)*), i64 6), align 1
store i8 %load, i8 addrspace(1)* undef
ret void
}
define amdgpu_kernel void @constant_from_inttoptr() {
; CHECK-LABEL: @constant_from_inttoptr(
; CHECK-NEXT: [[LOAD:%.*]] = load i8, i8 addrspace(4)* inttoptr (i64 128 to i8 addrspace(4)*), align 4
; CHECK-NEXT: store i8 [[LOAD]], i8 addrspace(1)* undef, align 1
; CHECK-NEXT: ret void
;
%load = load i8, i8 addrspace(4)* inttoptr (i64 128 to i8 addrspace(4)*), align 1
store i8 %load, i8 addrspace(1)* undef
ret void
}