[M68k][AsmParser] Fix invalid register name parsing logics

[myhsu]

Summary

Adjust sanity check in register parsing function to allow register name with more than 2 characters (e.g. ccr).

[ricky26]

llvm/lib/Target/M68k/AsmParser/M68kAsmParser.cpp

489

It might be simpler to pull out CCR for now. Otherwise this will cause some invalid register names to be parsed as valid %a0q for example would be parsed as A0 (the third character would be ignored).

A better solution might be to remove this check and in the switch cases check the name length.

I recognise this is due to my error!

[myhsu]

Removing corresponding legacy test in the test/CodeGen/M68k/Encoding folder

[myhsu]

llvm/lib/Target/M68k/AsmParser/M68kAsmParser.cpp

489

Good point. Will do.
Although when we're going to support register with size suffix (e.g. %a0.l) we still need to handle more general cases (because AsmLexer will lex "a0.l" as a single identifier albeit there is a AsmToken::Dot token) but I think it's trivial to change.

[myhsu]

Handle CCR register's name as special case

[ricky26]

LGTM

llvm/lib/Target/M68k/AsmParser/M68kAsmParser.cpp

489

Agreed. I expected some changes to the register name parsing to be necessary. 😄

[jrtc27]

llvm/test/MC/M68k/Data/Classes/MxMoveCCR.s

1–16

Keep your tests minimal please, no unnecessary crud

[myhsu]

llvm/test/MC/M68k/Data/Classes/MxMoveCCR.s

1–16

Fixed in: https://reviews.llvm.org/rGf6d7fc801b4a513a5d5e04762e0e4c71414ae5ef

llvm/lib/Target/M68k/AsmParser/M68kAsmParser.cpp

unsigned M68kAsmParser::validateTargetOperandClass(MCParsedAsmOperand &Op,
 
   return Match_InvalidOperand;
 }
 
 bool M68kAsmParser::parseRegisterName(unsigned &RegNo, SMLoc Loc,
                                       StringRef RegisterName) {
   auto RegisterNameLower = RegisterName.lower();
 
+  // CCR register
+  if (RegisterNameLower == "ccr") {
+    RegNo = M68k::CCR;
+    return true;
+  }
+
   // Parse simple general-purpose registers.
   if (RegisterNameLower.size() == 2) {
     static unsigned RegistersByIndex[] = {
         M68k::D0, M68k::D1, M68k::D2, M68k::D3, M68k::D4, M68k::D5,
         M68k::D6, M68k::D7, M68k::A0, M68k::A1, M68k::A2, M68k::A3,
         M68k::A4, M68k::A5, M68k::A6, M68k::SP,
     };
 
     switch (RegisterNameLower[0]) {
     case 'd':
     case 'a': {
       if (isdigit(RegisterNameLower[1])) {
         unsigned IndexOffset = (RegisterNameLower[0] == 'a') ? 8 : 0;
         unsigned RegIndex = (unsigned)(RegisterNameLower[1] - '0');
         if (RegIndex < 8) {
           RegNo = RegistersByIndex[IndexOffset + RegIndex];
           return true;
         }
       }
       break;
     }
 
-    case 'c':
-      if (RegisterNameLower[1] == 'c' && RegisterNameLower[2] == 'r') {
-        RegNo = M68k::CCR;
-        return true;
-      }
-      break;
-
     case 's':
       if (RegisterNameLower[1] == 'p') {
         RegNo = M68k::SP;
         return true;
       } else if (RegisterNameLower[1] == 'r') {
         RegNo = M68k::SR;
         return true;
       }

llvm/test/CodeGen/M68k/Encoding/Data/Classes/MxMoveCCR.mir

-# RUN: llc %s -mtriple=m68k -start-after=prologepilog -O0 -filetype=obj -o - \
-# RUN:   | extract-section .text \
-# RUN:   | FileCheck %s -check-prefixes=MOV16CD,MOV16DC
-
-#------------------------------------------------------------------------------
-# MxMoveToCCR and MxMoveFromCCR load/store condition flag register
-#------------------------------------------------------------------------------
-
---- # To CCR
-#               ---------------------------------------+-----------+-----------
-#                F   E   D   C   B   A   9   8   7   6 | 5   4   3 | 2   1   0
-#               ---------------------------------------+-----------+-----------
-#                0   1   0   0   0   1   0   0   1   1 |    MODE   |    REG
-#               ---------------------------------------+-----------+-----------
-# MOV16CD:       0   1   0   0   0   1   0   0 . 1   1   0   0   0   0   0   1
-name: MxMoveToCCR
-body: |
-  bb.0:
-     $ccr = MOV16cd $wd1, implicit-def $ccr
-
-...
---- # From CCR
-#               ---------------------------------------+-----------+-----------
-#                F   E   D   C   B   A   9   8   7   6 | 5   4   3 | 2   1   0
-#               ---------------------------------------+-----------+-----------
-#                0   1   0   0   0   0   1   0   1   1 |    MODE   |    REG
-#               ---------------------------------------+-----------+-----------
-# MOV16DC-SAME:  0   1   0   0   0   0   1   0 . 1   1   0   0   0   0   0   1
-name: MxMoveFromCCR
-body: |
-  bb.0:
-     $wd1 = MOV16dc $ccr, implicit $ccr
-
-...

llvm/test/MC/M68k/Data/Classes/MxMoveCCR.s

+; RUN: llvm-mc -triple=m68k -show-encoding %s | FileCheck %s
+  .text
+  .globl  MxMoveToCCR
+; CHECK-LABEL: MxMoveToCCR:
+MxMoveToCCR:
+  ; CHECK:      move.w  %d1, %ccr
+  ; CHECK-SAME: encoding: [0x44,0xc1]
+  move.w  %d1, %ccr
+
+  .globl  MxMoveFromCCR
+; CHECK-LABEL: MxMoveFromCCR:
+MxMoveFromCCR:
+  ; CHECK:      move.w  %ccr, %d1
+  ; CHECK-SAME: encoding: [0x42,0xc1]
+  move.w  %ccr, %d1
+