[mlir][docs] Fix minor typos in vector dialect docs

[hasheddan]

Summary

Updates a minor typo in vector dialect documentation.

[aartbik]

Just curious, will you submit this, or, if you have no submission privileges yet, do you want me to submit this?

[hasheddan]

@aartbik I do not have commit access, so I believe I will need you to submit the patch. Thanks!

[aartbik]

In D101203#2769167, @hasheddan wrote:

@aartbik I do not have commit access, so I believe I will need you to submit the patch. Thanks!

No problem (but for future reference, please ask the reviewer that explicitly, it is not the standard way of doing things ;-)

mlir/docs/Dialects/Vector.md

 tests](https://github.com/llvm/llvm-project/blob/main/mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir)
 are available for the `LLVM` target starting from the Virtual Vector Level.
 
 ## Rationale
 ### Hardware as `vector` Machines of Minimum Granularity
 
 Higher-dimensional `vector`s are ubiquitous in modern HPC hardware. One way to
 think about Generic Retargetable `vector`-Level Dialect is that it operates on
-`vector` types that are a multiples of a "good" `vector` size so the HW can
+`vector` types that are multiples of a "good" `vector` size so the HW can
 efficiently implement a set of high-level primitives
 (e.g. `vector<8x8x8x16xf32>` when HW `vector` size is say `vector<4x8xf32>`).
 
 Some notable `vector` sizes of interest include:
 
 1. CPU: `vector<HW_vector_size * k>`,  `vector<core_count * k’ x
 HW_vector_size * k>` and  `vector<socket_count x core_count * k’ x
 HW_vector_size * k>`