This is an archive of the discontinued LLVM Phabricator instance.

[PowerPC] Add missing negate for VPERMXOR on little endian subtargets
ClosedPublic

Authored by nemanjai on Jan 19 2021, 2:28 PM.

Details

Summary

This intrinsic is supposed to have the permute control vector complemented on little endian systems (as the ABI specifies and GCC implements). With the current code gen, the result vector is byte-reversed.

Diff Detail

Event Timeline

nemanjai created this revision.Jan 19 2021, 2:28 PM
nemanjai requested review of this revision.Jan 19 2021, 2:28 PM
Herald added a project: Restricted Project. · View Herald TranscriptJan 19 2021, 2:28 PM
nemanjai updated this revision to Diff 317700.Jan 19 2021, 2:43 PM

Fixed the inadvertently reversed operands in the instruction definition.

saghir accepted this revision.Jan 20 2021, 12:15 AM
saghir added a subscriber: saghir.

LGTM.

This revision is now accepted and ready to land.Jan 20 2021, 12:15 AM
nemanjai added inline comments.Jan 20 2021, 4:31 AM
llvm/lib/Target/PowerPC/PPCInstrVSX.td
2425

s/system/subtargets

NeHuang accepted this revision as: NeHuang.Jan 20 2021, 8:00 AM
NeHuang added a subscriber: NeHuang.

LGTM

NeHuang added inline comments.Jan 20 2021, 8:09 AM
llvm/test/CodeGen/PowerPC/crypto_bifs.ll
2

nit: Is it necessary to add "--check-prefix=CHECK" in line 2 and line 6?

amyk accepted this revision as: amyk.Jan 21 2021, 3:41 PM
amyk added a subscriber: amyk.

Also LGTM.

llvm/lib/Target/PowerPC/PPCInstrVSX.td
2426

nit: Maybe add the new predicates in the Predicate combinations available comment? :)

This revision was landed with ongoing or failed builds.Jan 25 2021, 10:24 AM
This revision was automatically updated to reflect the committed changes.