[UpdateTestChecks] Fix PowerPC RE to support AIX assembly

[qiucf]

Summary

Current update_llc_test_checks.py cannot generate checks for AIX (powerpc64-ibm-aix-xcoff) properly. Assembly generated is little bit different from Linux:

AIX:

	.align	2                               # -- Begin function powf_f32_fast025
L..CPI0_0:
	.vbyte	4, 0x3e800000                   # float 0.25
	.csect .text[PR],2
	.globl	powf_f32_fast025[DS]
	.globl	.powf_f32_fast025
	.align	2
	.csect powf_f32_fast025[DS],3
	.vbyte	8, .powf_f32_fast025            # @powf_f32_fast025
	.vbyte	8, TOC[TC0]
	.vbyte	8, 0
	.csect .text[PR],2
.powf_f32_fast025:
# %bb.0:                                # %entry
	mflr 0
	std 0, 16(1)
	stdu 1, -112(1)
	ld 3, L..C0(2)
	lfs 2, 0(3)
	bl .powf[PR]
	nop
	addi 1, 1, 112
	ld 0, 16(1)
	mtlr 0
	blr
L..powf_f32_fast0250:
	.vbyte	4, 0x00000000                   # Traceback table begin
	.byte	0x00                            # Version = 0
	.byte	0x09                            # Language = CPlusPlus
	.byte	0x22                            # -IsGlobaLinkage, -IsOutOfLineEpilogOrPrologue
                                        # +HasTraceBackTableOffset, -IsInternalProcedure
                                        # -HasControlledStorage, -IsTOCless
                                        # +IsFloatingPointPresent
                                        # -IsFloatingPointOperationLogOrAbortEnabled
	.byte	0x41                            # -IsInterruptHandler, +IsFunctionNamePresent, -IsAllocaUsed
                                        # OnConditionDirective = 0, -IsCRSaved, +IsLRSaved
	.byte	0x80                            # +IsBackChainStored, -IsFixup, NumOfFPRsSaved = 0
	.byte	0x00                            # -HasVectorInfo, -HasExtensionTable, NumOfGPRsSaved = 0
	.byte	0x00                            # NumberOfFixedParms = 0
	.byte	0x03                            # NumberOfFPParms = 1, +HasParmsOnStack
	.vbyte	4, 0x80000000                   # Parameter type = f
	.vbyte	4, L..powf_f32_fast0250-.powf_f32_fast025 # Function size
	.vbyte	2, 0x0010                       # Function name len = 16
	.byte	'p,'o,'w,'f,'_,'f,'3,'2,'_,'f,'a,'s,'t,'0,'2,'5 # Function Name
                                        # -- End function

Linux:

	.p2align	2                               # -- Begin function powf_f32_fast025
.LCPI0_0:
	.long	0x3e800000                      # float 0.25
	.text
	.globl	powf_f32_fast025
	.p2align	2
	.type	powf_f32_fast025,@function
	.section	.opd,"aw",@progbits
powf_f32_fast025:                       # @powf_f32_fast025
	.p2align	3
	.quad	.Lfunc_begin0
	.quad	.TOC.@tocbase
	.quad	0
	.text
.Lfunc_begin0:
	.cfi_startproc
# %bb.0:                                # %entry
	mflr 0
	std 0, 16(1)
	stdu 1, -112(1)
	.cfi_def_cfa_offset 112
	.cfi_offset lr, 16
	addis 3, 2, .LCPI0_0@toc@ha
	lfs 2, .LCPI0_0@toc@l(3)
	bl powf
	nop
	addi 1, 1, 112
	ld 0, 16(1)
	mtlr 0
	blr
	.long	0
	.quad	0
.Lfunc_end0:
	.size	powf_f32_fast025, .Lfunc_end0-.Lfunc_begin0
	.cfi_endproc
                                        # -- End function

This patch will fix that.

[MaskRay]

Please add a test under test/tools/UpdateTestChecks/update_llc_test_checks/

[steven.zhang]

Yes, test is missing as MaskRay mentioned. You'd better update one PowerPC test at least so that, we can see what it looks like.

[qiucf]

Update with tests

[MaskRay]

Looks great!

[steven.zhang]

Also LGTM.

llvm/test/CodeGen/PowerPC/aix-lr.ll

+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -verify-machineinstrs -mtriple powerpc-ibm-aix-xcoff < %s | \
 ; RUN: FileCheck --check-prefix=32BIT %s
 
 ; RUN: llc -verify-machineinstrs -mtriple powerpc64-ibm-aix-xcoff < %s | \
 ; RUN: FileCheck --check-prefix=64BIT %s
 
 define void @bar() {
+; 32BIT-LABEL: bar:
+; 32BIT:       # %bb.0: # %entry
+; 32BIT-NEXT:    mflr 0
+; 32BIT-NEXT:    stw 0, 8(1)
+; 32BIT-NEXT:    stwu 1, -64(1)
+; 32BIT-NEXT:    bl .foo[PR]
+; 32BIT-NEXT:    nop
+; 32BIT-NEXT:    addi 1, 1, 64
+; 32BIT-NEXT:    lwz 0, 8(1)
+; 32BIT-NEXT:    mtlr 0
+; 32BIT-NEXT:    blr
+;
+; 64BIT-LABEL: bar:
+; 64BIT:       # %bb.0: # %entry
+; 64BIT-NEXT:    mflr 0
+; 64BIT-NEXT:    std 0, 16(1)
+; 64BIT-NEXT:    stdu 1, -112(1)
+; 64BIT-NEXT:    bl .foo[PR]
+; 64BIT-NEXT:    nop
+; 64BIT-NEXT:    addi 1, 1, 112
+; 64BIT-NEXT:    ld 0, 16(1)
+; 64BIT-NEXT:    mtlr 0
+; 64BIT-NEXT:    blr
 entry:
 
-; 32BIT: mflr 0
-; 32BIT: stw 0, 8(1)
-; 32BIT: stwu 1, -64(1)
-; 32BIT: bl .foo
-; 32BIT: nop
-; 32BIT: addi 1, 1, 64
-; 32BIT: lwz 0, 8(1)
-; 32BIT: mtlr 0
-
-; 64BIT: mflr 0
-; 64BIT: std 0, 16(1)
-; 64BIT: stdu 1, -112(1)
-; 64BIT: bl .foo
-; 64BIT: nop
-; 64BIT: addi 1, 1, 112
-; 64BIT: ld 0, 16(1)
-; 64BIT: mtlr 0
+
 
   call void bitcast (void (...)* @foo to void ()*)()
   ret void
 }
 
 declare void @foo(...)

llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/ppc_generated_funcs.ll

 ; RUN: llc -enable-machine-outliner -mtriple=ppc32-unknown-linux < %s | FileCheck %s
+; RUN: llc -enable-machine-outliner -mtriple=powerpc-ibm-aix-xcoff < %s | FileCheck %s -check-prefix=AIX
 ;
 ; NOTE: Machine outliner doesn't run.
 @x = global i32 0, align 4
 
 define dso_local i32 @check_boundaries() #0 {
   %1 = alloca i32, align 4
   %2 = alloca i32, align 4
   %3 = alloca i32, align 4

llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/ppc_generated_funcs.ll.generated.expected

 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --include-generated-funcs
 ; RUN: llc -enable-machine-outliner -mtriple=ppc32-unknown-linux < %s | FileCheck %s
+; RUN: llc -enable-machine-outliner -mtriple=powerpc-ibm-aix-xcoff < %s | FileCheck %s -check-prefix=AIX
 ; NOTE: Machine outliner doesn't run.
 @x = global i32 0, align 4
 
 define dso_local i32 @check_boundaries() #0 {
   %1 = alloca i32, align 4
   %2 = alloca i32, align 4
   %3 = alloca i32, align 4
   %4 = alloca i32, align 4

 ; CHECK-NEXT:    stw 3, 20(31)
 ; CHECK-NEXT:    li 3, 0
 ; CHECK-NEXT:    stw 4, 16(31)
 ; CHECK-NEXT:    stw 5, 12(31)
 ; CHECK-NEXT:    stw 6, 8(31)
 ; CHECK-NEXT:    lwz 31, 28(1)
 ; CHECK-NEXT:    addi 1, 1, 32
 ; CHECK-NEXT:    blr
+;
+; AIX-LABEL: check_boundaries:
+; AIX:       # %bb.0:
+; AIX-NEXT:    stw 31, -4(1)
+; AIX-NEXT:    stwu 1, -48(1)
+; AIX-NEXT:    mr 31, 1
+; AIX-NEXT:    li 4, 0
+; AIX-NEXT:    li 3, 1
+; AIX-NEXT:    stw 4, 40(31)
+; AIX-NEXT:    li 4, 2
+; AIX-NEXT:    li 5, 3
+; AIX-NEXT:    li 6, 4
+; AIX-NEXT:    cmplwi 3, 0
+; AIX-NEXT:    stw 3, 36(31)
+; AIX-NEXT:    stw 4, 32(31)
+; AIX-NEXT:    stw 5, 28(31)
+; AIX-NEXT:    stw 6, 24(31)
+; AIX-NEXT:    beq 0, L..BB0_2
+; AIX-NEXT:  # %bb.1:
+; AIX-NEXT:    stw 3, 28(31)
+; AIX-NEXT:    b L..BB0_3
+; AIX-NEXT:  L..BB0_2:
+; AIX-NEXT:    stw 3, 36(31)
+; AIX-NEXT:    stw 4, 32(31)
+; AIX-NEXT:    stw 5, 28(31)
+; AIX-NEXT:    stw 6, 24(31)
+; AIX-NEXT:  L..BB0_3:
+; AIX-NEXT:    li 3, 0
+; AIX-NEXT:    addi 1, 1, 48
+; AIX-NEXT:    lwz 31, -4(1)
+; AIX-NEXT:    blr
+;
+; AIX-LABEL: main:
+; AIX:       # %bb.0:
+; AIX-NEXT:    stw 31, -4(1)
+; AIX-NEXT:    stwu 1, -48(1)
+; AIX-NEXT:    lwz 4, L..C0(2)
+; AIX-NEXT:    mr 31, 1
+; AIX-NEXT:    li 3, 0
+; AIX-NEXT:    stw 3, 40(31)
+; AIX-NEXT:    li 3, 1
+; AIX-NEXT:    li 5, 2
+; AIX-NEXT:    li 6, 3
+; AIX-NEXT:    li 7, 4
+; AIX-NEXT:    stw 3, 36(31)
+; AIX-NEXT:    stw 5, 32(31)
+; AIX-NEXT:    stw 6, 28(31)
+; AIX-NEXT:    stw 7, 24(31)
+; AIX-NEXT:    stw 3, 0(4)
+; AIX-NEXT:    #APP
+; AIX-NEXT:    #NO_APP
+; AIX-NEXT:    stw 3, 36(31)
+; AIX-NEXT:    li 3, 0
+; AIX-NEXT:    stw 5, 32(31)
+; AIX-NEXT:    stw 6, 28(31)
+; AIX-NEXT:    stw 7, 24(31)
+; AIX-NEXT:    addi 1, 1, 48
+; AIX-NEXT:    lwz 31, -4(1)
+; AIX-NEXT:    blr

llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/ppc_generated_funcs.ll.nogenerated.expected

 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -enable-machine-outliner -mtriple=ppc32-unknown-linux < %s | FileCheck %s
+; RUN: llc -enable-machine-outliner -mtriple=powerpc-ibm-aix-xcoff < %s | FileCheck %s -check-prefix=AIX
 ;
 ; NOTE: Machine outliner doesn't run.
 @x = global i32 0, align 4
 
 define dso_local i32 @check_boundaries() #0 {
 ; CHECK-LABEL: check_boundaries:
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    stwu 1, -32(1)

 ; CHECK-NEXT:    stw 4, 16(31)
 ; CHECK-NEXT:    stw 5, 12(31)
 ; CHECK-NEXT:    stw 6, 8(31)
 ; CHECK-NEXT:  .LBB0_3:
 ; CHECK-NEXT:    li 3, 0
 ; CHECK-NEXT:    lwz 31, 28(1)
 ; CHECK-NEXT:    addi 1, 1, 32
 ; CHECK-NEXT:    blr
+;
+; AIX-LABEL: check_boundaries:
+; AIX:       # %bb.0:
+; AIX-NEXT:    stw 31, -4(1)
+; AIX-NEXT:    stwu 1, -48(1)
+; AIX-NEXT:    mr 31, 1
+; AIX-NEXT:    li 4, 0
+; AIX-NEXT:    li 3, 1
+; AIX-NEXT:    stw 4, 40(31)
+; AIX-NEXT:    li 4, 2
+; AIX-NEXT:    li 5, 3
+; AIX-NEXT:    li 6, 4
+; AIX-NEXT:    cmplwi 3, 0
+; AIX-NEXT:    stw 3, 36(31)
+; AIX-NEXT:    stw 4, 32(31)
+; AIX-NEXT:    stw 5, 28(31)
+; AIX-NEXT:    stw 6, 24(31)
+; AIX-NEXT:    beq 0, L..BB0_2
+; AIX-NEXT:  # %bb.1:
+; AIX-NEXT:    stw 3, 28(31)
+; AIX-NEXT:    b L..BB0_3
+; AIX-NEXT:  L..BB0_2:
+; AIX-NEXT:    stw 3, 36(31)
+; AIX-NEXT:    stw 4, 32(31)
+; AIX-NEXT:    stw 5, 28(31)
+; AIX-NEXT:    stw 6, 24(31)
+; AIX-NEXT:  L..BB0_3:
+; AIX-NEXT:    li 3, 0
+; AIX-NEXT:    addi 1, 1, 48
+; AIX-NEXT:    lwz 31, -4(1)
+; AIX-NEXT:    blr
   %1 = alloca i32, align 4
   %2 = alloca i32, align 4
   %3 = alloca i32, align 4
   %4 = alloca i32, align 4
   %5 = alloca i32, align 4
   store i32 0, i32* %1, align 4
   store i32 0, i32* %2, align 4
   %6 = load i32, i32* %2, align 4

 ; CHECK-NEXT:    stw 3, 20(31)
 ; CHECK-NEXT:    li 3, 0
 ; CHECK-NEXT:    stw 4, 16(31)
 ; CHECK-NEXT:    stw 5, 12(31)
 ; CHECK-NEXT:    stw 6, 8(31)
 ; CHECK-NEXT:    lwz 31, 28(1)
 ; CHECK-NEXT:    addi 1, 1, 32
 ; CHECK-NEXT:    blr
+;
+; AIX-LABEL: main:
+; AIX:       # %bb.0:
+; AIX-NEXT:    stw 31, -4(1)
+; AIX-NEXT:    stwu 1, -48(1)
+; AIX-NEXT:    lwz 4, L..C0(2)
+; AIX-NEXT:    mr 31, 1
+; AIX-NEXT:    li 3, 0
+; AIX-NEXT:    stw 3, 40(31)
+; AIX-NEXT:    li 3, 1
+; AIX-NEXT:    li 5, 2
+; AIX-NEXT:    li 6, 3
+; AIX-NEXT:    li 7, 4
+; AIX-NEXT:    stw 3, 36(31)
+; AIX-NEXT:    stw 5, 32(31)
+; AIX-NEXT:    stw 6, 28(31)
+; AIX-NEXT:    stw 7, 24(31)
+; AIX-NEXT:    stw 3, 0(4)
+; AIX-NEXT:    #APP
+; AIX-NEXT:    #NO_APP
+; AIX-NEXT:    stw 3, 36(31)
+; AIX-NEXT:    li 3, 0
+; AIX-NEXT:    stw 5, 32(31)
+; AIX-NEXT:    stw 6, 28(31)
+; AIX-NEXT:    stw 7, 24(31)
+; AIX-NEXT:    addi 1, 1, 48
+; AIX-NEXT:    lwz 31, -4(1)
+; AIX-NEXT:    blr
   %1 = alloca i32, align 4
   %2 = alloca i32, align 4
   %3 = alloca i32, align 4
   %4 = alloca i32, align 4
   %5 = alloca i32, align 4
 
   store i32 0, i32* %1, align 4
   store i32 0, i32* @x, align 4

llvm/utils/UpdateTestChecks/asm.py

 
 ASM_FUNCTION_MSP430_RE = re.compile(
     r'^_?(?P<func>[^:]+):[ \t]*;+[ \t]*@"?(?P=func)"?\n[^:]*?'
     r'(?P<body>.*?)\n'
     r'(\$|\.L)func_end[0-9]+:\n',             # $func_end0:
     flags=(re.M | re.S))
 
 ASM_FUNCTION_PPC_RE = re.compile(
-    r'^_?(?P<func>[^:]+):[ \t]*#+[ \t]*@"?(?P=func)"?\n'
+    r'#[ \-\t]*Begin function (?P<func>[^.:]+)\n'
     r'.*?'
-    r'\.Lfunc_begin[0-9]+:\n'
-    r'(?:[ \t]+.cfi_startproc\n)?'
-    r'(?:\.Lfunc_[gl]ep[0-9]+:\n(?:[ \t]+.*?\n)*)*'
+    r'^[_.]?(?P=func):(?:[ \t]*#+[ \t]*@"?(?P=func)"?)?\n'
+    r'(?:^[^#]*\n)*'
     r'(?P<body>.*?)\n'
     # This list is incomplete
-    r'(?:^[ \t]*(?:\.long[ \t]+[^\n]+|\.quad[ \t]+[^\n]+)\n)*'
-    r'.Lfunc_end[0-9]+:\n',
+    r'(?:^[ \t]*(?:\.(?:long|quad|v?byte)[ \t]+[^\n]+)\n)*'
+    r'(?:\.Lfunc_end|L\.\.(?P=func))[0-9]+:\n',
     flags=(re.M | re.S))
 
 ASM_FUNCTION_RISCV_RE = re.compile(
     r'^_?(?P<func>[^:]+):[ \t]*#+[ \t]*@"?(?P=func)"?\n'
     r'(?:\s*\.?L(?P=func)\$local:\n)?'  # optional .L<func>$local: due to -fno-semantic-interposition
     r'(?:\s*\.?Lfunc_begin[^:\n]*:\n)?[^:]*?'
     r'(?P<body>^##?[ \t]+[^:]+:.*?)\s*'
     r'.Lfunc_end[0-9]+:\n',