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[Machinesink] add more profitable pattern if target bb register pressure is not too high
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Authored by shchenz on Sep 22 2020, 6:09 PM.

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qcolombet
MatzeB
efriedma
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rGf645cea8f63e: [MachineSink] add more profitable pattern.
Summary

This is split from https://reviews.llvm.org/D86925

Per @qcolombet comments, if the instruction's operand is defined inside the loop, we should not treat it as profitable directly in D86925. https://reviews.llvm.org/D86925#2271795

This patch handles this pattern for some cases. If the operand is defined inside the loop, but the target bb's register pressure is not too high, we still treat this sinking as profitable. Because move the def down will make some variables live interval smaller.

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Event Timeline

shchenz created this revision.Sep 22 2020, 6:09 PM
shchenz requested review of this revision.Sep 22 2020, 6:09 PM

gentle ping

gentle ping

gentle ping

gentle ping

qcolombet accepted this revision.Wed, Nov 4, 9:46 AM
This revision is now accepted and ready to land.Wed, Nov 4, 9:46 AM
This revision was landed with ongoing or failed builds.Wed, Nov 4, 8:11 PM
This revision was automatically updated to reflect the committed changes.
dmgreen added a subscriber: dmgreen.Fri, Nov 6, 7:13 AM

Hi, this is regressing a few internal workloads (physics simulations, AArch64) by a few percent. Did you do any performance measurements for this change?

shchenz added a comment.EditedFri, Nov 6, 5:32 PM

this is regressing a few internal workloads (physics simulations, AArch64) by a few percent. Did you do any performance measurements for this change?

Yes, on PowerPC, I run this patch together with https://reviews.llvm.org/D86864 for SPEC CPU2017, I saw some little improvements, no reg found. It would be great if you can provide me with a narrow down file/function, so I can check what's wrong here^^