[AArch64] Don't store available subtarget features in AArch64SysReg::SysRegMapper.

[vsukharev]

Summary

Based on discussion at http://reviews.llvm.org/D8496.
Unfortunately, that webdiscussion does not contain all messages from email chat. It seems a bug for me.
Long story short: subtarget features must not be a part of the target machine. So, it needs not to be stored in instance, but provided each time fromString/toString are called

It's a follow-up to http://reviews.llvm.org/rL207742

[jmolloy]

Hi Vlad,

Thanks for doing this change. This looks fine to me, and appears to change the API to be more explicitly subtarget-focussed.

Cheers,

James

llvm/trunk/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp

 AArch64AsmParser::tryParseSysReg(OperandVector &Operands) {
   MCAsmParser &Parser = getParser();
   const AsmToken &Tok = Parser.getTok();
 
   if (Tok.isNot(AsmToken::Identifier))
     return MatchOperand_NoMatch;
 
   bool IsKnown;
-  auto MRSMapper = AArch64SysReg::MRSMapper(STI.getFeatureBits());
-  uint32_t MRSReg = MRSMapper.fromString(Tok.getString(), IsKnown);
+  auto MRSMapper = AArch64SysReg::MRSMapper();
+  uint32_t MRSReg = MRSMapper.fromString(Tok.getString(), STI.getFeatureBits(),
+                                         IsKnown);
   assert(IsKnown == (MRSReg != -1U) &&
          "register should be -1 if and only if it's unknown");
 
-  auto MSRMapper = AArch64SysReg::MSRMapper(STI.getFeatureBits());
-  uint32_t MSRReg = MSRMapper.fromString(Tok.getString(), IsKnown);
+  auto MSRMapper = AArch64SysReg::MSRMapper();
+  uint32_t MSRReg = MSRMapper.fromString(Tok.getString(), STI.getFeatureBits(),
+                                         IsKnown);
   assert(IsKnown == (MSRReg != -1U) &&
          "register should be -1 if and only if it's unknown");
 
   auto PStateMapper = AArch64PState::PStateMapper();
   uint32_t PStateField = PStateMapper.fromString(Tok.getString(), IsKnown);
   assert(IsKnown == (PStateField != -1U) &&
          "register should be -1 if and only if it's unknown");
 

llvm/trunk/lib/Target/AArch64/InstPrinter/AArch64InstPrinter.cpp

void AArch64InstPrinter::printBarrierOption(const MCInst *MI, unsigned OpNo,
   else
     O << "#" << Val;
 }
 
 void AArch64InstPrinter::printMRSSystemRegister(const MCInst *MI, unsigned OpNo,
                                                 raw_ostream &O) {
   unsigned Val = MI->getOperand(OpNo).getImm();
 
-  auto Mapper = AArch64SysReg::MRSMapper(getAvailableFeatures());
-  std::string Name = Mapper.toString(Val);
+  auto Mapper = AArch64SysReg::MRSMapper();
+  std::string Name = Mapper.toString(Val, getAvailableFeatures());
 
   O << StringRef(Name).upper();
 }
 
 void AArch64InstPrinter::printMSRSystemRegister(const MCInst *MI, unsigned OpNo,
                                                 raw_ostream &O) {
   unsigned Val = MI->getOperand(OpNo).getImm();
 
-  auto Mapper = AArch64SysReg::MSRMapper(getAvailableFeatures());
-  std::string Name = Mapper.toString(Val);
+  auto Mapper = AArch64SysReg::MSRMapper();
+  std::string Name = Mapper.toString(Val, getAvailableFeatures());
 
   O << StringRef(Name).upper();
 }
 
 void AArch64InstPrinter::printSystemPStateField(const MCInst *MI, unsigned OpNo,
                                                 raw_ostream &O) {
   unsigned Val = MI->getOperand(OpNo).getImm();
 

llvm/trunk/lib/Target/AArch64/Utils/AArch64BaseInfo.h

namespace AArch64SysReg {
   // burdening the common AArch64NamedImmMapper with abstractions only needed in
   // this one case.
   struct SysRegMapper {
     static const AArch64NamedImmMapper::Mapping SysRegMappings[];
     static const AArch64NamedImmMapper::Mapping CycloneSysRegMappings[];
 
     const AArch64NamedImmMapper::Mapping *InstMappings;
     size_t NumInstMappings;
-    uint64_t FeatureBits;
 
-    SysRegMapper(uint64_t FeatureBits) : FeatureBits(FeatureBits) { }
-    uint32_t fromString(StringRef Name, bool &Valid) const;
-    std::string toString(uint32_t Bits) const;
+    SysRegMapper() { }
+    uint32_t fromString(StringRef Name, uint64_t FeatureBits, bool &Valid) const;
+    std::string toString(uint32_t Bits, uint64_t FeatureBits) const;
   };
 
   struct MSRMapper : SysRegMapper {
     static const AArch64NamedImmMapper::Mapping MSRMappings[];
-    MSRMapper(uint64_t FeatureBits);
+    MSRMapper();
   };
 
   struct MRSMapper : SysRegMapper {
     static const AArch64NamedImmMapper::Mapping MRSMappings[];
-    MRSMapper(uint64_t FeatureBits);
+    MRSMapper();
   };
 
   uint32_t ParseGenericRegister(StringRef Name, bool &Valid);
 }
 
 namespace AArch64TLBI {
   enum TLBIValues {
     Invalid = -1,          // Op0 Op1  CRn   CRm   Op2

llvm/trunk/lib/Target/AArch64/Utils/AArch64BaseInfo.cpp

const AArch64NamedImmMapper::Mapping AArch64SysReg::MRSMapper::MRSMappings[] = {
   {"icc_hppir1_el1", ICC_HPPIR1_EL1},
   {"icc_hppir0_el1", ICC_HPPIR0_EL1},
   {"icc_rpr_el1", ICC_RPR_EL1},
   {"ich_vtr_el2", ICH_VTR_EL2},
   {"ich_eisr_el2", ICH_EISR_EL2},
   {"ich_elsr_el2", ICH_ELSR_EL2}
 };
 
-AArch64SysReg::MRSMapper::MRSMapper(uint64_t FeatureBits)
-  : SysRegMapper(FeatureBits) {
+AArch64SysReg::MRSMapper::MRSMapper() {
     InstMappings = &MRSMappings[0];
     NumInstMappings = llvm::array_lengthof(MRSMappings);
 }
 
 const AArch64NamedImmMapper::Mapping AArch64SysReg::MSRMapper::MSRMappings[] = {
   {"dbgdtrtx_el0", DBGDTRTX_EL0},
   {"oslar_el1", OSLAR_EL1},
   {"pmswinc_el0", PMSWINC_EL0},
 
   // Trace registers
   {"trcoslar", TRCOSLAR},
   {"trclar", TRCLAR},
 
   // GICv3 registers
   {"icc_eoir1_el1", ICC_EOIR1_EL1},
   {"icc_eoir0_el1", ICC_EOIR0_EL1},
   {"icc_dir_el1", ICC_DIR_EL1},
   {"icc_sgi1r_el1", ICC_SGI1R_EL1},
   {"icc_asgi1r_el1", ICC_ASGI1R_EL1},
   {"icc_sgi0r_el1", ICC_SGI0R_EL1}
 };
 
-AArch64SysReg::MSRMapper::MSRMapper(uint64_t FeatureBits)
-  : SysRegMapper(FeatureBits) {
+AArch64SysReg::MSRMapper::MSRMapper() {
     InstMappings = &MSRMappings[0];
     NumInstMappings = llvm::array_lengthof(MSRMappings);
 }
 
 
 const AArch64NamedImmMapper::Mapping AArch64SysReg::SysRegMapper::SysRegMappings[] = {
   {"osdtrrx_el1", OSDTRRX_EL1},
   {"osdtrtx_el1",  OSDTRTX_EL1},

 };
 
 const AArch64NamedImmMapper::Mapping
 AArch64SysReg::SysRegMapper::CycloneSysRegMappings[] = {
   {"cpm_ioacc_ctl_el3", CPM_IOACC_CTL_EL3}
 };
 
 uint32_t
-AArch64SysReg::SysRegMapper::fromString(StringRef Name, bool &Valid) const {
+AArch64SysReg::SysRegMapper::fromString(StringRef Name, uint64_t FeatureBits, 
+                                        bool &Valid) const {
   std::string NameLower = Name.lower();
 
   // First search the registers shared by all
   for (unsigned i = 0; i < array_lengthof(SysRegMappings); ++i) {
     if (SysRegMappings[i].Name == NameLower) {
       Valid = true;
       return SysRegMappings[i].Value;
     }
AArch64SysReg::SysRegMapper::fromString(StringRef Name, uint64_t FeatureBits,
   Ops[5].getAsInteger(10, Op2);
   Bits = (Op0 << 14) | (Op1 << 11) | (CRn << 7) | (CRm << 3) | Op2;
 
   Valid = true;
   return Bits;
 }
 
 std::string
-AArch64SysReg::SysRegMapper::toString(uint32_t Bits) const {
+AArch64SysReg::SysRegMapper::toString(uint32_t Bits, uint64_t FeatureBits) const {
   // First search the registers shared by all
   for (unsigned i = 0; i < array_lengthof(SysRegMappings); ++i) {
     if (SysRegMappings[i].Value == Bits) {
       return SysRegMappings[i].Name;
     }
   }
 
   // Next search for target specific registers