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[mlir] [VectorOps] Add masked load/store operations to Vector dialect
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Authored by aartbik on Aug 5 2020, 1:39 PM.

Details

Summary

The intrinsics were already supported and vector.transfer_read/write lowered
direclty into these operations. By providing them as individual ops, however,
clients can used them directly, and it opens up progressively lowering transfer
operations at higher levels (rather than direct lowering to LLVM IR as done now).

Diff Detail

Event Timeline

aartbik created this revision.Aug 5 2020, 1:39 PM
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aartbik requested review of this revision.Aug 5 2020, 1:39 PM
aartbik updated this revision to Diff 283378.Aug 5 2020, 1:45 PM

fixed typos

Herald added a project: Restricted Project. · View Herald TranscriptAug 5 2020, 1:45 PM
bkramer accepted this revision.Aug 5 2020, 2:07 PM

lg

mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
174 ↗(On Diff #283379)

Does a GEP without indices actually do something?

This revision is now accepted and ready to land.Aug 5 2020, 2:07 PM
aartbik marked an inline comment as done.Aug 5 2020, 4:44 PM

Thanks!

mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
174 ↗(On Diff #283379)

It is a nop. It seemed a bit cleaner to make all memoperations use a GEPOp, but perhaps I should remove it for the non-index cases (and use the base directly). This part is subject to change anyway, since I plan to general this for the cases not handled above, and move this into core utilities perhaps.

This revision was automatically updated to reflect the committed changes.
aartbik marked an inline comment as done.