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[ARM] Add predicated add reduction patterns
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Authored by dmgreen on Sat, Jul 18, 7:53 AM.

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Summary

Given a vecreduce.add(select(p, x, 0)), we can convert that to a predicated vaddv, as the negative value for the select is the identity value, a zero. That is what this patch does for the vaddv, vaddva, vaddlv and vaddlva instruction, copying the existing patterns to also handle predication through a select.

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Event Timeline

dmgreen created this revision.Sat, Jul 18, 7:53 AM
simon_tatham accepted this revision.Mon, Jul 20, 5:29 AM
This revision is now accepted and ready to land.Mon, Jul 20, 5:29 AM
This revision was automatically updated to reflect the committed changes.