InstCombine: Fold and/or of fcmp into class

[arsenm]

Summary

This is motivated by patterns like !isfinite || zero. The AMDGPU math
libraries have a lot of patterns like this, and I'm trying to fix the
code to be more portable and less dependent on directly calling class
intrinsics.

I believe this is the first place where new is.fpclass calls are
introduced. There are more class-like compares that could be
recognized; this is a set I currently care about plus a few extras.

I swear I posted this before but can't seem to find it

[arsenm]

ping

[foad]

I swear I posted this before but can't seem to find it

It was in the origincal incarnation of https://reviews.llvm.org/D139130?vs=on&id=479367

llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp

1503

Do you need to worry about IsLogicalSelect here? (@nikic, @craig.topper?)

[arsenm]

llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp

1503

I've tried to come up with a case where it mattered and I can't seem to find one

[arsenm]

llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp

1503

I managed to get a case where it's true with fast math flags. Will check what alive2 thinks

[arsenm]

llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp

1503

https://alive2.llvm.org/ce/z/s58K3N is the case, seems to be fine

[arsenm]

add a logical and/or case

[foad]

add a logical and/or case

Thanks. LGTM.

[arsenm]

08f0388711e49de2af54746d2d764d128dace5ce

llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp

if (IsAnd && stripSignOnlyFPOps(LHS0) == stripSignOnlyFPOps(RHS0)) {
     // and (fcmp ord x, 0), (fcmp u* x, inf) -> fcmp o* x, inf
     // and (fcmp ord x, 0), (fcmp u* fabs(x), inf) -> fcmp o* x, inf
     if (Value *Left = matchIsFiniteTest(Builder, LHS, RHS))
       return Left;
     if (Value *Right = matchIsFiniteTest(Builder, RHS, LHS))
       return Right;
   }
 
+  // Turn at least two fcmps with constants into llvm.is.fpclass.
+  //
+  // If we can represent a combined value test with one class call, we can
+  // potentially eliminate 4-6 instructions. If we can represent a test with a
+  // single fcmp with fneg and fabs, that's likely a better canonical form.
+  if (LHS->hasOneUse() && RHS->hasOneUse()) {
+    auto [ClassValRHS, ClassMaskRHS] = fcmpToClassTest(PredR, RHS0, RHS1);
+    if (ClassValRHS) {
+      auto [ClassValLHS, ClassMaskLHS] = fcmpToClassTest(PredL, LHS0, LHS1);
+      if (ClassValLHS == ClassValRHS) {
+        unsigned CombinedMask = IsAnd ? (ClassMaskLHS & ClassMaskRHS)
+                                      : (ClassMaskLHS | ClassMaskRHS);
+        return Builder.CreateIntrinsic(
+            Intrinsic::is_fpclass, {ClassValLHS->getType()},
+            {ClassValLHS, Builder.getInt32(CombinedMask)});
+      }
+    }
+  }
+
   return nullptr;
 }
 
 /// Match an fcmp against a special value that performs a test possible by
 /// llvm.is.fpclass.
 static bool matchIsFPClassLikeFCmp(Value *Op, Value *&ClassVal,
                                    uint64_t &ClassMask) {
   auto *FCmp = dyn_cast<FCmpInst>(Op);

llvm/test/Transforms/InstCombine/and-fcmp.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; RUN: opt < %s -passes=instcombine -S | FileCheck %s
 
 define i1 @PR1738(double %x, double %y) {
 ; CHECK-LABEL: @PR1738(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp ord double [[X:%.*]], [[Y:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[AND:%.*]] = fcmp ord double [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT:    ret i1 [[AND]]
 ;
   %cmp1 = fcmp ord double %x, 0.0
   %cmp2 = fcmp ord double %y, 0.0
   %and = and i1 %cmp1, %cmp2
   ret i1 %and
 }
 
 ; TODO: this can be supported by freezing %y
 define i1 @PR1738_logical(double %x, double %y) {
 ; CHECK-LABEL: @PR1738_logical(
 ; CHECK-NEXT:    [[CMP1:%.*]] = fcmp ord double [[X:%.*]], 0.000000e+00
 ; CHECK-NEXT:    [[CMP2:%.*]] = fcmp ord double [[Y:%.*]], 0.000000e+00
 ; CHECK-NEXT:    [[AND:%.*]] = select i1 [[CMP1]], i1 [[CMP2]], i1 false
 ; CHECK-NEXT:    ret i1 [[AND]]
 ;
   %cmp1 = fcmp ord double %x, 0.0
   %cmp2 = fcmp ord double %y, 0.0
   %and = select i1 %cmp1, i1 %cmp2, i1 false
   ret i1 %and
 }
 
 define i1 @PR1738_logical_noundef(double %x, double noundef %y) {
 ; CHECK-LABEL: @PR1738_logical_noundef(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp ord double [[X:%.*]], [[Y:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[AND:%.*]] = fcmp ord double [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT:    ret i1 [[AND]]
 ;
   %cmp1 = fcmp ord double %x, 0.0
   %cmp2 = fcmp ord double %y, 0.0
   %and = select i1 %cmp1, i1 %cmp2, i1 false
   ret i1 %and
 }
 
 define <2 x i1> @PR1738_vec_undef(<2 x double> %x, <2 x double> %y) {
 ; CHECK-LABEL: @PR1738_vec_undef(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp ord <2 x double> [[X:%.*]], [[Y:%.*]]
-; CHECK-NEXT:    ret <2 x i1> [[TMP1]]
+; CHECK-NEXT:    [[OR:%.*]] = fcmp ord <2 x double> [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT:    ret <2 x i1> [[OR]]
 ;
   %cmp1 = fcmp ord <2 x double> %x, <double 0.0, double undef>
   %cmp2 = fcmp ord <2 x double> %y, <double undef, double 0.0>
   %or = and <2 x i1> %cmp1, %cmp2
   ret <2 x i1> %or
 }
 
 define i1 @PR41069(i1 %z, float %c, float %d) {
;
   %cmp = fcmp ord <2 x float> %a, zeroinitializer
   %cmp1 = fcmp ord <2 x double> %b, zeroinitializer
   %and = and <2 x i1> %cmp, %cmp1
   ret <2 x i1> %and
 }
 
 define i1 @fcmp_ord_nonzero(float %x, float %y) {
 ; CHECK-LABEL: @fcmp_ord_nonzero(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp ord float [[X:%.*]], [[Y:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[AND:%.*]] = fcmp ord float [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT:    ret i1 [[AND]]
 ;
   %cmp1 = fcmp ord float %x, 1.0
   %cmp2 = fcmp ord float %y, 2.0
   %and = and i1 %cmp1, %cmp2
   ret i1 %and
 }
 
 ; TODO: this can be supported by freezing %y
 define i1 @fcmp_ord_nonzero_logical(float %x, float %y) {
 ; CHECK-LABEL: @fcmp_ord_nonzero_logical(
 ; CHECK-NEXT:    [[CMP1:%.*]] = fcmp ord float [[X:%.*]], 0.000000e+00
 ; CHECK-NEXT:    [[CMP2:%.*]] = fcmp ord float [[Y:%.*]], 0.000000e+00
 ; CHECK-NEXT:    [[AND:%.*]] = select i1 [[CMP1]], i1 [[CMP2]], i1 false
 ; CHECK-NEXT:    ret i1 [[AND]]
 ;
   %cmp1 = fcmp ord float %x, 1.0
   %cmp2 = fcmp ord float %y, 2.0
   %and = select i1 %cmp1, i1 %cmp2, i1 false
   ret i1 %and
 }
 
 define <3 x i1> @fcmp_ord_nonzero_vec(<3 x float> %x, <3 x float> %y) {
 ; CHECK-LABEL: @fcmp_ord_nonzero_vec(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp ord <3 x float> [[X:%.*]], [[Y:%.*]]
-; CHECK-NEXT:    ret <3 x i1> [[TMP1]]
+; CHECK-NEXT:    [[AND:%.*]] = fcmp ord <3 x float> [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT:    ret <3 x i1> [[AND]]
 ;
   %cmp1 = fcmp ord <3 x float> %x, <float 1.0, float 2.0, float 3.0>
   %cmp2 = fcmp ord <3 x float> %y, <float 3.0, float 2.0, float 1.0>
   %and = and <3 x i1> %cmp1, %cmp2
   ret <3 x i1> %and
 }
 
 define i1 @auto_gen_0(double %a, double %b) {
;
   %cmp = fcmp fast oeq double %a, %b
   %cmp1 = fcmp fast false double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_2(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_2(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp oeq double %a, %b
   %cmp1 = fcmp oeq double %a, %b
   %retval = and i1 %cmp, %cmp1
   ret i1 %retval
 }
 
 define i1 @auto_gen_2_logical(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_2_logical(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp oeq double %a, %b
   %cmp1 = fcmp oeq double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_2_logical_fmf(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_2_logical_fmf(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp oeq double %a, %b
   %cmp1 = fcmp fast oeq double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_3(double %a, double %b) {
;
   %cmp = fcmp ogt double %a, %b
   %cmp1 = fcmp fast oeq double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_5(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_5(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ogt double %a, %b
   %cmp1 = fcmp ogt double %a, %b
   %retval = and i1 %cmp, %cmp1
   ret i1 %retval
 }
 
 define i1 @auto_gen_5_logical(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_5_logical(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ogt double %a, %b
   %cmp1 = fcmp ogt double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_5_logical_fmf(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_5_logical_fmf(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp fast ogt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp fast ogt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp fast ogt double %a, %b
   %cmp1 = fcmp fast ogt double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_6(double %a, double %b) {
;
   %cmp = fcmp oge double %a, %b
   %cmp1 = fcmp fast false double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_7(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_7(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp oge double %a, %b
   %cmp1 = fcmp oeq double %a, %b
   %retval = and i1 %cmp, %cmp1
   ret i1 %retval
 }
 
 define i1 @auto_gen_7_logical(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_7_logical(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp oge double %a, %b
   %cmp1 = fcmp oeq double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_7_logical_fmf(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_7_logical_fmf(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp fast oeq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp fast oeq double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp fast oge double %a, %b
   %cmp1 = fcmp fast oeq double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_8(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_8(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp oge double %a, %b
   %cmp1 = fcmp ogt double %a, %b
   %retval = and i1 %cmp, %cmp1
   ret i1 %retval
 }
 
 define i1 @auto_gen_8_logical(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_8_logical(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp oge double %a, %b
   %cmp1 = fcmp ogt double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_8_logical_fmf(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_8_logical_fmf(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp oge double %a, %b
   %cmp1 = fcmp fast ogt double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_9(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_9(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp oge double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp oge double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp oge double %a, %b
   %cmp1 = fcmp oge double %a, %b
   %retval = and i1 %cmp, %cmp1
   ret i1 %retval
 }
 
 define i1 @auto_gen_9_logical(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_9_logical(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp oge double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp oge double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp oge double %a, %b
   %cmp1 = fcmp oge double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_9_logical_fmf(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_9_logical_fmf(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp fast oge double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp fast oge double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp fast oge double %a, %b
   %cmp1 = fcmp fast oge double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_10(double %a, double %b) {
;
   %cmp = fcmp fast olt double %a, %b
   %cmp1 = fcmp fast oge double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_14(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_14(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp olt double %a, %b
   %cmp1 = fcmp olt double %a, %b
   %retval = and i1 %cmp, %cmp1
   ret i1 %retval
 }
 
 define i1 @auto_gen_14_logical(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_14_logical(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp olt double %a, %b
   %cmp1 = fcmp olt double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_14_logical_fmf(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_14_logical_fmf(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp olt double %a, %b
   %cmp1 = fcmp fast olt double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_15(double %a, double %b) {
;
   %cmp = fcmp fast ole double %a, %b
   %cmp1 = fcmp fast false double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_16(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_16(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ole double %a, %b
   %cmp1 = fcmp oeq double %a, %b
   %retval = and i1 %cmp, %cmp1
   ret i1 %retval
 }
 
 define i1 @auto_gen_16_logical(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_16_logical(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ole double %a, %b
   %cmp1 = fcmp oeq double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_16_logical_fmf(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_16_logical_fmf(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ole double %a, %b
   %cmp1 = fcmp fast oeq double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_17(double %a, double %b) {
;
   %cmp = fcmp fast ole double %a, %b
   %cmp1 = fcmp fast ogt double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_18(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_18(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ole double %a, %b
   %cmp1 = fcmp oge double %a, %b
   %retval = and i1 %cmp, %cmp1
   ret i1 %retval
 }
 
 define i1 @auto_gen_18_logical(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_18_logical(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ole double %a, %b
   %cmp1 = fcmp oge double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_18_logical_fmf(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_18_logical_fmf(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ole double %a, %b
   %cmp1 = fcmp fast oge double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_19(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_19(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ole double %a, %b
   %cmp1 = fcmp olt double %a, %b
   %retval = and i1 %cmp, %cmp1
   ret i1 %retval
 }
 
 define i1 @auto_gen_19_logical(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_19_logical(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ole double %a, %b
   %cmp1 = fcmp olt double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_19_logical_fmf(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_19_logical_fmf(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp fast olt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp fast olt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp fast ole double %a, %b
   %cmp1 = fcmp fast olt double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_20(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_20(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp ole double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp ole double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ole double %a, %b
   %cmp1 = fcmp ole double %a, %b
   %retval = and i1 %cmp, %cmp1
   ret i1 %retval
 }
 
 define i1 @auto_gen_20_logical(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_20_logical(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp ole double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp ole double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ole double %a, %b
   %cmp1 = fcmp ole double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_20_logical_fmf(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_20_logical_fmf(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp ole double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp ole double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ole double %a, %b
   %cmp1 = fcmp fast ole double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_21(double %a, double %b) {
;
   %cmp = fcmp one double %a, %b
   %cmp1 = fcmp fast oeq double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_23(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_23(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp one double %a, %b
   %cmp1 = fcmp ogt double %a, %b
   %retval = and i1 %cmp, %cmp1
   ret i1 %retval
 }
 
 define i1 @auto_gen_23_logical(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_23_logical(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp one double %a, %b
   %cmp1 = fcmp ogt double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_23_logical_fmf(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_23_logical_fmf(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp fast ogt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp fast ogt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp fast one double %a, %b
   %cmp1 = fcmp fast ogt double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_24(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_24(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp one double %a, %b
   %cmp1 = fcmp oge double %a, %b
   %retval = and i1 %cmp, %cmp1
   ret i1 %retval
 }
 
 define i1 @auto_gen_24_logical(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_24_logical(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp one double %a, %b
   %cmp1 = fcmp oge double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_24_logical_fmf(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_24_logical_fmf(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp one double %a, %b
   %cmp1 = fcmp fast oge double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_25(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_25(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp one double %a, %b
   %cmp1 = fcmp olt double %a, %b
   %retval = and i1 %cmp, %cmp1
   ret i1 %retval
 }
 
 define i1 @auto_gen_25_logical(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_25_logical(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp one double %a, %b
   %cmp1 = fcmp olt double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_25_logical_fmf(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_25_logical_fmf(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp fast olt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp fast olt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp fast one double %a, %b
   %cmp1 = fcmp fast olt double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_26(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_26(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp one double %a, %b
   %cmp1 = fcmp ole double %a, %b
   %retval = and i1 %cmp, %cmp1
   ret i1 %retval
 }
 
 define i1 @auto_gen_26_logical(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_26_logical(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp one double %a, %b
   %cmp1 = fcmp ole double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_26_logical_fmf(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_26_logical_fmf(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp one double %a, %b
   %cmp1 = fcmp fast ole double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_27(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_27(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp one double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp one double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp one double %a, %b
   %cmp1 = fcmp one double %a, %b
   %retval = and i1 %cmp, %cmp1
   ret i1 %retval
 }
 
 define i1 @auto_gen_27_logical(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_27_logical(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp one double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp one double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp one double %a, %b
   %cmp1 = fcmp one double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_27_logical_fmf(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_27_logical_fmf(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp fast one double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp fast one double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp fast one double %a, %b
   %cmp1 = fcmp fast one double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_28(double %a, double %b) {
;
   %cmp = fcmp ord double %a, %b
   %cmp1 = fcmp fast false double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_29(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_29(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ord double %a, %b
   %cmp1 = fcmp oeq double %a, %b
   %retval = and i1 %cmp, %cmp1
   ret i1 %retval
 }
 
 define i1 @auto_gen_29_logical(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_29_logical(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ord double %a, %b
   %cmp1 = fcmp oeq double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_29_logical_fmf(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_29_logical_fmf(
 ; CHECK-NEXT:    [[CMP1:%.*]] = fcmp fast oeq double [[A:%.*]], [[B:%.*]]
 ; CHECK-NEXT:    ret i1 [[CMP1]]
 ;
   %cmp = fcmp fast ord double %a, %b
   %cmp1 = fcmp fast oeq double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_30(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_30(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ord double %a, %b
   %cmp1 = fcmp ogt double %a, %b
   %retval = and i1 %cmp, %cmp1
   ret i1 %retval
 }
 
 define i1 @auto_gen_30_logical(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_30_logical(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ord double %a, %b
   %cmp1 = fcmp ogt double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_30_logical_fmf(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_30_logical_fmf(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ord double %a, %b
   %cmp1 = fcmp fast ogt double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_31(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_31(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp oge double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp oge double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ord double %a, %b
   %cmp1 = fcmp oge double %a, %b
   %retval = and i1 %cmp, %cmp1
   ret i1 %retval
 }
 
 define i1 @auto_gen_31_logical(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_31_logical(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp oge double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp oge double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ord double %a, %b
   %cmp1 = fcmp oge double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_31_logical_fmf(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_31_logical_fmf(
 ; CHECK-NEXT:    [[CMP1:%.*]] = fcmp fast oge double [[A:%.*]], [[B:%.*]]
 ; CHECK-NEXT:    ret i1 [[CMP1]]
 ;
   %cmp = fcmp fast ord double %a, %b
   %cmp1 = fcmp fast oge double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_32(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_32(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ord double %a, %b
   %cmp1 = fcmp olt double %a, %b
   %retval = and i1 %cmp, %cmp1
   ret i1 %retval
 }
 
 define i1 @auto_gen_32_logical(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_32_logical(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ord double %a, %b
   %cmp1 = fcmp olt double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_32_logical_fmf(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_32_logical_fmf(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ord double %a, %b
   %cmp1 = fcmp fast olt double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_33(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_33(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp ole double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp ole double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ord double %a, %b
   %cmp1 = fcmp ole double %a, %b
   %retval = and i1 %cmp, %cmp1
   ret i1 %retval
 }
 
 define i1 @auto_gen_33_logical(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_33_logical(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp ole double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp ole double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ord double %a, %b
   %cmp1 = fcmp ole double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_33_logical_fmf(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_33_logical_fmf(
 ; CHECK-NEXT:    [[CMP1:%.*]] = fcmp fast ole double [[A:%.*]], [[B:%.*]]
 ; CHECK-NEXT:    ret i1 [[CMP1]]
 ;
   %cmp = fcmp fast ord double %a, %b
   %cmp1 = fcmp fast ole double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_34(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_34(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp one double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp one double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ord double %a, %b
   %cmp1 = fcmp one double %a, %b
   %retval = and i1 %cmp, %cmp1
   ret i1 %retval
 }
 
 define i1 @auto_gen_34_logical(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_34_logical(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp one double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp one double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ord double %a, %b
   %cmp1 = fcmp one double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_34_logical_fmf(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_34_logical_fmf(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp one double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp one double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ord double %a, %b
   %cmp1 = fcmp fast one double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_35(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_35(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp ord double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp ord double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ord double %a, %b
   %cmp1 = fcmp ord double %a, %b
   %retval = and i1 %cmp, %cmp1
   ret i1 %retval
 }
 
 define i1 @auto_gen_35_logical(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_35_logical(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp ord double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp ord double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ord double %a, %b
   %cmp1 = fcmp ord double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_35_logical_fmf(double %a, double %b) {
;
   %cmp = fcmp ueq double %a, %b
   %cmp1 = fcmp fast false double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_37(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_37(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ueq double %a, %b
   %cmp1 = fcmp oeq double %a, %b
   %retval = and i1 %cmp, %cmp1
   ret i1 %retval
 }
 
 define i1 @auto_gen_37_logical(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_37_logical(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ueq double %a, %b
   %cmp1 = fcmp oeq double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_37_logical_fmf(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_37_logical_fmf(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp fast oeq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp fast oeq double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp fast ueq double %a, %b
   %cmp1 = fcmp fast oeq double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_38(double %a, double %b) {
;
   %cmp = fcmp ueq double %a, %b
   %cmp1 = fcmp fast ogt double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_39(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_39(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ueq double %a, %b
   %cmp1 = fcmp oge double %a, %b
   %retval = and i1 %cmp, %cmp1
   ret i1 %retval
 }
 
 define i1 @auto_gen_39_logical(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_39_logical(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ueq double %a, %b
   %cmp1 = fcmp oge double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_39_logical_fmf(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_39_logical_fmf(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp fast oeq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp fast oeq double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp fast ueq double %a, %b
   %cmp1 = fcmp fast oge double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_40(double %a, double %b) {
;
   %cmp = fcmp ueq double %a, %b
   %cmp1 = fcmp fast olt double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_41(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_41(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ueq double %a, %b
   %cmp1 = fcmp ole double %a, %b
   %retval = and i1 %cmp, %cmp1
   ret i1 %retval
 }
 
 define i1 @auto_gen_41_logical(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_41_logical(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ueq double %a, %b
   %cmp1 = fcmp ole double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_41_logical_fmf(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_41_logical_fmf(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp fast oeq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp fast oeq double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp fast ueq double %a, %b
   %cmp1 = fcmp fast ole double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_42(double %a, double %b) {
;
   %cmp = fcmp ueq double %a, %b
   %cmp1 = fcmp fast one double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_43(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_43(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ueq double %a, %b
   %cmp1 = fcmp ord double %a, %b
   %retval = and i1 %cmp, %cmp1
   ret i1 %retval
 }
 
 define i1 @auto_gen_43_logical(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_43_logical(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ueq double %a, %b
   %cmp1 = fcmp ord double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_43_logical_fmf(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_43_logical_fmf(
 ; CHECK-NEXT:    [[CMP:%.*]] = fcmp fast ueq double [[A:%.*]], [[B:%.*]]
 ; CHECK-NEXT:    ret i1 [[CMP]]
 ;
   %cmp = fcmp fast ueq double %a, %b
   %cmp1 = fcmp fast ord double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_44(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_44(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp ueq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp ueq double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ueq double %a, %b
   %cmp1 = fcmp ueq double %a, %b
   %retval = and i1 %cmp, %cmp1
   ret i1 %retval
 }
 
 define i1 @auto_gen_44_logical(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_44_logical(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp ueq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp ueq double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ueq double %a, %b
   %cmp1 = fcmp ueq double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_44_logical_fmf(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_44_logical_fmf(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp ueq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp ueq double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ueq double %a, %b
   %cmp1 = fcmp fast ueq double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_45(double %a, double %b) {
;
   %cmp = fcmp ugt double %a, %b
   %cmp1 = fcmp fast oeq double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_47(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_47(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ugt double %a, %b
   %cmp1 = fcmp ogt double %a, %b
   %retval = and i1 %cmp, %cmp1
   ret i1 %retval
 }
 
 define i1 @auto_gen_47_logical(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_47_logical(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ugt double %a, %b
   %cmp1 = fcmp ogt double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_47_logical_fmf(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_47_logical_fmf(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp fast ogt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp fast ogt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp fast ugt double %a, %b
   %cmp1 = fcmp fast ogt double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_48(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_48(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ugt double %a, %b
   %cmp1 = fcmp oge double %a, %b
   %retval = and i1 %cmp, %cmp1
   ret i1 %retval
 }
 
 define i1 @auto_gen_48_logical(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_48_logical(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ugt double %a, %b
   %cmp1 = fcmp oge double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_48_logical_fmf(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_48_logical_fmf(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ugt double %a, %b
   %cmp1 = fcmp fast oge double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_49(double %a, double %b) {
;
   %cmp = fcmp ugt double %a, %b
   %cmp1 = fcmp fast ole double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_51(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_51(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ugt double %a, %b
   %cmp1 = fcmp one double %a, %b
   %retval = and i1 %cmp, %cmp1
   ret i1 %retval
 }
 
 define i1 @auto_gen_51_logical(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_51_logical(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ugt double %a, %b
   %cmp1 = fcmp one double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_51_logical_fmf(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_51_logical_fmf(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp fast ogt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp fast ogt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp fast ugt double %a, %b
   %cmp1 = fcmp fast one double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_52(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_52(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ugt double %a, %b
   %cmp1 = fcmp ord double %a, %b
   %retval = and i1 %cmp, %cmp1
   ret i1 %retval
 }
 
 define i1 @auto_gen_52_logical(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_52_logical(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ugt double %a, %b
   %cmp1 = fcmp ord double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_52_logical_fmf(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_52_logical_fmf(
 ; CHECK-NEXT:    [[CMP:%.*]] = fcmp ugt double [[A:%.*]], [[B:%.*]]
 ; CHECK-NEXT:    ret i1 [[CMP]]
 ;
   %cmp = fcmp ugt double %a, %b
   %cmp1 = fcmp fast ord double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_53(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_53(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ugt double %a, %b
   %cmp1 = fcmp ueq double %a, %b
   %retval = and i1 %cmp, %cmp1
   ret i1 %retval
 }
 
 define i1 @auto_gen_53_logical(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_53_logical(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ugt double %a, %b
   %cmp1 = fcmp ueq double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_53_logical_fmf(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_53_logical_fmf(
 ; CHECK-NEXT:    ret i1 false
 ;
   %cmp = fcmp fast ugt double %a, %b
   %cmp1 = fcmp fast ueq double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_54(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_54(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp ugt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp ugt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ugt double %a, %b
   %cmp1 = fcmp ugt double %a, %b
   %retval = and i1 %cmp, %cmp1
   ret i1 %retval
 }
 
 define i1 @auto_gen_54_logical(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_54_logical(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp ugt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp ugt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ugt double %a, %b
   %cmp1 = fcmp ugt double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_54_logical_fmf(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_54_logical_fmf(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp ugt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp ugt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ugt double %a, %b
   %cmp1 = fcmp fast ugt double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_55(double %a, double %b) {
;
   %cmp = fcmp fast uge double %a, %b
   %cmp1 = fcmp fast false double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_56(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_56(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp uge double %a, %b
   %cmp1 = fcmp oeq double %a, %b
   %retval = and i1 %cmp, %cmp1
   ret i1 %retval
 }
 
 define i1 @auto_gen_56_logical(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_56_logical(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp uge double %a, %b
   %cmp1 = fcmp oeq double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_56_logical_fmf(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_56_logical_fmf(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp uge double %a, %b
   %cmp1 = fcmp fast oeq double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_57(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_57(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp uge double %a, %b
   %cmp1 = fcmp ogt double %a, %b
   %retval = and i1 %cmp, %cmp1
   ret i1 %retval
 }
 
 define i1 @auto_gen_57_logical(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_57_logical(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp uge double %a, %b
   %cmp1 = fcmp ogt double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_57_logical_fmf(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_57_logical_fmf(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp fast ogt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp fast ogt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp fast uge double %a, %b
   %cmp1 = fcmp fast ogt double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_58(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_58(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp oge double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp oge double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp uge double %a, %b
   %cmp1 = fcmp oge double %a, %b
   %retval = and i1 %cmp, %cmp1
   ret i1 %retval
 }
 
 define i1 @auto_gen_58_logical(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_58_logical(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp oge double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp oge double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp uge double %a, %b
   %cmp1 = fcmp oge double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_58_logical_fmf(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_58_logical_fmf(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp oge double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp oge double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp uge double %a, %b
   %cmp1 = fcmp fast oge double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_59(double %a, double %b) {
;
   %cmp = fcmp fast uge double %a, %b
   %cmp1 = fcmp fast olt double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_60(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_60(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp uge double %a, %b
   %cmp1 = fcmp ole double %a, %b
   %retval = and i1 %cmp, %cmp1
   ret i1 %retval
 }
 
 define i1 @auto_gen_60_logical(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_60_logical(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp uge double %a, %b
   %cmp1 = fcmp ole double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_60_logical_fmf(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_60_logical_fmf(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp uge double %a, %b
   %cmp1 = fcmp fast ole double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_61(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_61(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp uge double %a, %b
   %cmp1 = fcmp one double %a, %b
   %retval = and i1 %cmp, %cmp1
   ret i1 %retval
 }
 
 define i1 @auto_gen_61_logical(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_61_logical(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp uge double %a, %b
   %cmp1 = fcmp one double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_61_logical_fmf(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_61_logical_fmf(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp fast ogt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp fast ogt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp fast uge double %a, %b
   %cmp1 = fcmp fast one double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_62(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_62(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp oge double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp oge double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp uge double %a, %b
   %cmp1 = fcmp ord double %a, %b
   %retval = and i1 %cmp, %cmp1
   ret i1 %retval
 }
 
 define i1 @auto_gen_62_logical(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_62_logical(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp oge double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp oge double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp uge double %a, %b
   %cmp1 = fcmp ord double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_62_logical_fmf(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_62_logical_fmf(
 ; CHECK-NEXT:    [[CMP:%.*]] = fcmp uge double [[A:%.*]], [[B:%.*]]
 ; CHECK-NEXT:    ret i1 [[CMP]]
 ;
   %cmp = fcmp uge double %a, %b
   %cmp1 = fcmp fast ord double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_63(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_63(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp ueq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp ueq double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp uge double %a, %b
   %cmp1 = fcmp ueq double %a, %b
   %retval = and i1 %cmp, %cmp1
   ret i1 %retval
 }
 
 define i1 @auto_gen_63_logical(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_63_logical(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp ueq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp ueq double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp uge double %a, %b
   %cmp1 = fcmp ueq double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_63_logical_fmf(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_63_logical_fmf(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp fast ueq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp fast ueq double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp fast uge double %a, %b
   %cmp1 = fcmp fast ueq double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_64(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_64(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp ugt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp ugt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp uge double %a, %b
   %cmp1 = fcmp ugt double %a, %b
   %retval = and i1 %cmp, %cmp1
   ret i1 %retval
 }
 
 define i1 @auto_gen_64_logical(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_64_logical(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp ugt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp ugt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp uge double %a, %b
   %cmp1 = fcmp ugt double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_64_logical_fmf(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_64_logical_fmf(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp ugt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp ugt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp uge double %a, %b
   %cmp1 = fcmp fast ugt double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_65(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_65(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp uge double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp uge double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp uge double %a, %b
   %cmp1 = fcmp uge double %a, %b
   %retval = and i1 %cmp, %cmp1
   ret i1 %retval
 }
 
 define i1 @auto_gen_65_logical(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_65_logical(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp uge double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp uge double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp uge double %a, %b
   %cmp1 = fcmp uge double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_65_logical_fmf(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_65_logical_fmf(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp fast uge double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp fast uge double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp fast uge double %a, %b
   %cmp1 = fcmp fast uge double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_66(double %a, double %b) {
;
   %cmp = fcmp fast ult double %a, %b
   %cmp1 = fcmp fast oge double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_70(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_70(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ult double %a, %b
   %cmp1 = fcmp olt double %a, %b
   %retval = and i1 %cmp, %cmp1
   ret i1 %retval
 }
 
 define i1 @auto_gen_70_logical(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_70_logical(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ult double %a, %b
   %cmp1 = fcmp olt double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_70_logical_fmf(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_70_logical_fmf(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ult double %a, %b
   %cmp1 = fcmp fast olt double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_71(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_71(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ult double %a, %b
   %cmp1 = fcmp ole double %a, %b
   %retval = and i1 %cmp, %cmp1
   ret i1 %retval
 }
 
 define i1 @auto_gen_71_logical(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_71_logical(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ult double %a, %b
   %cmp1 = fcmp ole double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_71_logical_fmf(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_71_logical_fmf(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp fast olt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp fast olt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp fast ult double %a, %b
   %cmp1 = fcmp fast ole double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_72(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_72(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ult double %a, %b
   %cmp1 = fcmp one double %a, %b
   %retval = and i1 %cmp, %cmp1
   ret i1 %retval
 }
 
 define i1 @auto_gen_72_logical(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_72_logical(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ult double %a, %b
   %cmp1 = fcmp one double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_72_logical_fmf(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_72_logical_fmf(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ult double %a, %b
   %cmp1 = fcmp fast one double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_73(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_73(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ult double %a, %b
   %cmp1 = fcmp ord double %a, %b
   %retval = and i1 %cmp, %cmp1
   ret i1 %retval
 }
 
 define i1 @auto_gen_73_logical(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_73_logical(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ult double %a, %b
   %cmp1 = fcmp ord double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_73_logical_fmf(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_73_logical_fmf(
 ; CHECK-NEXT:    [[CMP:%.*]] = fcmp fast ult double [[A:%.*]], [[B:%.*]]
 ; CHECK-NEXT:    ret i1 [[CMP]]
 ;
   %cmp = fcmp fast ult double %a, %b
   %cmp1 = fcmp fast ord double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_74(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_74(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ult double %a, %b
   %cmp1 = fcmp ueq double %a, %b
   %retval = and i1 %cmp, %cmp1
   ret i1 %retval
 }
 
 define i1 @auto_gen_74_logical(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_74_logical(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ult double %a, %b
   %cmp1 = fcmp ueq double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_74_logical_fmf(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_74_logical_fmf(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ult double %a, %b
   %cmp1 = fcmp fast ueq double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_75(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_75(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ult double %a, %b
   %cmp1 = fcmp ugt double %a, %b
   %retval = and i1 %cmp, %cmp1
   ret i1 %retval
 }
 
 define i1 @auto_gen_75_logical(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_75_logical(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ult double %a, %b
   %cmp1 = fcmp ugt double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_75_logical_fmf(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_75_logical_fmf(
 ; CHECK-NEXT:    ret i1 false
 ;
   %cmp = fcmp fast ult double %a, %b
   %cmp1 = fcmp fast ugt double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_76(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_76(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ult double %a, %b
   %cmp1 = fcmp uge double %a, %b
   %retval = and i1 %cmp, %cmp1
   ret i1 %retval
 }
 
 define i1 @auto_gen_76_logical(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_76_logical(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ult double %a, %b
   %cmp1 = fcmp uge double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_76_logical_fmf(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_76_logical_fmf(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ult double %a, %b
   %cmp1 = fcmp fast uge double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_77(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_77(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp ult double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp ult double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ult double %a, %b
   %cmp1 = fcmp ult double %a, %b
   %retval = and i1 %cmp, %cmp1
   ret i1 %retval
 }
 
 define i1 @auto_gen_77_logical(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_77_logical(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp ult double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp ult double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ult double %a, %b
   %cmp1 = fcmp ult double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_77_logical_fmf(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_77_logical_fmf(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp fast ult double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp fast ult double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp fast ult double %a, %b
   %cmp1 = fcmp fast ult double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_78(double %a, double %b) {
;
   %cmp = fcmp ule double %a, %b
   %cmp1 = fcmp fast false double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_79(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_79(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ule double %a, %b
   %cmp1 = fcmp oeq double %a, %b
   %retval = and i1 %cmp, %cmp1
   ret i1 %retval
 }
 
 define i1 @auto_gen_79_logical(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_79_logical(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ule double %a, %b
   %cmp1 = fcmp oeq double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_79_logical_fmf(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_79_logical_fmf(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp fast oeq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp fast oeq double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp fast ule double %a, %b
   %cmp1 = fcmp fast oeq double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_80(double %a, double %b) {
;
   %cmp = fcmp ule double %a, %b
   %cmp1 = fcmp fast ogt double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_81(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_81(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ule double %a, %b
   %cmp1 = fcmp oge double %a, %b
   %retval = and i1 %cmp, %cmp1
   ret i1 %retval
 }
 
 define i1 @auto_gen_81_logical(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_81_logical(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ule double %a, %b
   %cmp1 = fcmp oge double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_81_logical_fmf(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_81_logical_fmf(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp fast oeq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp fast oeq double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp fast ule double %a, %b
   %cmp1 = fcmp fast oge double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_82(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_82(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ule double %a, %b
   %cmp1 = fcmp olt double %a, %b
   %retval = and i1 %cmp, %cmp1
   ret i1 %retval
 }
 
 define i1 @auto_gen_82_logical(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_82_logical(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ule double %a, %b
   %cmp1 = fcmp olt double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_82_logical_fmf(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_82_logical_fmf(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ule double %a, %b
   %cmp1 = fcmp fast olt double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_83(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_83(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp ole double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp ole double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ule double %a, %b
   %cmp1 = fcmp ole double %a, %b
   %retval = and i1 %cmp, %cmp1
   ret i1 %retval
 }
 
 define i1 @auto_gen_83_logical(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_83_logical(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp ole double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp ole double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ule double %a, %b
   %cmp1 = fcmp ole double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_83_logical_fmf(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_83_logical_fmf(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp fast ole double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp fast ole double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp fast ule double %a, %b
   %cmp1 = fcmp fast ole double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_84(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_84(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ule double %a, %b
   %cmp1 = fcmp one double %a, %b
   %retval = and i1 %cmp, %cmp1
   ret i1 %retval
 }
 
 define i1 @auto_gen_84_logical(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_84_logical(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ule double %a, %b
   %cmp1 = fcmp one double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_84_logical_fmf(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_84_logical_fmf(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ule double %a, %b
   %cmp1 = fcmp fast one double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_85(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_85(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp ole double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp ole double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ule double %a, %b
   %cmp1 = fcmp ord double %a, %b
   %retval = and i1 %cmp, %cmp1
   ret i1 %retval
 }
 
 define i1 @auto_gen_85_logical(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_85_logical(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp ole double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp ole double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ule double %a, %b
   %cmp1 = fcmp ord double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_85_logical_fmf(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_85_logical_fmf(
 ; CHECK-NEXT:    [[CMP:%.*]] = fcmp fast ule double [[A:%.*]], [[B:%.*]]
 ; CHECK-NEXT:    ret i1 [[CMP]]
 ;
   %cmp = fcmp fast ule double %a, %b
   %cmp1 = fcmp fast ord double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_86(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_86(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp ueq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp ueq double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ule double %a, %b
   %cmp1 = fcmp ueq double %a, %b
   %retval = and i1 %cmp, %cmp1
   ret i1 %retval
 }
 
 define i1 @auto_gen_86_logical(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_86_logical(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp ueq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp ueq double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ule double %a, %b
   %cmp1 = fcmp ueq double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_86_logical_fmf(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_86_logical_fmf(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp ueq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp ueq double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ule double %a, %b
   %cmp1 = fcmp fast ueq double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_87(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_87(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ule double %a, %b
   %cmp1 = fcmp ugt double %a, %b
   %retval = and i1 %cmp, %cmp1
   ret i1 %retval
 }
 
 define i1 @auto_gen_87_logical(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_87_logical(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ule double %a, %b
   %cmp1 = fcmp ugt double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_87_logical_fmf(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_87_logical_fmf(
 ; CHECK-NEXT:    ret i1 false
 ;
   %cmp = fcmp fast ule double %a, %b
   %cmp1 = fcmp fast ugt double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_88(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_88(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp ueq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp ueq double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ule double %a, %b
   %cmp1 = fcmp uge double %a, %b
   %retval = and i1 %cmp, %cmp1
   ret i1 %retval
 }
 
 define i1 @auto_gen_88_logical(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_88_logical(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp ueq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp ueq double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ule double %a, %b
   %cmp1 = fcmp uge double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_88_logical_fmf(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_88_logical_fmf(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp ueq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp ueq double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ule double %a, %b
   %cmp1 = fcmp fast uge double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_89(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_89(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp ult double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp ult double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ule double %a, %b
   %cmp1 = fcmp ult double %a, %b
   %retval = and i1 %cmp, %cmp1
   ret i1 %retval
 }
 
 define i1 @auto_gen_89_logical(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_89_logical(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp ult double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp ult double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ule double %a, %b
   %cmp1 = fcmp ult double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_89_logical_fmf(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_89_logical_fmf(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp fast ult double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp fast ult double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp fast ule double %a, %b
   %cmp1 = fcmp fast ult double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_90(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_90(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp ule double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp ule double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ule double %a, %b
   %cmp1 = fcmp ule double %a, %b
   %retval = and i1 %cmp, %cmp1
   ret i1 %retval
 }
 
 define i1 @auto_gen_90_logical(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_90_logical(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp ule double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp ule double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ule double %a, %b
   %cmp1 = fcmp ule double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_90_logical_fmf(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_90_logical_fmf(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp ule double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp ule double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ule double %a, %b
   %cmp1 = fcmp fast ule double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_91(double %a, double %b) {
;
   %cmp = fcmp une double %a, %b
   %cmp1 = fcmp fast oeq double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_93(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_93(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp une double %a, %b
   %cmp1 = fcmp ogt double %a, %b
   %retval = and i1 %cmp, %cmp1
   ret i1 %retval
 }
 
 define i1 @auto_gen_93_logical(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_93_logical(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp une double %a, %b
   %cmp1 = fcmp ogt double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_93_logical_fmf(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_93_logical_fmf(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp fast ogt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp fast ogt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp fast une double %a, %b
   %cmp1 = fcmp fast ogt double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_94(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_94(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp une double %a, %b
   %cmp1 = fcmp oge double %a, %b
   %retval = and i1 %cmp, %cmp1
   ret i1 %retval
 }
 
 define i1 @auto_gen_94_logical(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_94_logical(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp une double %a, %b
   %cmp1 = fcmp oge double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_94_logical_fmf(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_94_logical_fmf(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp une double %a, %b
   %cmp1 = fcmp fast oge double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_95(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_95(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp une double %a, %b
   %cmp1 = fcmp olt double %a, %b
   %retval = and i1 %cmp, %cmp1
   ret i1 %retval
 }
 
 define i1 @auto_gen_95_logical(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_95_logical(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp une double %a, %b
   %cmp1 = fcmp olt double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_95_logical_fmf(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_95_logical_fmf(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp fast olt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp fast olt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp fast une double %a, %b
   %cmp1 = fcmp fast olt double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_96(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_96(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp une double %a, %b
   %cmp1 = fcmp ole double %a, %b
   %retval = and i1 %cmp, %cmp1
   ret i1 %retval
 }
 
 define i1 @auto_gen_96_logical(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_96_logical(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp une double %a, %b
   %cmp1 = fcmp ole double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_96_logical_fmf(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_96_logical_fmf(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp une double %a, %b
   %cmp1 = fcmp fast ole double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_97(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_97(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp one double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp one double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp une double %a, %b
   %cmp1 = fcmp one double %a, %b
   %retval = and i1 %cmp, %cmp1
   ret i1 %retval
 }
 
 define i1 @auto_gen_97_logical(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_97_logical(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp one double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp one double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp une double %a, %b
   %cmp1 = fcmp one double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_97_logical_fmf(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_97_logical_fmf(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp fast one double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp fast one double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp fast une double %a, %b
   %cmp1 = fcmp fast one double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_98(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_98(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp one double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp one double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp une double %a, %b
   %cmp1 = fcmp ord double %a, %b
   %retval = and i1 %cmp, %cmp1
   ret i1 %retval
 }
 
 define i1 @auto_gen_98_logical(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_98_logical(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp one double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp one double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp une double %a, %b
   %cmp1 = fcmp ord double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_98_logical_fmf(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_98_logical_fmf(
 ; CHECK-NEXT:    [[CMP:%.*]] = fcmp une double [[A:%.*]], [[B:%.*]]
 ; CHECK-NEXT:    ret i1 [[CMP]]
 ;
   %cmp = fcmp une double %a, %b
   %cmp1 = fcmp fast ord double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_99(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_99(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp une double %a, %b
   %cmp1 = fcmp ueq double %a, %b
   %retval = and i1 %cmp, %cmp1
   ret i1 %retval
 }
 
 define i1 @auto_gen_99_logical(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_99_logical(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp une double %a, %b
   %cmp1 = fcmp ueq double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_99_logical_fmf(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_99_logical_fmf(
 ; CHECK-NEXT:    ret i1 false
 ;
   %cmp = fcmp fast une double %a, %b
   %cmp1 = fcmp fast ueq double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_100(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_100(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp ugt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp ugt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp une double %a, %b
   %cmp1 = fcmp ugt double %a, %b
   %retval = and i1 %cmp, %cmp1
   ret i1 %retval
 }
 
 define i1 @auto_gen_100_logical(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_100_logical(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp ugt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp ugt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp une double %a, %b
   %cmp1 = fcmp ugt double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_100_logical_fmf(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_100_logical_fmf(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp ugt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp ugt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp une double %a, %b
   %cmp1 = fcmp fast ugt double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_101(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_101(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp ugt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp ugt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp une double %a, %b
   %cmp1 = fcmp uge double %a, %b
   %retval = and i1 %cmp, %cmp1
   ret i1 %retval
 }
 
 define i1 @auto_gen_101_logical(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_101_logical(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp ugt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp ugt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp une double %a, %b
   %cmp1 = fcmp uge double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_101_logical_fmf(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_101_logical_fmf(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp fast ugt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp fast ugt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp fast une double %a, %b
   %cmp1 = fcmp fast uge double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_102(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_102(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp ult double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp ult double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp une double %a, %b
   %cmp1 = fcmp ult double %a, %b
   %retval = and i1 %cmp, %cmp1
   ret i1 %retval
 }
 
 define i1 @auto_gen_102_logical(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_102_logical(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp ult double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp ult double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp une double %a, %b
   %cmp1 = fcmp ult double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_102_logical_fmf(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_102_logical_fmf(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp ult double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp ult double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp une double %a, %b
   %cmp1 = fcmp fast ult double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_103(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_103(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp ult double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp ult double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp une double %a, %b
   %cmp1 = fcmp ule double %a, %b
   %retval = and i1 %cmp, %cmp1
   ret i1 %retval
 }
 
 define i1 @auto_gen_103_logical(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_103_logical(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp ult double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp ult double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp une double %a, %b
   %cmp1 = fcmp ule double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_103_logical_fmf(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_103_logical_fmf(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp fast ult double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp fast ult double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp fast une double %a, %b
   %cmp1 = fcmp fast ule double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_104(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_104(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp une double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp une double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp une double %a, %b
   %cmp1 = fcmp une double %a, %b
   %retval = and i1 %cmp, %cmp1
   ret i1 %retval
 }
 
 define i1 @auto_gen_104_logical(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_104_logical(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp une double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp une double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp une double %a, %b
   %cmp1 = fcmp une double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_104_logical_fmf(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_104_logical_fmf(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp une double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp une double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp une double %a, %b
   %cmp1 = fcmp fast une double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_105(double %a, double %b) {
;
   %cmp = fcmp uno double %a, %b
   %cmp1 = fcmp fast ord double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_113(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_113(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp uno double %a, %b
   %cmp1 = fcmp ueq double %a, %b
   %retval = and i1 %cmp, %cmp1
   ret i1 %retval
 }
 
 define i1 @auto_gen_113_logical(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_113_logical(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp uno double %a, %b
   %cmp1 = fcmp ueq double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_113_logical_fmf(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_113_logical_fmf(
 ; CHECK-NEXT:    ret i1 false
 ;
   %cmp = fcmp fast uno double %a, %b
   %cmp1 = fcmp fast ueq double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_114(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_114(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp uno double %a, %b
   %cmp1 = fcmp ugt double %a, %b
   %retval = and i1 %cmp, %cmp1
   ret i1 %retval
 }
 
 define i1 @auto_gen_114_logical(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_114_logical(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp uno double %a, %b
   %cmp1 = fcmp ugt double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_114_logical_fmf(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_114_logical_fmf(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp uno double %a, %b
   %cmp1 = fcmp fast ugt double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_115(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_115(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp uno double %a, %b
   %cmp1 = fcmp uge double %a, %b
   %retval = and i1 %cmp, %cmp1
   ret i1 %retval
 }
 
 define i1 @auto_gen_115_logical(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_115_logical(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp uno double %a, %b
   %cmp1 = fcmp uge double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_115_logical_fmf(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_115_logical_fmf(
 ; CHECK-NEXT:    ret i1 false
 ;
   %cmp = fcmp fast uno double %a, %b
   %cmp1 = fcmp fast uge double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_116(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_116(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp uno double %a, %b
   %cmp1 = fcmp ult double %a, %b
   %retval = and i1 %cmp, %cmp1
   ret i1 %retval
 }
 
 define i1 @auto_gen_116_logical(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_116_logical(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp uno double %a, %b
   %cmp1 = fcmp ult double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_116_logical_fmf(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_116_logical_fmf(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp uno double %a, %b
   %cmp1 = fcmp fast ult double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_117(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_117(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp uno double %a, %b
   %cmp1 = fcmp ule double %a, %b
   %retval = and i1 %cmp, %cmp1
   ret i1 %retval
 }
 
 define i1 @auto_gen_117_logical(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_117_logical(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp uno double %a, %b
   %cmp1 = fcmp ule double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_117_logical_fmf(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_117_logical_fmf(
 ; CHECK-NEXT:    ret i1 false
 ;
   %cmp = fcmp fast uno double %a, %b
   %cmp1 = fcmp fast ule double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_118(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_118(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp uno double %a, %b
   %cmp1 = fcmp une double %a, %b
   %retval = and i1 %cmp, %cmp1
   ret i1 %retval
 }
 
 define i1 @auto_gen_118_logical(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_118_logical(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp uno double %a, %b
   %cmp1 = fcmp une double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_118_logical_fmf(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_118_logical_fmf(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp uno double %a, %b
   %cmp1 = fcmp fast une double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_119(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_119(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp uno double %a, %b
   %cmp1 = fcmp uno double %a, %b
   %retval = and i1 %cmp, %cmp1
   ret i1 %retval
 }
 
 define i1 @auto_gen_119_logical(double %a, double %b) {
 ; CHECK-LABEL: @auto_gen_119_logical(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp uno double %a, %b
   %cmp1 = fcmp uno double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @auto_gen_119_logical_fmf(double %a, double %b) {
;
   %cmp = fcmp fast true double %a, %b
   %cmp1 = fcmp fast true double %a, %b
   %retval = select i1 %cmp, i1 %cmp1, i1 false
   ret i1 %retval
 }
 
 define i1 @intersect_fmf_1(double %a, double %b) {
 ; CHECK-LABEL: @intersect_fmf_1(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp fast oeq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp fast oeq double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp fast ole double %a, %b
   %cmp1 = fcmp fast oge double %a, %b
   %retval = and i1 %cmp, %cmp1
   ret i1 %retval
 }
 
 define i1 @intersect_fmf_2(double %a, double %b) {
 ; CHECK-LABEL: @intersect_fmf_2(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp fast ole double %a, %b
   %cmp1 = fcmp oge double %a, %b
   %retval = and i1 %cmp, %cmp1
   ret i1 %retval
 }
 
 define i1 @intersect_fmf_3(double %a, double %b) {
 ; CHECK-LABEL: @intersect_fmf_3(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ole double %a, %b
   %cmp1 = fcmp fast oge double %a, %b
   %retval = and i1 %cmp, %cmp1
   ret i1 %retval
 }
 
 define i1 @intersect_fmf_4(double %a, double %b) {
 ; CHECK-LABEL: @intersect_fmf_4(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i1 [[RETVAL]]
 ;
   %cmp = fcmp ninf ole double %a, %b
   %cmp1 = fcmp nnan oge double %a, %b
   %retval = and i1 %cmp, %cmp1
   ret i1 %retval
 }
 
 ; Clang used to emit this pattern in __builtin_isnormal
 ; https://alive2.llvm.org/ce/z/8sw9vi
 define i1 @clang_builtin_isnormal_inf_check(half %x) {
 ; CHECK-LABEL: @clang_builtin_isnormal_inf_check(
 ; CHECK-NEXT:    [[FABS_X:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]])
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp oge half [[FABS_X]], 0xH7C00
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[AND:%.*]] = fcmp oge half [[FABS_X]], 0xH7C00
+; CHECK-NEXT:    ret i1 [[AND]]
 ;
   %fabs.x = call half @llvm.fabs.f16(half %x)
   %ord = fcmp ord half %fabs.x, 0.0
   %cmp = fcmp uge half %fabs.x, 0xH7C00
   %and = and i1 %ord, %cmp
   ret i1 %and
 }
 
 define <2 x i1> @clang_builtin_isnormal_inf_check_vector(<2 x half> %x) {
 ; CHECK-LABEL: @clang_builtin_isnormal_inf_check_vector(
 ; CHECK-NEXT:    [[FABS_X:%.*]] = call <2 x half> @llvm.fabs.v2f16(<2 x half> [[X:%.*]])
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp oge <2 x half> [[FABS_X]], <half 0xH7C00, half 0xH7C00>
-; CHECK-NEXT:    ret <2 x i1> [[TMP1]]
+; CHECK-NEXT:    [[AND:%.*]] = fcmp oge <2 x half> [[FABS_X]], <half 0xH7C00, half 0xH7C00>
+; CHECK-NEXT:    ret <2 x i1> [[AND]]
 ;
   %fabs.x = call <2 x half> @llvm.fabs.v2f16(<2 x half> %x)
   %ord = fcmp ord <2 x half> %fabs.x, zeroinitializer
   %cmp = fcmp uge <2 x half> %fabs.x, <half 0xH7C00, half 0xH7C00>
   %and = and <2 x i1> %ord, %cmp
   ret <2 x i1> %and
 }
 
 define i1 @clang_builtin_isnormal_inf_check_commute(half %x) {
 ; CHECK-LABEL: @clang_builtin_isnormal_inf_check_commute(
 ; CHECK-NEXT:    [[FABS_X:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]])
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp oge half [[FABS_X]], 0xH7C00
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[AND:%.*]] = fcmp oge half [[FABS_X]], 0xH7C00
+; CHECK-NEXT:    ret i1 [[AND]]
 ;
   %fabs.x = call half @llvm.fabs.f16(half %x)
   %ord = fcmp ord half %fabs.x, 0.0
   %cmp = fcmp uge half %fabs.x, 0xH7C00
   %and = and i1 %cmp, %ord
   ret i1 %and
 }
 
 define i1 @clang_builtin_isnormal_inf_check_commute_nsz_rhs(half %x) {
 ; CHECK-LABEL: @clang_builtin_isnormal_inf_check_commute_nsz_rhs(
 ; CHECK-NEXT:    [[FABS_X:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]])
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp oge half [[FABS_X]], 0xH7C00
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[AND:%.*]] = fcmp oge half [[FABS_X]], 0xH7C00
+; CHECK-NEXT:    ret i1 [[AND]]
 ;
   %fabs.x = call half @llvm.fabs.f16(half %x)
   %ord = fcmp nsz ord half %fabs.x, 0.0
   %cmp = fcmp uge half %fabs.x, 0xH7C00
   %and = and i1 %cmp, %ord
   ret i1 %and
 }
 
 define i1 @clang_builtin_isnormal_inf_check_commute_nsz_lhs(half %x) {
 ; CHECK-LABEL: @clang_builtin_isnormal_inf_check_commute_nsz_lhs(
 ; CHECK-NEXT:    [[FABS_X:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]])
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp oge half [[FABS_X]], 0xH7C00
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[AND:%.*]] = fcmp oge half [[FABS_X]], 0xH7C00
+; CHECK-NEXT:    ret i1 [[AND]]
 ;
   %fabs.x = call half @llvm.fabs.f16(half %x)
   %ord = fcmp ord half %fabs.x, 0.0
   %cmp = fcmp nsz uge half %fabs.x, 0xH7C00
   %and = and i1 %cmp, %ord
   ret i1 %and
 }
 
 define i1 @clang_builtin_isnormal_inf_check_commute_nofabs_ueq(half %x) {
 ; CHECK-LABEL: @clang_builtin_isnormal_inf_check_commute_nofabs_ueq(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp oeq half [[X:%.*]], 0xH7C00
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[AND:%.*]] = fcmp oeq half [[X:%.*]], 0xH7C00
+; CHECK-NEXT:    ret i1 [[AND]]
 ;
   %ord = fcmp ord half %x, 0.0
   %cmp = fcmp ueq half %x, 0xH7C00
   %and = and i1 %cmp, %ord
   ret i1 %and
 }
 
 define i1 @clang_builtin_isnormal_inf_check_commute_nsz(half %x) {
 ; CHECK-LABEL: @clang_builtin_isnormal_inf_check_commute_nsz(
 ; CHECK-NEXT:    [[FABS_X:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]])
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp nsz oge half [[FABS_X]], 0xH7C00
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[AND:%.*]] = fcmp nsz oge half [[FABS_X]], 0xH7C00
+; CHECK-NEXT:    ret i1 [[AND]]
 ;
   %fabs.x = call half @llvm.fabs.f16(half %x)
   %ord = fcmp nsz ord half %fabs.x, 0.0
   %cmp = fcmp nsz uge half %fabs.x, 0xH7C00
   %and = and i1 %cmp, %ord
   ret i1 %and
 }
 
 ; ugt -> ogt
 define i1 @clang_builtin_isnormal_inf_check_ugt(half %x) {
 ; CHECK-LABEL: @clang_builtin_isnormal_inf_check_ugt(
 ; CHECK-NEXT:    ret i1 false
 ;
   %fabs.x = call half @llvm.fabs.f16(half %x)
   %ord = fcmp ord half %fabs.x, 0.0
   %cmp = fcmp ugt half %fabs.x, 0xH7C00
   %and = and i1 %ord, %cmp
   ret i1 %and
 }
 
 ; ult -> olt
 define i1 @clang_builtin_isnormal_inf_check_ult(half %x) {
 ; CHECK-LABEL: @clang_builtin_isnormal_inf_check_ult(
 ; CHECK-NEXT:    [[FABS_X:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]])
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp olt half [[FABS_X]], 0xH7C00
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[AND:%.*]] = fcmp olt half [[FABS_X]], 0xH7C00
+; CHECK-NEXT:    ret i1 [[AND]]
 ;
   %fabs.x = call half @llvm.fabs.f16(half %x)
   %ord = fcmp ord half %fabs.x, 0.0
   %cmp = fcmp ult half %fabs.x, 0xH7C00
   %and = and i1 %ord, %cmp
   ret i1 %and
 }
 
;
   %and = and i1 %ord, %cmp
   ret i1 %and
 }
 
 ; ueq -> oeq
 define i1 @clang_builtin_isnormal_inf_check_ueq(half %x) {
 ; CHECK-LABEL: @clang_builtin_isnormal_inf_check_ueq(
 ; CHECK-NEXT:    [[FABS_X:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]])
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp oeq half [[FABS_X]], 0xH7C00
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[AND:%.*]] = fcmp oeq half [[FABS_X]], 0xH7C00
+; CHECK-NEXT:    ret i1 [[AND]]
 ;
   %fabs.x = call half @llvm.fabs.f16(half %x)
   %ord = fcmp ord half %fabs.x, 0.0
   %cmp = fcmp ueq half %fabs.x, 0xH7C00
   %and = and i1 %ord, %cmp
   ret i1 %and
 }
 
 ; une -> ole
 define i1 @clang_builtin_isnormal_inf_check_une(half %x) {
 ; CHECK-LABEL: @clang_builtin_isnormal_inf_check_une(
 ; CHECK-NEXT:    [[FABS_X:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]])
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp one half [[FABS_X]], 0xH7C00
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[AND:%.*]] = fcmp one half [[FABS_X]], 0xH7C00
+; CHECK-NEXT:    ret i1 [[AND]]
 ;
   %fabs.x = call half @llvm.fabs.f16(half %x)
   %ord = fcmp ord half %fabs.x, 0.0
   %cmp = fcmp une half %fabs.x, 0xH7C00
   %and = and i1 %ord, %cmp
   ret i1 %and
 }
 
;
   %ord = fcmp ord half %fabs.x, 0.0
   %cmp = fcmp ord half %fabs.x, 0xH7C00
   %and = and i1 %ord, %cmp
   ret i1 %and
 }
 
 define i1 @clang_builtin_isnormal_inf_check_oge(half %x) {
 ; CHECK-LABEL: @clang_builtin_isnormal_inf_check_oge(
-; CHECK-NEXT:    [[FABS_X:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]])
-; CHECK-NEXT:    [[ORD:%.*]] = fcmp ord half [[X]], 0xH0000
-; CHECK-NEXT:    [[CMP:%.*]] = fcmp oge half [[FABS_X]], 0xH7C00
-; CHECK-NEXT:    [[AND:%.*]] = and i1 [[ORD]], [[CMP]]
+; CHECK-NEXT:    [[AND:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 516)
 ; CHECK-NEXT:    ret i1 [[AND]]
 ;
   %fabs.x = call half @llvm.fabs.f16(half %x)
   %ord = fcmp ord half %fabs.x, 0.0
   %cmp = fcmp oge half %fabs.x, 0xH7C00
   %and = and i1 %ord, %cmp
   ret i1 %and
 }
 
 define i1 @clang_builtin_isnormal_inf_check_olt(half %x) {
 ; CHECK-LABEL: @clang_builtin_isnormal_inf_check_olt(
-; CHECK-NEXT:    [[FABS_X:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]])
-; CHECK-NEXT:    [[ORD:%.*]] = fcmp ord half [[X]], 0xH0000
-; CHECK-NEXT:    [[CMP:%.*]] = fcmp olt half [[FABS_X]], 0xH7C00
-; CHECK-NEXT:    [[AND:%.*]] = and i1 [[ORD]], [[CMP]]
+; CHECK-NEXT:    [[AND:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 504)
 ; CHECK-NEXT:    ret i1 [[AND]]
 ;
   %fabs.x = call half @llvm.fabs.f16(half %x)
   %ord = fcmp ord half %fabs.x, 0.0
   %cmp = fcmp olt half %fabs.x, 0xH7C00
   %and = and i1 %ord, %cmp
   ret i1 %and
 }
;
   %ord = fcmp ord half %fabs.x, 0.0
   %cmp = fcmp ole half %fabs.x, 0xH7C00
   %and = and i1 %ord, %cmp
   ret i1 %and
 }
 
 define i1 @clang_builtin_isnormal_inf_check_oeq(half %x) {
 ; CHECK-LABEL: @clang_builtin_isnormal_inf_check_oeq(
-; CHECK-NEXT:    [[FABS_X:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]])
-; CHECK-NEXT:    [[ORD:%.*]] = fcmp ord half [[X]], 0xH0000
-; CHECK-NEXT:    [[CMP:%.*]] = fcmp oeq half [[FABS_X]], 0xH7C00
-; CHECK-NEXT:    [[AND:%.*]] = and i1 [[ORD]], [[CMP]]
+; CHECK-NEXT:    [[AND:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 516)
 ; CHECK-NEXT:    ret i1 [[AND]]
 ;
   %fabs.x = call half @llvm.fabs.f16(half %x)
   %ord = fcmp ord half %fabs.x, 0.0
   %cmp = fcmp oeq half %fabs.x, 0xH7C00
   %and = and i1 %ord, %cmp
   ret i1 %and
 }
 
 define i1 @clang_builtin_isnormal_inf_check_unnececcary_fabs(half %x) {
 ; CHECK-LABEL: @clang_builtin_isnormal_inf_check_unnececcary_fabs(
 ; CHECK-NEXT:    [[FABS_X:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]])
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp oge half [[FABS_X]], 0xH7C00
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[AND:%.*]] = fcmp oge half [[FABS_X]], 0xH7C00
+; CHECK-NEXT:    ret i1 [[AND]]
 ;
   %fabs.x = call half @llvm.fabs.f16(half %x)
   %ord = fcmp ord half %x, 0.0
   %ueq = fcmp uge half %fabs.x, 0xH7C00
   %and = and i1 %ord, %ueq
   ret i1 %and
 }
 
 ; Negative test
 define i1 @clang_builtin_isnormal_inf_check_not_ord(half %x) {
 ; CHECK-LABEL: @clang_builtin_isnormal_inf_check_not_ord(
-; CHECK-NEXT:    [[FABS_X:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]])
-; CHECK-NEXT:    [[ORD:%.*]] = fcmp uno half [[X]], 0xH0000
-; CHECK-NEXT:    [[UEQ:%.*]] = fcmp uge half [[FABS_X]], 0xH7C00
-; CHECK-NEXT:    [[AND:%.*]] = and i1 [[ORD]], [[UEQ]]
+; CHECK-NEXT:    [[AND:%.*]] = fcmp uno half [[X:%.*]], 0xH0000
 ; CHECK-NEXT:    ret i1 [[AND]]
 ;
   %fabs.x = call half @llvm.fabs.f16(half %x)
   %ord = fcmp uno half %fabs.x, 0.0
   %ueq = fcmp uge half %fabs.x, 0xH7C00
   %and = and i1 %ord, %ueq
   ret i1 %and
 }
 
 define i1 @clang_builtin_isnormal_inf_check_missing_fabs(half %x) {
 ; CHECK-LABEL: @clang_builtin_isnormal_inf_check_missing_fabs(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp oge half [[X:%.*]], 0xH7C00
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[AND:%.*]] = fcmp oge half [[X:%.*]], 0xH7C00
+; CHECK-NEXT:    ret i1 [[AND]]
 ;
   %fabs.x = call half @llvm.fabs.f16(half %x)
   %ord = fcmp ord half %x, 0.0
   %ueq = fcmp uge half %x, 0xH7C00
   %and = and i1 %ord, %ueq
   ret i1 %and
 }
 
;
   %ueq = fcmp uge half %fabs.x, 0xH7BFF
   %and = and i1 %ord, %ueq
   ret i1 %and
 }
 
 define i1 @clang_builtin_isnormal_inf_check_nsz_lhs(half %x) {
 ; CHECK-LABEL: @clang_builtin_isnormal_inf_check_nsz_lhs(
 ; CHECK-NEXT:    [[FABS_X:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]])
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp oge half [[FABS_X]], 0xH7C00
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[AND:%.*]] = fcmp oge half [[FABS_X]], 0xH7C00
+; CHECK-NEXT:    ret i1 [[AND]]
 ;
   %fabs.x = call half @llvm.fabs.f16(half %x)
   %ord = fcmp nsz ord half %fabs.x, 0.0
   %ueq = fcmp uge half %fabs.x, 0xH7C00
   %and = and i1 %ord, %ueq
   ret i1 %and
 }
 
 define i1 @clang_builtin_isnormal_inf_check_nsz_rhs(half %x) {
 ; CHECK-LABEL: @clang_builtin_isnormal_inf_check_nsz_rhs(
 ; CHECK-NEXT:    [[FABS_X:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]])
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp oge half [[FABS_X]], 0xH7C00
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[AND:%.*]] = fcmp oge half [[FABS_X]], 0xH7C00
+; CHECK-NEXT:    ret i1 [[AND]]
 ;
   %fabs.x = call half @llvm.fabs.f16(half %x)
   %ord = fcmp ord half %fabs.x, 0.0
   %ueq = fcmp nsz uge half %fabs.x, 0xH7C00
   %and = and i1 %ord, %ueq
   ret i1 %and
 }
 
 define i1 @clang_builtin_isnormal_inf_check_nsz(half %x) {
 ; CHECK-LABEL: @clang_builtin_isnormal_inf_check_nsz(
 ; CHECK-NEXT:    [[FABS_X:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]])
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp nsz oge half [[FABS_X]], 0xH7C00
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[AND:%.*]] = fcmp nsz oge half [[FABS_X]], 0xH7C00
+; CHECK-NEXT:    ret i1 [[AND]]
 ;
   %fabs.x = call half @llvm.fabs.f16(half %x)
   %ord = fcmp nsz ord half %fabs.x, 0.0
   %ueq = fcmp nsz uge half %fabs.x, 0xH7C00
   %and = and i1 %ord, %ueq
   ret i1 %and
 }
 
 define i1 @clang_builtin_isnormal_inf_check_fneg(half %x) {
 ; CHECK-LABEL: @clang_builtin_isnormal_inf_check_fneg(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp oge half [[X:%.*]], 0xH7C00
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[AND:%.*]] = fcmp oge half [[X:%.*]], 0xH7C00
+; CHECK-NEXT:    ret i1 [[AND]]
 ;
   %fneg.x = fneg half %x
   %ord = fcmp ord half %fneg.x, 0.0
   %cmp = fcmp uge half %x, 0xH7C00
   %and = and i1 %ord, %cmp
   ret i1 %and
 }
 
 define i1 @clang_builtin_isnormal_inf_check_copysign(half %x, half %y) {
 ; CHECK-LABEL: @clang_builtin_isnormal_inf_check_copysign(
 ; CHECK-NEXT:    [[COPYSIGN_X:%.*]] = call half @llvm.copysign.f16(half [[X:%.*]], half [[Y:%.*]])
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp oge half [[COPYSIGN_X]], 0xH7C00
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[AND:%.*]] = fcmp oge half [[COPYSIGN_X]], 0xH7C00
+; CHECK-NEXT:    ret i1 [[AND]]
 ;
   %copysign.x = call half @llvm.copysign.f16(half %x, half %y)
   %ord = fcmp ord half %x, 0.0
   %cmp = fcmp uge half %copysign.x, 0xH7C00
   %and = and i1 %ord, %cmp
   ret i1 %and
 }
 
 define i1 @isnormal_logical_select_0(half %x) {
 ; CHECK-LABEL: @isnormal_logical_select_0(
 ; CHECK-NEXT:    [[FABS_X:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]])
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp oge half [[FABS_X]], 0xH7C00
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[AND:%.*]] = fcmp oge half [[FABS_X]], 0xH7C00
+; CHECK-NEXT:    ret i1 [[AND]]
 ;
   %fabs.x = call half @llvm.fabs.f16(half %x)
   %ord = fcmp ord half %fabs.x, 0.0
   %cmp.inf = fcmp uge half %fabs.x, 0xH7C00
   %and = select i1 %ord, i1 %cmp.inf, i1 false
   ret i1 %and
 }
 
 define i1 @isnormal_logical_select_1(half %x) {
 ; CHECK-LABEL: @isnormal_logical_select_1(
 ; CHECK-NEXT:    [[FABS_X:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]])
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp oge half [[FABS_X]], 0xH7C00
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[AND:%.*]] = fcmp oge half [[FABS_X]], 0xH7C00
+; CHECK-NEXT:    ret i1 [[AND]]
 ;
   %fabs.x = call half @llvm.fabs.f16(half %x)
   %ord = fcmp ord half %fabs.x, 0.0
   %cmp.inf = fcmp uge half %fabs.x, 0xH7C00
   %and = select i1 %cmp.inf, i1 %ord, i1 false
   ret i1 %and
 }
 
 define i1 @isnormal_logical_select_0_fmf0(half %x) {
 ; CHECK-LABEL: @isnormal_logical_select_0_fmf0(
 ; CHECK-NEXT:    [[FABS_X:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]])
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp reassoc nsz arcp oge half [[FABS_X]], 0xH7C00
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[AND:%.*]] = fcmp reassoc nsz arcp oge half [[FABS_X]], 0xH7C00
+; CHECK-NEXT:    ret i1 [[AND]]
 ;
   %fabs.x = call half @llvm.fabs.f16(half %x)
   %ord = fcmp nsz arcp reassoc ord half %fabs.x, 0.0
   %cmp.inf = fcmp nsz arcp reassoc uge half %fabs.x, 0xH7C00
   %and = select i1 %ord, i1 %cmp.inf, i1 false
   ret i1 %and
 }
 
 define i1 @isnormal_logical_select_0_fmf1(half %x) {
 ; CHECK-LABEL: @isnormal_logical_select_0_fmf1(
 ; CHECK-NEXT:    [[FABS_X:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]])
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp oge half [[FABS_X]], 0xH7C00
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[AND:%.*]] = fcmp oge half [[FABS_X]], 0xH7C00
+; CHECK-NEXT:    ret i1 [[AND]]
 ;
   %fabs.x = call half @llvm.fabs.f16(half %x)
   %ord = fcmp ord half %fabs.x, 0.0
   %cmp.inf = fcmp nsz arcp reassoc uge half %fabs.x, 0xH7C00
   %and = select i1 %ord, i1 %cmp.inf, i1 false
   ret i1 %and
 }
 
 declare half @llvm.fabs.f16(half)
 declare <2 x half> @llvm.fabs.v2f16(<2 x half>)
 declare half @llvm.copysign.f16(half, half)

llvm/test/Transforms/InstCombine/create-class-from-logic-fcmp.ll

;
   %cmpzero = fcmp une half %x, 0.0
   %cmpinf = fcmp une half %x, 0xHFC00
   %or = or i1 %cmpzero, %cmpinf
   ret i1 %or
 }
 
 define i1 @issubnormal_or_inf(half %x) {
 ; CHECK-LABEL: @issubnormal_or_inf(
-; CHECK-NEXT:    [[FABS:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]])
-; CHECK-NEXT:    [[CMPINF:%.*]] = fcmp oeq half [[FABS]], 0xH7C00
-; CHECK-NEXT:    [[CMP_SMALLEST_NORMAL:%.*]] = fcmp olt half [[FABS]], 0xH0400
-; CHECK-NEXT:    [[CLASS:%.*]] = or i1 [[CMP_SMALLEST_NORMAL]], [[CMPINF]]
+; CHECK-NEXT:    [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 756)
 ; CHECK-NEXT:    ret i1 [[CLASS]]
 ;
   %fabs = call half @llvm.fabs.f16(half %x)
   %cmpinf = fcmp oeq half %fabs, 0xH7C00
   %cmp.smallest.normal = fcmp olt half %fabs, 0xH0400
   %class = or i1 %cmp.smallest.normal, %cmpinf
   ret i1 %class
 }
 
 define i1 @olt_smallest_normal_or_inf(half %x) {
 ; CHECK-LABEL: @olt_smallest_normal_or_inf(
-; CHECK-NEXT:    [[FABS:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]])
-; CHECK-NEXT:    [[CMPINF:%.*]] = fcmp oeq half [[FABS]], 0xH7C00
-; CHECK-NEXT:    [[CMP_SMALLEST_NORMAL:%.*]] = fcmp olt half [[X]], 0xH0400
-; CHECK-NEXT:    [[CLASS:%.*]] = or i1 [[CMP_SMALLEST_NORMAL]], [[CMPINF]]
+; CHECK-NEXT:    [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 764)
 ; CHECK-NEXT:    ret i1 [[CLASS]]
 ;
   %fabs = call half @llvm.fabs.f16(half %x)
   %cmpinf = fcmp oeq half %fabs, 0xH7C00
   %cmp.smallest.normal = fcmp olt half %x, 0xH0400 ; missing fabs
   %class = or i1 %cmp.smallest.normal, %cmpinf
   ret i1 %class
 }
 
 define i1 @not_issubnormal_or_inf(half %x) {
 ; CHECK-LABEL: @not_issubnormal_or_inf(
-; CHECK-NEXT:    [[FABS:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]])
-; CHECK-NEXT:    [[CMPINF:%.*]] = fcmp une half [[FABS]], 0xH7C00
-; CHECK-NEXT:    [[CMP_SMALLEST_NORMAL:%.*]] = fcmp uge half [[FABS]], 0xH0400
-; CHECK-NEXT:    [[NOT:%.*]] = and i1 [[CMP_SMALLEST_NORMAL]], [[CMPINF]]
+; CHECK-NEXT:    [[NOT:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 267)
 ; CHECK-NEXT:    ret i1 [[NOT]]
 ;
   %fabs = call half @llvm.fabs.f16(half %x)
   %cmpinf = fcmp une half %fabs, 0xH7C00
   %cmp.smallest.normal = fcmp uge half %fabs, 0xH0400
   %not = and i1 %cmp.smallest.normal, %cmpinf
   ret i1 %not
 }
 
 define i1 @issubnormal_uge_or_inf(half %x) {
 ; CHECK-LABEL: @issubnormal_uge_or_inf(
-; CHECK-NEXT:    [[FABS:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]])
-; CHECK-NEXT:    [[CMPINF:%.*]] = fcmp oeq half [[FABS]], 0xH7C00
-; CHECK-NEXT:    [[CMP_SMALLEST_NORMAL:%.*]] = fcmp uge half [[FABS]], 0xH0400
-; CHECK-NEXT:    [[CLASS:%.*]] = or i1 [[CMP_SMALLEST_NORMAL]], [[CMPINF]]
+; CHECK-NEXT:    [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 783)
 ; CHECK-NEXT:    ret i1 [[CLASS]]
 ;
   %fabs = call half @llvm.fabs.f16(half %x)
   %cmpinf = fcmp oeq half %fabs, 0xH7C00
   %cmp.smallest.normal = fcmp uge half %fabs, 0xH0400
   %class = or i1 %cmp.smallest.normal, %cmpinf
   ret i1 %class
 }
;
   %fneg.fabs = fneg half %fabs
   %cmp.smallest.normal = fcmp olt half %fneg.fabs, 0xH8400
   %class = or i1 %cmp.smallest.normal, %cmpinf
   ret i1 %class
 }
 
 define i1 @issubnormal_or_finite_olt(half %x) {
 ; CHECK-LABEL: @issubnormal_or_finite_olt(
-; CHECK-NEXT:    [[FABS:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]])
-; CHECK-NEXT:    [[CMPINF:%.*]] = fcmp olt half [[FABS]], 0xH7C00
-; CHECK-NEXT:    [[CMP_SMALLEST_NORMAL:%.*]] = fcmp olt half [[FABS]], 0xH0400
-; CHECK-NEXT:    [[OR:%.*]] = or i1 [[CMP_SMALLEST_NORMAL]], [[CMPINF]]
+; CHECK-NEXT:    [[OR:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 504)
 ; CHECK-NEXT:    ret i1 [[OR]]
 ;
   %fabs = call half @llvm.fabs.f16(half %x)
   %cmpinf = fcmp olt half %fabs, 0xH7C00
   %cmp.smallest.normal = fcmp olt half %fabs, 0xH0400
   %or = or i1 %cmp.smallest.normal, %cmpinf
   ret i1 %or
 }
 
 ; inf | nan | zero | subnormal
 define i1 @issubnormal_or_finite_uge(half %x) {
 ; CHECK-LABEL: @issubnormal_or_finite_uge(
-; CHECK-NEXT:    [[FABS:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]])
-; CHECK-NEXT:    [[CMPINF:%.*]] = fcmp uge half [[FABS]], 0xH7C00
-; CHECK-NEXT:    [[CMP_SMALLEST_NORMAL:%.*]] = fcmp olt half [[FABS]], 0xH0400
-; CHECK-NEXT:    [[OR:%.*]] = or i1 [[CMP_SMALLEST_NORMAL]], [[CMPINF]]
+; CHECK-NEXT:    [[OR:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 759)
 ; CHECK-NEXT:    ret i1 [[OR]]
 ;
   %fabs = call half @llvm.fabs.f16(half %x)
   %cmpinf = fcmp uge half %fabs, 0xH7C00
   %cmp.smallest.normal = fcmp olt half %fabs, 0xH0400
   %or = or i1 %cmp.smallest.normal, %cmpinf
   ret i1 %or
 }
 
 define i1 @issubnormal_and_finite_olt(half %x) {
 ; CHECK-LABEL: @issubnormal_and_finite_olt(
-; CHECK-NEXT:    [[FABS:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]])
-; CHECK-NEXT:    [[CMPINF:%.*]] = fcmp olt half [[FABS]], 0xH7C00
-; CHECK-NEXT:    [[CMP_SMALLEST_NORMAL:%.*]] = fcmp olt half [[FABS]], 0xH0400
-; CHECK-NEXT:    [[AND:%.*]] = and i1 [[CMP_SMALLEST_NORMAL]], [[CMPINF]]
+; CHECK-NEXT:    [[AND:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 240)
 ; CHECK-NEXT:    ret i1 [[AND]]
 ;
   %fabs = call half @llvm.fabs.f16(half %x)
   %cmpinf = fcmp olt half %fabs, 0xH7C00
   %cmp.smallest.normal = fcmp olt half %fabs, 0xH0400
   %and = and i1 %cmp.smallest.normal, %cmpinf
   ret i1 %and
 }
;
   %cmp.zero = fcmp one half %fabs, 0.0
   %cmp.smallest.normal = fcmp olt half %fabs, 0xH0400
   %or = or i1 %cmp.smallest.normal, %cmp.zero
   ret i1 %or
 }
 
 define i1 @fcmp_fabs_uge_inf_or_fabs_uge_smallest_norm(half %x) {
 ; CHECK-LABEL: @fcmp_fabs_uge_inf_or_fabs_uge_smallest_norm(
-; CHECK-NEXT:    [[FABS:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]])
-; CHECK-NEXT:    [[CMPINF:%.*]] = fcmp uge half [[FABS]], 0xH7C00
-; CHECK-NEXT:    [[CMP_SMALLEST_NORMAL:%.*]] = fcmp uge half [[FABS]], 0xH0400
-; CHECK-NEXT:    [[OR:%.*]] = or i1 [[CMP_SMALLEST_NORMAL]], [[CMPINF]]
+; CHECK-NEXT:    [[OR:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 783)
 ; CHECK-NEXT:    ret i1 [[OR]]
 ;
   %fabs = call half @llvm.fabs.f16(half %x)
   %cmpinf = fcmp uge half %fabs, 0xH7C00
   %cmp.smallest.normal = fcmp uge half %fabs, 0xH0400
   %or = or i1 %cmp.smallest.normal, %cmpinf
   ret i1 %or
 }
 
 ; --------------------------------------------------------------------
 ; Test ord/uno
 ; --------------------------------------------------------------------
 
 define i1 @is_finite_and_ord(half %x) {
 ; CHECK-LABEL: @is_finite_and_ord(
 ; CHECK-NEXT:    [[FABS:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]])
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp oeq half [[FABS]], 0xH7C00
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[AND:%.*]] = fcmp oeq half [[FABS]], 0xH7C00
+; CHECK-NEXT:    ret i1 [[AND]]
 ;
   %fabs = call half @llvm.fabs.f16(half %x)
   %is.finite = fcmp ueq half %fabs, 0xH7C00
   %ord = fcmp ord half %x, %x
   %and = and i1 %ord, %is.finite
   ret i1 %and
 }
 
 define i1 @is_finite_and_uno(half %x) {
 ; CHECK-LABEL: @is_finite_and_uno(
-; CHECK-NEXT:    [[FABS:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]])
-; CHECK-NEXT:    [[IS_FINITE:%.*]] = fcmp ueq half [[FABS]], 0xH7C00
-; CHECK-NEXT:    [[UNO:%.*]] = fcmp uno half [[X]], 0xH0000
-; CHECK-NEXT:    [[AND:%.*]] = and i1 [[UNO]], [[IS_FINITE]]
+; CHECK-NEXT:    [[AND:%.*]] = fcmp uno half [[X:%.*]], 0xH0000
 ; CHECK-NEXT:    ret i1 [[AND]]
 ;
   %fabs = call half @llvm.fabs.f16(half %x)
   %is.finite = fcmp ueq half %fabs, 0xH7C00
   %uno = fcmp uno half %x, %x
   %and = and i1 %uno, %is.finite
   ret i1 %and
 }
 
 define i1 @is_finite_or_ord(half %x) {
 ; CHECK-LABEL: @is_finite_or_ord(
-; CHECK-NEXT:    [[FABS:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]])
-; CHECK-NEXT:    [[IS_FINITE:%.*]] = fcmp ueq half [[FABS]], 0xH7C00
-; CHECK-NEXT:    [[ORD:%.*]] = fcmp ord half [[X]], 0xH0000
-; CHECK-NEXT:    [[OR:%.*]] = or i1 [[ORD]], [[IS_FINITE]]
-; CHECK-NEXT:    ret i1 [[OR]]
+; CHECK-NEXT:    ret i1 true
 ;
   %fabs = call half @llvm.fabs.f16(half %x)
   %is.finite = fcmp ueq half %fabs, 0xH7C00
   %ord = fcmp ord half %x, %x
   %or = or i1 %ord, %is.finite
   ret i1 %or
 }
 
 define i1 @is_finite_or_uno(half %x) {
 ; CHECK-LABEL: @is_finite_or_uno(
-; CHECK-NEXT:    [[FABS:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]])
-; CHECK-NEXT:    [[IS_FINITE:%.*]] = fcmp ueq half [[FABS]], 0xH7C00
-; CHECK-NEXT:    [[UNO:%.*]] = fcmp uno half [[X]], 0xH0000
-; CHECK-NEXT:    [[OR:%.*]] = or i1 [[UNO]], [[IS_FINITE]]
+; CHECK-NEXT:    [[OR:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 519)
 ; CHECK-NEXT:    ret i1 [[OR]]
 ;
   %fabs = call half @llvm.fabs.f16(half %x)
   %is.finite = fcmp ueq half %fabs, 0xH7C00
   %uno = fcmp uno half %x, %x
   %or = or i1 %uno, %is.finite
   ret i1 %or
 }
 
 define i1 @oeq_isinf_or_uno(half %x) {
 ; CHECK-LABEL: @oeq_isinf_or_uno(
-; CHECK-NEXT:    [[FABS:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]])
-; CHECK-NEXT:    [[CMPINF:%.*]] = fcmp oeq half [[FABS]], 0xH7C00
-; CHECK-NEXT:    [[UNO:%.*]] = fcmp uno half [[X]], 0xH0000
-; CHECK-NEXT:    [[CLASS:%.*]] = or i1 [[CMPINF]], [[UNO]]
+; CHECK-NEXT:    [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 519)
 ; CHECK-NEXT:    ret i1 [[CLASS]]
 ;
   %fabs = call half @llvm.fabs.f16(half %x)
   %cmpinf = fcmp oeq half %fabs, 0xH7C00
   %uno = fcmp uno half %x, 0xH0000
   %class = or i1 %cmpinf, %uno
   ret i1 %class
 }
 
 define i1 @oeq_isinf_or_ord(half %x) {
 ; CHECK-LABEL: @oeq_isinf_or_ord(
-; CHECK-NEXT:    [[FABS:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]])
-; CHECK-NEXT:    [[CMPINF:%.*]] = fcmp oeq half [[FABS]], 0xH7C00
-; CHECK-NEXT:    [[UNO:%.*]] = fcmp ord half [[X]], 0xH0000
-; CHECK-NEXT:    [[CLASS:%.*]] = or i1 [[CMPINF]], [[UNO]]
+; CHECK-NEXT:    [[CLASS:%.*]] = fcmp ord half [[X:%.*]], 0xH0000
 ; CHECK-NEXT:    ret i1 [[CLASS]]
 ;
   %fabs = call half @llvm.fabs.f16(half %x)
   %cmpinf = fcmp oeq half %fabs, 0xH7C00
   %uno = fcmp ord half %x, 0xH0000
   %class = or i1 %cmpinf, %uno
   ret i1 %class
 }
 
 define i1 @oeq_isinf_and_uno(half %x) {
 ; CHECK-LABEL: @oeq_isinf_and_uno(
-; CHECK-NEXT:    [[FABS:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]])
-; CHECK-NEXT:    [[CMPINF:%.*]] = fcmp oeq half [[FABS]], 0xH7C00
-; CHECK-NEXT:    [[UNO:%.*]] = fcmp uno half [[X]], 0xH0000
-; CHECK-NEXT:    [[AND:%.*]] = and i1 [[CMPINF]], [[UNO]]
-; CHECK-NEXT:    ret i1 [[AND]]
+; CHECK-NEXT:    ret i1 false
 ;
   %fabs = call half @llvm.fabs.f16(half %x)
   %cmpinf = fcmp oeq half %fabs, 0xH7C00
   %uno = fcmp uno half %x, 0xH0000
   %and = and i1 %cmpinf, %uno
   ret i1 %and
 }
 
 define i1 @oeq_isinf_and_ord(half %x) {
 ; CHECK-LABEL: @oeq_isinf_and_ord(
-; CHECK-NEXT:    [[FABS:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]])
-; CHECK-NEXT:    [[CMPINF:%.*]] = fcmp oeq half [[FABS]], 0xH7C00
-; CHECK-NEXT:    [[UNO:%.*]] = fcmp ord half [[X]], 0xH0000
-; CHECK-NEXT:    [[AND:%.*]] = and i1 [[CMPINF]], [[UNO]]
+; CHECK-NEXT:    [[AND:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 516)
 ; CHECK-NEXT:    ret i1 [[AND]]
 ;
   %fabs = call half @llvm.fabs.f16(half %x)
   %cmpinf = fcmp oeq half %fabs, 0xH7C00
   %uno = fcmp ord half %x, 0xH0000
   %and = and i1 %cmpinf, %uno
   ret i1 %and
 }
 
 ; --------------------------------------------------------------------
 ; isnormal(x) || x == 0.0
 ; --------------------------------------------------------------------
 
 define i1 @isnormal_or_zero(half %x) #0 {
 ; CHECK-LABEL: @isnormal_or_zero(
 ; CHECK-NEXT:  entry:
-; CHECK-NEXT:    [[FABS:%.*]] = tail call half @llvm.fabs.f16(half [[X:%.*]])
-; CHECK-NEXT:    [[ISNORMAL:%.*]] = fcmp uge half [[FABS]], 0xH0400
-; CHECK-NEXT:    [[TMP0:%.*]] = fcmp olt half [[FABS]], 0xH7C00
-; CHECK-NEXT:    [[AND1:%.*]] = and i1 [[ISNORMAL]], [[TMP0]]
+; CHECK-NEXT:    [[AND1:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 264)
 ; CHECK-NEXT:    [[CMP:%.*]] = fcmp oeq half [[X]], 0xH0000
 ; CHECK-NEXT:    [[SPEC_SELECT:%.*]] = or i1 [[CMP]], [[AND1]]
 ; CHECK-NEXT:    ret i1 [[SPEC_SELECT]]
 ;
 entry:
   %iseq = fcmp ord half %x, 0xH0000
   %fabs = tail call half @llvm.fabs.f16(half %x)
   %isinf = fcmp ult half %fabs, 0xH7C00

 
 ; --------------------------------------------------------------------
 ; smallest_normal check part of isnormal(x)
 ; --------------------------------------------------------------------
 
 ; -> ord
 define i1 @isnormalinf_or_ord(half %x) #0 {
 ; CHECK-LABEL: @isnormalinf_or_ord(
-; CHECK-NEXT:    [[FABS:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]])
-; CHECK-NEXT:    [[IS_NORMAL_INF:%.*]] = fcmp oge half [[FABS]], 0xH0400
-; CHECK-NEXT:    [[IS_ORD:%.*]] = fcmp ord half [[X]], 0xH0000
-; CHECK-NEXT:    [[OR:%.*]] = or i1 [[IS_NORMAL_INF]], [[IS_ORD]]
+; CHECK-NEXT:    [[OR:%.*]] = fcmp ord half [[X:%.*]], 0xH0000
 ; CHECK-NEXT:    ret i1 [[OR]]
 ;
   %fabs = call half @llvm.fabs.f16(half %x)
   %is.normal.inf = fcmp oge half %fabs, 0xH0400
   %is.ord = fcmp ord half %x, 0xH0000
   %or = or i1 %is.normal.inf, %is.ord
   ret i1 %or
 }
 
 ; -> ord
 define i1 @ord_or_isnormalinf(half %x) #0 {
 ; CHECK-LABEL: @ord_or_isnormalinf(
-; CHECK-NEXT:    [[FABS:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]])
-; CHECK-NEXT:    [[IS_NORMAL_INF:%.*]] = fcmp oge half [[FABS]], 0xH0400
-; CHECK-NEXT:    [[IS_ORD:%.*]] = fcmp ord half [[X]], 0xH0000
-; CHECK-NEXT:    [[OR:%.*]] = or i1 [[IS_ORD]], [[IS_NORMAL_INF]]
+; CHECK-NEXT:    [[OR:%.*]] = fcmp ord half [[X:%.*]], 0xH0000
 ; CHECK-NEXT:    ret i1 [[OR]]
 ;
   %fabs = call half @llvm.fabs.f16(half %x)
   %is.normal.inf = fcmp oge half %fabs, 0xH0400
   %is.ord = fcmp ord half %x, 0xH0000
   %or = or i1 %is.ord, %is.normal.inf
   ret i1 %or
 }
;
   %is.une = fcmp une half %x, 0xH0000
   %or = or i1 %is.une, %is.normal.inf
   ret i1 %or
 }
 
 ; -> normal | inf
 define i1 @isnormalinf_or_inf(half %x) #0 {
 ; CHECK-LABEL: @isnormalinf_or_inf(
-; CHECK-NEXT:    [[FABS:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]])
-; CHECK-NEXT:    [[IS_NORMAL_INF:%.*]] = fcmp oge half [[FABS]], 0xH0400
-; CHECK-NEXT:    [[IS_INF:%.*]] = fcmp oeq half [[FABS]], 0xH7C00
-; CHECK-NEXT:    [[OR:%.*]] = or i1 [[IS_NORMAL_INF]], [[IS_INF]]
+; CHECK-NEXT:    [[OR:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 780)
 ; CHECK-NEXT:    ret i1 [[OR]]
 ;
   %fabs = call half @llvm.fabs.f16(half %x)
   %is.normal.inf = fcmp oge half %fabs, 0xH0400
   %is.inf = fcmp oeq half %fabs, 0xH7C00
   %or = or i1 %is.normal.inf, %is.inf
   ret i1 %or
 }
 
 ; -> pinf | pnormal
 define i1 @posisnormalinf_or_posinf(half %x) #0 {
 ; CHECK-LABEL: @posisnormalinf_or_posinf(
-; CHECK-NEXT:    [[FABS:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]])
-; CHECK-NEXT:    [[IS_POS_NORMAL_INF:%.*]] = fcmp oge half [[X]], 0xH0400
-; CHECK-NEXT:    [[IS_INF:%.*]] = fcmp oeq half [[FABS]], 0xH7C00
-; CHECK-NEXT:    [[OR:%.*]] = or i1 [[IS_POS_NORMAL_INF]], [[IS_INF]]
+; CHECK-NEXT:    [[OR:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 772)
 ; CHECK-NEXT:    ret i1 [[OR]]
 ;
   %fabs = call half @llvm.fabs.f16(half %x)
   %is.pos.normal.inf = fcmp oge half %x, 0xH0400
   %is.inf = fcmp oeq half %fabs, 0xH7C00
   %or = or i1 %is.pos.normal.inf, %is.inf
   ret i1 %or
 }
 
 ; -> normal | inf
 define i1 @isnormalinf_or_posinf(half %x) #0 {
 ; CHECK-LABEL: @isnormalinf_or_posinf(
-; CHECK-NEXT:    [[FABS:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]])
-; CHECK-NEXT:    [[IS_NORMAL_INF:%.*]] = fcmp oge half [[FABS]], 0xH0400
-; CHECK-NEXT:    [[IS_POS_INF:%.*]] = fcmp oeq half [[X]], 0xH7C00
-; CHECK-NEXT:    [[OR:%.*]] = or i1 [[IS_NORMAL_INF]], [[IS_POS_INF]]
+; CHECK-NEXT:    [[OR:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 780)
 ; CHECK-NEXT:    ret i1 [[OR]]
 ;
   %fabs = call half @llvm.fabs.f16(half %x)
   %is.normal.inf = fcmp oge half %fabs, 0xH0400
   %is.pos.inf = fcmp oeq half %x, 0xH7C00
   %or = or i1 %is.normal.inf, %is.pos.inf
   ret i1 %or
 }
 
 ; -> pinf|ninf
 define i1 @isnormalinf_and_inf(half %x) #0 {
 ; CHECK-LABEL: @isnormalinf_and_inf(
-; CHECK-NEXT:    [[FABS:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]])
-; CHECK-NEXT:    [[IS_NORMAL_INF:%.*]] = fcmp oge half [[FABS]], 0xH0400
-; CHECK-NEXT:    [[IS_INF:%.*]] = fcmp oeq half [[FABS]], 0xH7C00
-; CHECK-NEXT:    [[AND:%.*]] = and i1 [[IS_NORMAL_INF]], [[IS_INF]]
+; CHECK-NEXT:    [[AND:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 516)
 ; CHECK-NEXT:    ret i1 [[AND]]
 ;
   %fabs = call half @llvm.fabs.f16(half %x)
   %is.normal.inf = fcmp oge half %fabs, 0xH0400
   %is.inf = fcmp oeq half %fabs, 0xH7C00
   %and = and i1 %is.normal.inf, %is.inf
   ret i1 %and
 }
 
 ; -> pinf
 define i1 @posisnormalinf_and_posinf(half %x) #0 {
 ; CHECK-LABEL: @posisnormalinf_and_posinf(
-; CHECK-NEXT:    [[FABS:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]])
-; CHECK-NEXT:    [[IS_POS_NORMAL_INF:%.*]] = fcmp oge half [[X]], 0xH0400
-; CHECK-NEXT:    [[IS_INF:%.*]] = fcmp oeq half [[FABS]], 0xH7C00
-; CHECK-NEXT:    [[AND:%.*]] = and i1 [[IS_POS_NORMAL_INF]], [[IS_INF]]
+; CHECK-NEXT:    [[AND:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 512)
 ; CHECK-NEXT:    ret i1 [[AND]]
 ;
   %fabs = call half @llvm.fabs.f16(half %x)
   %is.pos.normal.inf = fcmp oge half %x, 0xH0400
   %is.inf = fcmp oeq half %fabs, 0xH7C00
   %and = and i1 %is.pos.normal.inf, %is.inf
   ret i1 %and
 }
 
 ; -> pinf
 define i1 @isnormalinf_and_posinf(half %x) #0 {
 ; CHECK-LABEL: @isnormalinf_and_posinf(
-; CHECK-NEXT:    [[FABS:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]])
-; CHECK-NEXT:    [[IS_NORMAL_INF:%.*]] = fcmp oge half [[FABS]], 0xH0400
-; CHECK-NEXT:    [[IS_POS_INF:%.*]] = fcmp oeq half [[X]], 0xH7C00
-; CHECK-NEXT:    [[AND:%.*]] = and i1 [[IS_NORMAL_INF]], [[IS_POS_INF]]
+; CHECK-NEXT:    [[AND:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 512)
 ; CHECK-NEXT:    ret i1 [[AND]]
 ;
   %fabs = call half @llvm.fabs.f16(half %x)
   %is.normal.inf = fcmp oge half %fabs, 0xH0400
   %is.pos.inf = fcmp oeq half %x, 0xH7C00
   %and = and i1 %is.normal.inf, %is.pos.inf
   ret i1 %and
 }
 
 ; --------------------------------------------------------------------
 ; smallest_normal check part of isnormal(x) with inverted compare
 ; --------------------------------------------------------------------
 
 ; -> true
 define i1 @not_isnormalinf_or_ord(half %x) #0 {
 ; CHECK-LABEL: @not_isnormalinf_or_ord(
-; CHECK-NEXT:    [[FABS:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]])
-; CHECK-NEXT:    [[NOT_IS_NORMAL_INF:%.*]] = fcmp ult half [[FABS]], 0xH0400
-; CHECK-NEXT:    [[IS_ORD:%.*]] = fcmp ord half [[X]], 0xH0000
-; CHECK-NEXT:    [[OR:%.*]] = or i1 [[NOT_IS_NORMAL_INF]], [[IS_ORD]]
-; CHECK-NEXT:    ret i1 [[OR]]
+; CHECK-NEXT:    ret i1 true
 ;
   %fabs = call half @llvm.fabs.f16(half %x)
   %not.is.normal.inf = fcmp ult half %fabs, 0xH0400
   %is.ord = fcmp ord half %x, 0xH0000
   %or = or i1 %not.is.normal.inf, %is.ord
   ret i1 %or
 }
 
 ; -> subnormal | zero
 define i1 @not_isnormalinf_and_ord(half %x) #0 {
 ; CHECK-LABEL: @not_isnormalinf_and_ord(
-; CHECK-NEXT:    [[FABS:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]])
-; CHECK-NEXT:    [[NOT_IS_NORMAL_INF:%.*]] = fcmp ult half [[FABS]], 0xH0400
-; CHECK-NEXT:    [[IS_ORD:%.*]] = fcmp ord half [[X]], 0xH0000
-; CHECK-NEXT:    [[AND:%.*]] = and i1 [[NOT_IS_NORMAL_INF]], [[IS_ORD]]
+; CHECK-NEXT:    [[AND:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 240)
 ; CHECK-NEXT:    ret i1 [[AND]]
 ;
   %fabs = call half @llvm.fabs.f16(half %x)
   %not.is.normal.inf = fcmp ult half %fabs, 0xH0400
   %is.ord = fcmp ord half %x, 0xH0000
   %and = and i1 %not.is.normal.inf, %is.ord
   ret i1 %and
 }
 
 ; -> ~ninf
 define i1 @not_isnormalinf_or_inf(half %x) #0 {
 ; CHECK-LABEL: @not_isnormalinf_or_inf(
-; CHECK-NEXT:    [[FABS:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]])
-; CHECK-NEXT:    [[NOT_IS_NORMAL_INF:%.*]] = fcmp ult half [[FABS]], 0xH0400
-; CHECK-NEXT:    [[IS_INF:%.*]] = fcmp olt half [[FABS]], 0xH7C00
-; CHECK-NEXT:    [[OR:%.*]] = or i1 [[NOT_IS_NORMAL_INF]], [[IS_INF]]
+; CHECK-NEXT:    [[OR:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 507)
 ; CHECK-NEXT:    ret i1 [[OR]]
 ;
   %fabs = call half @llvm.fabs.f16(half %x)
   %not.is.normal.inf = fcmp ult half %fabs, 0xH0400
   %is.inf = fcmp olt half %fabs, 0xH7C00
   %or = or i1 %not.is.normal.inf, %is.inf
   ret i1 %or
 }
 
 ; -> subnormal | zero | nan
 define i1 @not_isnormalinf_or_uno(half %x) #0 {
 ; CHECK-LABEL: @not_isnormalinf_or_uno(
-; CHECK-NEXT:    [[FABS:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]])
-; CHECK-NEXT:    [[NOT_IS_NORMAL_INF:%.*]] = fcmp ult half [[FABS]], 0xH0400
-; CHECK-NEXT:    [[IS_UNO:%.*]] = fcmp uno half [[X]], 0xH0000
-; CHECK-NEXT:    [[OR:%.*]] = or i1 [[NOT_IS_NORMAL_INF]], [[IS_UNO]]
+; CHECK-NEXT:    [[OR:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 243)
 ; CHECK-NEXT:    ret i1 [[OR]]
 ;
   %fabs = call half @llvm.fabs.f16(half %x)
   %not.is.normal.inf = fcmp ult half %fabs, 0xH0400
   %is.uno = fcmp uno half %fabs, 0.0
   %or = or i1 %not.is.normal.inf, %is.uno
   ret i1 %or
 }
 
 ; -> subnormal | zero | nan
 define i1 @not_isnormalinf_or_uno_nofabs(half %x) #0 {
 ; CHECK-LABEL: @not_isnormalinf_or_uno_nofabs(
-; CHECK-NEXT:    [[FABS:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]])
-; CHECK-NEXT:    [[NOT_IS_NORMAL_INF:%.*]] = fcmp ult half [[FABS]], 0xH0400
-; CHECK-NEXT:    [[IS_UNO:%.*]] = fcmp uno half [[X]], 0xH0000
-; CHECK-NEXT:    [[OR:%.*]] = or i1 [[NOT_IS_NORMAL_INF]], [[IS_UNO]]
+; CHECK-NEXT:    [[OR:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 243)
 ; CHECK-NEXT:    ret i1 [[OR]]
 ;
   %fabs = call half @llvm.fabs.f16(half %x)
   %not.is.normal.inf = fcmp ult half %fabs, 0xH0400
   %is.uno = fcmp uno half %x, 0.0
   %or = or i1 %not.is.normal.inf, %is.uno
   ret i1 %or
 }
 
 ; -> ~pnormal
 define i1 @not_negisnormalinf_or_inf(half %x) #0 {
 ; CHECK-LABEL: @not_negisnormalinf_or_inf(
-; CHECK-NEXT:    [[FABS:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]])
-; CHECK-NEXT:    [[NOT_IS_NEG_NORMAL_INF:%.*]] = fcmp ult half [[X]], 0xH0400
-; CHECK-NEXT:    [[IS_INF:%.*]] = fcmp oeq half [[FABS]], 0xH7C00
-; CHECK-NEXT:    [[OR:%.*]] = or i1 [[NOT_IS_NEG_NORMAL_INF]], [[IS_INF]]
+; CHECK-NEXT:    [[OR:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 767)
 ; CHECK-NEXT:    ret i1 [[OR]]
 ;
   %fabs = call half @llvm.fabs.f16(half %x)
   %not.is.neg.normal.inf = fcmp ult half %x, 0xH0400
   %is.inf = fcmp oeq half %fabs, 0xH7C00
   %or = or i1 %not.is.neg.normal.inf, %is.inf
   ret i1 %or
 }
 
 ; -> ~pnormal
 define i1 @not_negisnormalinf_or_posinf(half %x) #0 {
 ; CHECK-LABEL: @not_negisnormalinf_or_posinf(
-; CHECK-NEXT:    [[NOT_IS_POS_NORMAL_INF:%.*]] = fcmp ult half [[X:%.*]], 0xH0400
-; CHECK-NEXT:    [[IS_INF:%.*]] = fcmp oeq half [[X]], 0xH7C00
-; CHECK-NEXT:    [[OR:%.*]] = or i1 [[NOT_IS_POS_NORMAL_INF]], [[IS_INF]]
+; CHECK-NEXT:    [[OR:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 767)
 ; CHECK-NEXT:    ret i1 [[OR]]
 ;
   %not.is.pos.normal.inf = fcmp ult half %x, 0xH0400
   %is.inf = fcmp oeq half %x, 0xH7C00
   %or = or i1 %not.is.pos.normal.inf, %is.inf
   ret i1 %or
 }
 
 ; -> ninf | nnormal
 define i1 @not_isposnormalinf_and_isnormalinf(half %x) #0 {
 ; CHECK-LABEL: @not_isposnormalinf_and_isnormalinf(
-; CHECK-NEXT:    [[NOT_IS_POS_NORMAL_INF:%.*]] = fcmp ult half [[X:%.*]], 0xH0400
-; CHECK-NEXT:    [[FABS:%.*]] = call half @llvm.fabs.f16(half [[X]])
-; CHECK-NEXT:    [[IS_NORMAL_INF:%.*]] = fcmp oge half [[FABS]], 0xH0400
-; CHECK-NEXT:    [[AND:%.*]] = and i1 [[NOT_IS_POS_NORMAL_INF]], [[IS_NORMAL_INF]]
+; CHECK-NEXT:    [[AND:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 12)
 ; CHECK-NEXT:    ret i1 [[AND]]
 ;
   %not.is.pos.normal.inf = fcmp ult half %x, 0xH0400
   %fabs = call half @llvm.fabs.f16(half %x)
   %is.normal.inf = fcmp oge half %fabs, 0xH0400
   %and = and i1 %not.is.pos.normal.inf, %is.normal.inf
   ret i1 %and
 }
 
 ; -> ord
 define i1 @olt_smallest_normal_or_ord(half %x) #0 {
 ; CHECK-LABEL: @olt_smallest_normal_or_ord(
-; CHECK-NEXT:    [[ORD:%.*]] = fcmp ord half [[X:%.*]], 0xH0000
-; CHECK-NEXT:    [[CMP_SMALLEST_NORMAL:%.*]] = fcmp olt half [[X]], 0xH0400
-; CHECK-NEXT:    [[CLASS:%.*]] = or i1 [[CMP_SMALLEST_NORMAL]], [[ORD]]
+; CHECK-NEXT:    [[CLASS:%.*]] = fcmp ord half [[X:%.*]], 0xH0000
 ; CHECK-NEXT:    ret i1 [[CLASS]]
 ;
   %ord = fcmp ord half %x, 0.0
   %cmp.smallest.normal = fcmp olt half %x, 0xH0400
   %class = or i1 %cmp.smallest.normal, %ord
   ret i1 %class
 }
 
 ; -> ~pinf
 define i1 @olt_smallest_normal_or_uno(half %x) #0 {
 ; CHECK-LABEL: @olt_smallest_normal_or_uno(
-; CHECK-NEXT:    [[UNO:%.*]] = fcmp uno half [[X:%.*]], 0xH0000
-; CHECK-NEXT:    [[CMP_SMALLEST_NORMAL:%.*]] = fcmp olt half [[X]], 0xH0400
-; CHECK-NEXT:    [[CLASS:%.*]] = or i1 [[CMP_SMALLEST_NORMAL]], [[UNO]]
+; CHECK-NEXT:    [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 255)
 ; CHECK-NEXT:    ret i1 [[CLASS]]
 ;
   %uno = fcmp uno half %x, 0.0
   %cmp.smallest.normal = fcmp olt half %x, 0xH0400
   %class = or i1 %cmp.smallest.normal, %uno
   ret i1 %class
 }
 
 define i1 @olt_smallest_normal_or_finite(half %x) #0 {
 ; CHECK-LABEL: @olt_smallest_normal_or_finite(
-; CHECK-NEXT:    [[FABS:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]])
-; CHECK-NEXT:    [[IS_FINITE:%.*]] = fcmp olt half [[FABS]], 0xH7C00
-; CHECK-NEXT:    [[CMP_SMALLEST_NORMAL:%.*]] = fcmp olt half [[X]], 0xH0400
-; CHECK-NEXT:    [[CLASS:%.*]] = or i1 [[CMP_SMALLEST_NORMAL]], [[IS_FINITE]]
+; CHECK-NEXT:    [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 508)
 ; CHECK-NEXT:    ret i1 [[CLASS]]
 ;
   %fabs = call half @llvm.fabs.f16(half %x)
   %is.finite = fcmp olt half %fabs, 0xH7C00
   %cmp.smallest.normal = fcmp olt half %x, 0xH0400
   %class = or i1 %cmp.smallest.normal, %is.finite
   ret i1 %class
 }
 
 define i1 @uge_smallest_normal_or_ord(half %x) #0 {
 ; CHECK-LABEL: @uge_smallest_normal_or_ord(
-; CHECK-NEXT:    [[ORD:%.*]] = fcmp ord half [[X:%.*]], 0xH0000
-; CHECK-NEXT:    [[CMP_SMALLEST_NORMAL:%.*]] = fcmp uge half [[X]], 0xH0400
-; CHECK-NEXT:    [[CLASS:%.*]] = or i1 [[CMP_SMALLEST_NORMAL]], [[ORD]]
-; CHECK-NEXT:    ret i1 [[CLASS]]
+; CHECK-NEXT:    ret i1 true
 ;
   %ord = fcmp ord half %x, 0.0
   %cmp.smallest.normal = fcmp uge half %x, 0xH0400
   %class = or i1 %cmp.smallest.normal, %ord
   ret i1 %class
 }
 
 ; -> nan | pnormal | pinf
 define i1 @uge_smallest_normal_or_uno(half %x) #0 {
 ; CHECK-LABEL: @uge_smallest_normal_or_uno(
-; CHECK-NEXT:    [[UNO:%.*]] = fcmp uno half [[X:%.*]], 0xH0000
-; CHECK-NEXT:    [[CMP_SMALLEST_NORMAL:%.*]] = fcmp uge half [[X]], 0xH0400
-; CHECK-NEXT:    [[CLASS:%.*]] = or i1 [[CMP_SMALLEST_NORMAL]], [[UNO]]
+; CHECK-NEXT:    [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 771)
 ; CHECK-NEXT:    ret i1 [[CLASS]]
 ;
   %uno = fcmp uno half %x, 0.0
   %cmp.smallest.normal = fcmp uge half %x, 0xH0400
   %class = or i1 %cmp.smallest.normal, %uno
   ret i1 %class
 }
 
 ; -> uno
 define i1 @uge_smallest_normal_and_uno(half %x) #0 {
 ; CHECK-LABEL: @uge_smallest_normal_and_uno(
-; CHECK-NEXT:    [[UNO:%.*]] = fcmp uno half [[X:%.*]], 0xH0000
-; CHECK-NEXT:    [[CMP_SMALLEST_NORMAL:%.*]] = fcmp uge half [[X]], 0xH0400
-; CHECK-NEXT:    [[CLASS:%.*]] = and i1 [[CMP_SMALLEST_NORMAL]], [[UNO]]
+; CHECK-NEXT:    [[CLASS:%.*]] = fcmp uno half [[X:%.*]], 0xH0000
 ; CHECK-NEXT:    ret i1 [[CLASS]]
 ;
   %uno = fcmp uno half %x, 0.0
   %cmp.smallest.normal = fcmp uge half %x, 0xH0400
   %class = and i1 %cmp.smallest.normal, %uno
   ret i1 %class
 }
 
 ; -> true
 define i1 @olt_infinity_or_finite(half %x) #0 {
 ; CHECK-LABEL: @olt_infinity_or_finite(
-; CHECK-NEXT:    [[LT_INFINITY:%.*]] = fcmp olt half [[X:%.*]], 0xH7C00
-; CHECK-NEXT:    [[CMP_SMALLEST_NORMAL:%.*]] = fcmp olt half [[X]], 0xH0400
-; CHECK-NEXT:    [[CLASS:%.*]] = or i1 [[CMP_SMALLEST_NORMAL]], [[LT_INFINITY]]
+; CHECK-NEXT:    [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 508)
 ; CHECK-NEXT:    ret i1 [[CLASS]]
 ;
   %lt.infinity = fcmp olt half %x, 0xH7C00
   %cmp.smallest.normal = fcmp olt half %x, 0xH0400
   %class = or i1 %cmp.smallest.normal, %lt.infinity
   ret i1 %class
 }
 
 ; -> zero|subnormal|normal
 define i1 @olt_infinity_and_finite(half %x) #0 { ; bustttedddd
 ; CHECK-LABEL: @olt_infinity_and_finite(
-; CHECK-NEXT:    [[LT_INFINITY:%.*]] = fcmp olt half [[X:%.*]], 0xH7C00
-; CHECK-NEXT:    [[CMP_SMALLEST_NORMAL:%.*]] = fcmp olt half [[X]], 0xH0400
-; CHECK-NEXT:    [[CLASS:%.*]] = and i1 [[CMP_SMALLEST_NORMAL]], [[LT_INFINITY]]
+; CHECK-NEXT:    [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 252)
 ; CHECK-NEXT:    ret i1 [[CLASS]]
 ;
   %lt.infinity = fcmp olt half %x, 0xH7C00
   %cmp.smallest.normal = fcmp olt half %x, 0xH0400
   %class = and i1 %cmp.smallest.normal, %lt.infinity
   ret i1 %class
 }
 
 ; -> ord
 define i1 @olt_infinity_or_ord(half %x) #0 {
 ; CHECK-LABEL: @olt_infinity_or_ord(
-; CHECK-NEXT:    [[LT_INFINITY:%.*]] = fcmp olt half [[X:%.*]], 0xH7C00
-; CHECK-NEXT:    [[ORD:%.*]] = fcmp ord half [[X]], 0xH0000
-; CHECK-NEXT:    [[CLASS:%.*]] = or i1 [[LT_INFINITY]], [[ORD]]
+; CHECK-NEXT:    [[CLASS:%.*]] = fcmp ord half [[X:%.*]], 0xH0000
 ; CHECK-NEXT:    ret i1 [[CLASS]]
 ;
   %lt.infinity = fcmp olt half %x, 0xH7C00
   %ord = fcmp ord half %x, 0xH0400
   %class = or i1 %lt.infinity, %ord
   ret i1 %class
 }
 
 ; -> ~posinf
 define i1 @olt_infinity_or_uno(half %x) #0 {
 ; CHECK-LABEL: @olt_infinity_or_uno(
-; CHECK-NEXT:    [[LT_INFINITY:%.*]] = fcmp olt half [[X:%.*]], 0xH7C00
-; CHECK-NEXT:    [[UNO:%.*]] = fcmp uno half [[X]], 0xH0000
-; CHECK-NEXT:    [[CLASS:%.*]] = or i1 [[LT_INFINITY]], [[UNO]]
+; CHECK-NEXT:    [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 511)
 ; CHECK-NEXT:    ret i1 [[CLASS]]
 ;
   %lt.infinity = fcmp olt half %x, 0xH7C00
   %uno = fcmp uno half %x, 0xH0400
   %class = or i1 %lt.infinity, %uno
   ret i1 %class
 }
 
 define i1 @olt_infinity_or_subnormal(half %x) #0 {
 ; CHECK-LABEL: @olt_infinity_or_subnormal(
-; CHECK-NEXT:    [[LT_INFINITY:%.*]] = fcmp olt half [[X:%.*]], 0xH7C00
-; CHECK-NEXT:    [[FABS:%.*]] = call half @llvm.fabs.f16(half [[X]])
-; CHECK-NEXT:    [[IS_SUBNORMAL:%.*]] = fcmp olt half [[FABS]], 0xH0400
-; CHECK-NEXT:    [[CLASS:%.*]] = or i1 [[LT_INFINITY]], [[IS_SUBNORMAL]]
+; CHECK-NEXT:    [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 508)
 ; CHECK-NEXT:    ret i1 [[CLASS]]
 ;
   %lt.infinity = fcmp olt half %x, 0xH7C00
   %fabs = call half @llvm.fabs.f16(half %x)
   %is.subnormal = fcmp olt half %fabs, 0xH0400
   %class = or i1 %lt.infinity, %is.subnormal
   ret i1 %class
 }
 
 define i1 @olt_infinity_and_subnormal(half %x) #0 {
 ; CHECK-LABEL: @olt_infinity_and_subnormal(
-; CHECK-NEXT:    [[LT_INFINITY:%.*]] = fcmp olt half [[X:%.*]], 0xH7C00
-; CHECK-NEXT:    [[FABS:%.*]] = call half @llvm.fabs.f16(half [[X]])
-; CHECK-NEXT:    [[IS_SUBNORMAL:%.*]] = fcmp olt half [[FABS]], 0xH0400
-; CHECK-NEXT:    [[CLASS:%.*]] = and i1 [[LT_INFINITY]], [[IS_SUBNORMAL]]
+; CHECK-NEXT:    [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 240)
 ; CHECK-NEXT:    ret i1 [[CLASS]]
 ;
   %lt.infinity = fcmp olt half %x, 0xH7C00
   %fabs = call half @llvm.fabs.f16(half %x)
   %is.subnormal = fcmp olt half %fabs, 0xH0400
   %class = and i1 %lt.infinity, %is.subnormal
   ret i1 %class
 }
 
 define i1 @olt_infinity_and_not_subnormal(half %x) #0 {
 ; CHECK-LABEL: @olt_infinity_and_not_subnormal(
-; CHECK-NEXT:    [[LT_INFINITY:%.*]] = fcmp olt half [[X:%.*]], 0xH7C00
-; CHECK-NEXT:    [[FABS:%.*]] = call half @llvm.fabs.f16(half [[X]])
-; CHECK-NEXT:    [[IS_SUBNORMAL:%.*]] = fcmp uge half [[FABS]], 0xH0400
-; CHECK-NEXT:    [[CLASS:%.*]] = and i1 [[LT_INFINITY]], [[IS_SUBNORMAL]]
+; CHECK-NEXT:    [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 268)
 ; CHECK-NEXT:    ret i1 [[CLASS]]
 ;
   %lt.infinity = fcmp olt half %x, 0xH7C00
   %fabs = call half @llvm.fabs.f16(half %x)
   %is.subnormal = fcmp olt half %fabs, 0xH0400
   %not.subnormal = xor i1 %is.subnormal, true
   %class = and i1 %lt.infinity, %not.subnormal
   ret i1 %class
 }
 
 ; -> ninf
 define i1 @olt_infinity_and_ueq_inf(half %x) #0 {
 ; CHECK-LABEL: @olt_infinity_and_ueq_inf(
-; CHECK-NEXT:    [[LT_INFINITY:%.*]] = fcmp olt half [[X:%.*]], 0xH7C00
-; CHECK-NEXT:    [[FABS:%.*]] = call half @llvm.fabs.f16(half [[X]])
-; CHECK-NEXT:    [[EQ_INF:%.*]] = fcmp ueq half [[FABS]], 0xH7C00
-; CHECK-NEXT:    [[CLASS:%.*]] = and i1 [[LT_INFINITY]], [[EQ_INF]]
+; CHECK-NEXT:    [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 4)
 ; CHECK-NEXT:    ret i1 [[CLASS]]
 ;
   %lt.infinity = fcmp olt half %x, 0xH7C00
   %fabs = call half @llvm.fabs.f16(half %x)
   %eq.inf = fcmp ueq half %fabs, 0xH7C00
   %class = and i1 %lt.infinity, %eq.inf
   ret i1 %class
 }
 
 ; -> true
 define i1 @olt_infinity_or_ueq_inf(half %x) #0 {
 ; CHECK-LABEL: @olt_infinity_or_ueq_inf(
 ; CHECK-NEXT:    ret i1 true
 ;
   %lt.infinity = fcmp olt half %x, 0xH7C00
   %eq.inf = fcmp ueq half %x, 0xH7C00
   %class = or i1 %lt.infinity, %eq.inf
   ret i1 %class
 }
 
 ; -> pnormal
 define i1 @olt_smallest_normal_or_ueq_inf(half %x) #0 {
 ; CHECK-LABEL: @olt_smallest_normal_or_ueq_inf(
-; CHECK-NEXT:    [[LT_NORMAL:%.*]] = fcmp olt half [[X:%.*]], 0xH0400
-; CHECK-NEXT:    [[EQ_INF:%.*]] = fcmp ueq half [[X]], 0xH7C00
-; CHECK-NEXT:    [[CLASS:%.*]] = or i1 [[LT_NORMAL]], [[EQ_INF]]
+; CHECK-NEXT:    [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 767)
 ; CHECK-NEXT:    ret i1 [[CLASS]]
 ;
   %lt.normal = fcmp olt half %x, 0xH0400
   %eq.inf = fcmp ueq half %x, 0xH7C00
   %class = or i1 %lt.normal, %eq.inf
   ret i1 %class
 }
 
 ; -> ~pinf
 define i1 @olt_smallest_normal_or_une_inf(half %x) #0 {
 ; CHECK-LABEL: @olt_smallest_normal_or_une_inf(
-; CHECK-NEXT:    [[LT_NORMAL:%.*]] = fcmp olt half [[X:%.*]], 0xH0400
-; CHECK-NEXT:    [[EQ_INF:%.*]] = fcmp une half [[X]], 0xH7C00
-; CHECK-NEXT:    [[CLASS:%.*]] = or i1 [[LT_NORMAL]], [[EQ_INF]]
+; CHECK-NEXT:    [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 511)
 ; CHECK-NEXT:    ret i1 [[CLASS]]
 ;
   %lt.normal = fcmp olt half %x, 0xH0400
   %eq.inf = fcmp une half %x, 0xH7C00
   %class = or i1 %lt.normal, %eq.inf
   ret i1 %class
 }
 
 ; -> ninf | nnormal | subnormal | zero
 define i1 @olt_smallest_normal_and_une_inf(half %x) #0 {
 ; CHECK-LABEL: @olt_smallest_normal_and_une_inf(
-; CHECK-NEXT:    [[LT_NORMAL:%.*]] = fcmp olt half [[X:%.*]], 0xH0400
-; CHECK-NEXT:    [[EQ_INF:%.*]] = fcmp une half [[X]], 0xH7C00
-; CHECK-NEXT:    [[CLASS:%.*]] = and i1 [[LT_NORMAL]], [[EQ_INF]]
+; CHECK-NEXT:    [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 252)
 ; CHECK-NEXT:    ret i1 [[CLASS]]
 ;
   %lt.normal = fcmp olt half %x, 0xH0400
   %eq.inf = fcmp une half %x, 0xH7C00
   %class = and i1 %lt.normal, %eq.inf
   ret i1 %class
 }
 
 define i1 @olt_smallest_normal_and_une_inf_or_oeq_smallest_normal(half %x) #0 {
 ; CHECK-LABEL: @olt_smallest_normal_and_une_inf_or_oeq_smallest_normal(
-; CHECK-NEXT:    [[LT_NORMAL:%.*]] = fcmp olt half [[X:%.*]], 0xH0400
-; CHECK-NEXT:    [[EQ_INF:%.*]] = fcmp une half [[X]], 0xH7C00
-; CHECK-NEXT:    [[CLASS:%.*]] = and i1 [[LT_NORMAL]], [[EQ_INF]]
+; CHECK-NEXT:    [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 252)
 ; CHECK-NEXT:    ret i1 [[CLASS]]
 ;
   %lt.normal = fcmp olt half %x, 0xH0400
   %eq.inf = fcmp une half %x, 0xH7C00
   %class = and i1 %lt.normal, %eq.inf
   %eq.normal = fcmp oeq half %x, 0xH0400
   %eq.largest.normal = or i1 %eq.normal, %class
   ret i1 %class
 }
 
 define i1 @olt_smallest_normal_and_une_inf_or_one_smallest_normal(half %x) #0 {
 ; CHECK-LABEL: @olt_smallest_normal_and_une_inf_or_one_smallest_normal(
-; CHECK-NEXT:    [[LT_NORMAL:%.*]] = fcmp olt half [[X:%.*]], 0xH0400
-; CHECK-NEXT:    [[EQ_INF:%.*]] = fcmp une half [[X]], 0xH7C00
-; CHECK-NEXT:    [[CLASS:%.*]] = and i1 [[LT_NORMAL]], [[EQ_INF]]
+; CHECK-NEXT:    [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 252)
 ; CHECK-NEXT:    ret i1 [[CLASS]]
 ;
   %lt.normal = fcmp olt half %x, 0xH0400
   %eq.inf = fcmp une half %x, 0xH7C00
   %class = and i1 %lt.normal, %eq.inf
   %ne.normal = fcmp one half %x, 0xH0400
   %eq.largest.normal = or i1 %ne.normal, %class
   ret i1 %class
 }
 
 define i1 @oge_fabs_eq_inf_and_ord(half %x) #0 {
 ; CHECK-LABEL: @oge_fabs_eq_inf_and_ord(
-; CHECK-NEXT:    [[FABS:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]])
-; CHECK-NEXT:    [[OGE_FABS_INF:%.*]] = fcmp oge half [[FABS]], 0xH7C00
-; CHECK-NEXT:    [[ORD:%.*]] = fcmp ord half [[X]], 0xH0000
-; CHECK-NEXT:    [[AND:%.*]] = and i1 [[OGE_FABS_INF]], [[ORD]]
+; CHECK-NEXT:    [[AND:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 516)
 ; CHECK-NEXT:    ret i1 [[AND]]
 ;
   %fabs = call half @llvm.fabs.f16(half %x)
   %oge.fabs.inf = fcmp oge half %fabs, 0xH7C00
   %ord = fcmp ord half %x, 0xH0000
   %and = and i1 %oge.fabs.inf, %ord
   ret i1 %and
 }
 
 define i1 @oge_eq_inf_and_ord(half %x) #0 {
 ; CHECK-LABEL: @oge_eq_inf_and_ord(
-; CHECK-NEXT:    [[OGE_FABS_INF:%.*]] = fcmp oge half [[X:%.*]], 0xH7C00
-; CHECK-NEXT:    [[ORD:%.*]] = fcmp ord half [[X]], 0xH0000
-; CHECK-NEXT:    [[AND:%.*]] = and i1 [[OGE_FABS_INF]], [[ORD]]
+; CHECK-NEXT:    [[AND:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 512)
 ; CHECK-NEXT:    ret i1 [[AND]]
 ;
   %oge.fabs.inf = fcmp oge half %x, 0xH7C00
   %ord = fcmp ord half %x, 0xH0000
   %and = and i1 %oge.fabs.inf, %ord
   ret i1 %and
 }
 
 define i1 @oge_fabs_eq_inf_or_uno(half %x) #0 {
 ; CHECK-LABEL: @oge_fabs_eq_inf_or_uno(
-; CHECK-NEXT:    [[FABS:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]])
-; CHECK-NEXT:    [[OGE_FABS_INF:%.*]] = fcmp oge half [[FABS]], 0xH7C00
-; CHECK-NEXT:    [[UNO:%.*]] = fcmp uno half [[X]], 0xH0000
-; CHECK-NEXT:    [[OR:%.*]] = or i1 [[OGE_FABS_INF]], [[UNO]]
+; CHECK-NEXT:    [[OR:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 519)
 ; CHECK-NEXT:    ret i1 [[OR]]
 ;
   %fabs = call half @llvm.fabs.f16(half %x)
   %oge.fabs.inf = fcmp oge half %fabs, 0xH7C00
   %uno = fcmp uno half %x, 0xH0000
   %or = or i1 %oge.fabs.inf, %uno
   ret i1 %or
 }
 
 define i1 @oge_eq_inf_or_uno(half %x) #0 {
 ; CHECK-LABEL: @oge_eq_inf_or_uno(
-; CHECK-NEXT:    [[OGE_FABS_INF:%.*]] = fcmp oge half [[X:%.*]], 0xH7C00
-; CHECK-NEXT:    [[UNO:%.*]] = fcmp uno half [[X]], 0xH0000
-; CHECK-NEXT:    [[OR:%.*]] = or i1 [[OGE_FABS_INF]], [[UNO]]
+; CHECK-NEXT:    [[OR:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 515)
 ; CHECK-NEXT:    ret i1 [[OR]]
 ;
   %oge.fabs.inf = fcmp oge half %x, 0xH7C00
   %uno = fcmp uno half %x, 0xH0000
   %or = or i1 %oge.fabs.inf, %uno
   ret i1 %or
 }
 
 define i1 @ult_fabs_eq_inf_and_ord(half %x) #0 {
 ; CHECK-LABEL: @ult_fabs_eq_inf_and_ord(
 ; CHECK-NEXT:    [[FABS:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]])
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp olt half [[FABS]], 0xH7C00
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[AND:%.*]] = fcmp olt half [[FABS]], 0xH7C00
+; CHECK-NEXT:    ret i1 [[AND]]
 ;
   %fabs = call half @llvm.fabs.f16(half %x)
   %ult.fabs.inf = fcmp ult half %fabs, 0xH7C00
   %ord = fcmp ord half %x, 0xH0000
   %and = and i1 %ult.fabs.inf, %ord
   ret i1 %and
 }
 
 define i1 @ult_eq_inf_and_ord(half %x) #0 {
 ; CHECK-LABEL: @ult_eq_inf_and_ord(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp olt half [[X:%.*]], 0xH7C00
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[AND:%.*]] = fcmp olt half [[X:%.*]], 0xH7C00
+; CHECK-NEXT:    ret i1 [[AND]]
 ;
   %ult.fabs.inf = fcmp ult half %x, 0xH7C00
   %ord = fcmp ord half %x, 0xH0000
   %and = and i1 %ult.fabs.inf, %ord
   ret i1 %and
 }
 
 define i1 @ult_fabs_eq_inf_or_uno(half %x) #0 {
 ; CHECK-LABEL: @ult_fabs_eq_inf_or_uno(
-; CHECK-NEXT:    [[FABS:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]])
-; CHECK-NEXT:    [[ULT_FABS_INF:%.*]] = fcmp ult half [[FABS]], 0xH7C00
-; CHECK-NEXT:    [[UNO:%.*]] = fcmp uno half [[X]], 0xH0000
-; CHECK-NEXT:    [[OR:%.*]] = or i1 [[ULT_FABS_INF]], [[UNO]]
+; CHECK-NEXT:    [[OR:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 507)
 ; CHECK-NEXT:    ret i1 [[OR]]
 ;
   %fabs = call half @llvm.fabs.f16(half %x)
   %ult.fabs.inf = fcmp ult half %fabs, 0xH7C00
   %uno = fcmp uno half %x, 0xH0000
   %or = or i1 %ult.fabs.inf, %uno
   ret i1 %or
 }
 
 define i1 @ult_eq_inf_or_uno(half %x) #0 {
 ; CHECK-LABEL: @ult_eq_inf_or_uno(
-; CHECK-NEXT:    [[ULT_FABS_INF:%.*]] = fcmp ult half [[X:%.*]], 0xH7C00
-; CHECK-NEXT:    [[UNO:%.*]] = fcmp uno half [[X]], 0xH0000
-; CHECK-NEXT:    [[OR:%.*]] = or i1 [[ULT_FABS_INF]], [[UNO]]
+; CHECK-NEXT:    [[OR:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 511)
 ; CHECK-NEXT:    ret i1 [[OR]]
 ;
   %ult.fabs.inf = fcmp ult half %x, 0xH7C00
   %uno = fcmp uno half %x, 0xH0000
   %or = or i1 %ult.fabs.inf, %uno
   ret i1 %or
 }
 
;
   %cmp.smallest.normal = fcmp oeq half %x, 0xH0400
   %class = or i1 %oeq.neg.infinity, %cmp.smallest.normal
   ret i1 %class
 }
 
 ; -> ninf | fcZero | fcSubnormal
 define i1 @oeq_neginfinity_or_olt_smallest_normal(half %x) #0 {
 ; CHECK-LABEL: @oeq_neginfinity_or_olt_smallest_normal(
-; CHECK-NEXT:    [[OEQ_NEG_INFINITY:%.*]] = fcmp oeq half [[X:%.*]], 0xHFC00
-; CHECK-NEXT:    [[CMP_SMALLEST_NORMAL:%.*]] = fcmp olt half [[X]], 0xH0400
-; CHECK-NEXT:    [[CLASS:%.*]] = or i1 [[OEQ_NEG_INFINITY]], [[CMP_SMALLEST_NORMAL]]
+; CHECK-NEXT:    [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 252)
 ; CHECK-NEXT:    ret i1 [[CLASS]]
 ;
   %oeq.neg.infinity = fcmp oeq half %x, 0xHFC00
   %cmp.smallest.normal = fcmp olt half %x, 0xH0400
   %class = or i1 %oeq.neg.infinity, %cmp.smallest.normal
   ret i1 %class
 }
 
 ; -> ninf
 define i1 @oeq_neginfinity_and_olt_smallest_normal(half %x) #0 {
 ; CHECK-LABEL: @oeq_neginfinity_and_olt_smallest_normal(
-; CHECK-NEXT:    [[OEQ_NEG_INFINITY:%.*]] = fcmp oeq half [[X:%.*]], 0xHFC00
-; CHECK-NEXT:    [[CMP_SMALLEST_NORMAL:%.*]] = fcmp olt half [[X]], 0xH0400
-; CHECK-NEXT:    [[CLASS:%.*]] = and i1 [[OEQ_NEG_INFINITY]], [[CMP_SMALLEST_NORMAL]]
+; CHECK-NEXT:    [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 4)
 ; CHECK-NEXT:    ret i1 [[CLASS]]
 ;
   %oeq.neg.infinity = fcmp oeq half %x, 0xHFC00
   %cmp.smallest.normal = fcmp olt half %x, 0xH0400
   %class = and i1 %oeq.neg.infinity, %cmp.smallest.normal
   ret i1 %class
 }
 
 ; -> ninf | pnormal | pinf
 define i1 @oeq_neginfinity_or_oge_smallest_normal(half %x) #0 {
 ; CHECK-LABEL: @oeq_neginfinity_or_oge_smallest_normal(
-; CHECK-NEXT:    [[OEQ_NEG_INFINITY:%.*]] = fcmp oeq half [[X:%.*]], 0xHFC00
-; CHECK-NEXT:    [[CMP_SMALLEST_NORMAL:%.*]] = fcmp oge half [[X]], 0xH0400
-; CHECK-NEXT:    [[CLASS:%.*]] = or i1 [[OEQ_NEG_INFINITY]], [[CMP_SMALLEST_NORMAL]]
+; CHECK-NEXT:    [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 772)
 ; CHECK-NEXT:    ret i1 [[CLASS]]
 ;
   %oeq.neg.infinity = fcmp oeq half %x, 0xHFC00
   %cmp.smallest.normal = fcmp oge half %x, 0xH0400
   %class = or i1 %oeq.neg.infinity, %cmp.smallest.normal
   ret i1 %class
 }
 
 ; -> false
 define i1 @oeq_neginfinity_and_oge_smallest_normal(half %x) #0 {
 ; CHECK-LABEL: @oeq_neginfinity_and_oge_smallest_normal(
-; CHECK-NEXT:    [[OEQ_NEG_INFINITY:%.*]] = fcmp oeq half [[X:%.*]], 0xHFC00
-; CHECK-NEXT:    [[CMP_SMALLEST_NORMAL:%.*]] = fcmp oge half [[X]], 0xH0400
-; CHECK-NEXT:    [[CLASS:%.*]] = and i1 [[OEQ_NEG_INFINITY]], [[CMP_SMALLEST_NORMAL]]
-; CHECK-NEXT:    ret i1 [[CLASS]]
+; CHECK-NEXT:    ret i1 false
 ;
   %oeq.neg.infinity = fcmp oeq half %x, 0xHFC00
   %cmp.smallest.normal = fcmp oge half %x, 0xH0400
   %class = and i1 %oeq.neg.infinity, %cmp.smallest.normal
   ret i1 %class
 }
 
 ; -> ord
 define i1 @oeq_neginfinity_or_ord(half %x) #0 {
 ; CHECK-LABEL: @oeq_neginfinity_or_ord(
-; CHECK-NEXT:    [[OEQ_NEG_INFINITY:%.*]] = fcmp oeq half [[X:%.*]], 0xHFC00
-; CHECK-NEXT:    [[ORD:%.*]] = fcmp ord half [[X]], 0xH0000
-; CHECK-NEXT:    [[CLASS:%.*]] = or i1 [[OEQ_NEG_INFINITY]], [[ORD]]
+; CHECK-NEXT:    [[CLASS:%.*]] = fcmp ord half [[X:%.*]], 0xH0000
 ; CHECK-NEXT:    ret i1 [[CLASS]]
 ;
   %oeq.neg.infinity = fcmp oeq half %x, 0xHFC00
   %ord = fcmp ord half %x, 0.0
   %class = or i1 %oeq.neg.infinity, %ord
   ret i1 %class
 }
 
 ; -> ninf
 define i1 @oeq_neginfinity_and_ord(half %x) #0 {
 ; CHECK-LABEL: @oeq_neginfinity_and_ord(
-; CHECK-NEXT:    [[OEQ_NEG_INFINITY:%.*]] = fcmp oeq half [[X:%.*]], 0xHFC00
-; CHECK-NEXT:    [[ORD:%.*]] = fcmp ord half [[X]], 0xH0000
-; CHECK-NEXT:    [[CLASS:%.*]] = and i1 [[OEQ_NEG_INFINITY]], [[ORD]]
+; CHECK-NEXT:    [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 4)
 ; CHECK-NEXT:    ret i1 [[CLASS]]
 ;
   %oeq.neg.infinity = fcmp oeq half %x, 0xHFC00
   %ord = fcmp ord half %x, 0.0
   %class = and i1 %oeq.neg.infinity, %ord
   ret i1 %class
 }
 
;
   %cmp.smallest.normal = fcmp oeq half %x, 0xH0400
   %class = or i1 %une.neg.infinity, %cmp.smallest.normal
   ret i1 %class
 }
 
 ; -> true
 define i1 @une_neginfinity_or_ord(half %x) #0 {
 ; CHECK-LABEL: @une_neginfinity_or_ord(
-; CHECK-NEXT:    [[UNE_NEG_INFINITY:%.*]] = fcmp une half [[X:%.*]], 0xHFC00
-; CHECK-NEXT:    [[ORD:%.*]] = fcmp ord half [[X]], 0xH0000
-; CHECK-NEXT:    [[CLASS:%.*]] = or i1 [[UNE_NEG_INFINITY]], [[ORD]]
-; CHECK-NEXT:    ret i1 [[CLASS]]
+; CHECK-NEXT:    ret i1 true
 ;
   %une.neg.infinity = fcmp une half %x, 0xHFC00
   %ord = fcmp ord half %x, 0.0
   %class = or i1 %une.neg.infinity, %ord
   ret i1 %class
 }
 
 ; -> ~(nan | ninf)
 define i1 @une_neginfinity_and_ord(half %x) #0 {
 ; CHECK-LABEL: @une_neginfinity_and_ord(
-; CHECK-NEXT:    [[TMP1:%.*]] = fcmp one half [[X:%.*]], 0xHFC00
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[CLASS:%.*]] = fcmp one half [[X:%.*]], 0xHFC00
+; CHECK-NEXT:    ret i1 [[CLASS]]
 ;
   %une.neg.infinity = fcmp une half %x, 0xHFC00
   %ord = fcmp ord half %x, 0.0
   %class = and i1 %une.neg.infinity, %ord
   ret i1 %class
 }
 
 ; -> ord
 define i1 @one_neginfinity_or_olt_smallest_normal(half %x) #0 {
 ; CHECK-LABEL: @one_neginfinity_or_olt_smallest_normal(
-; CHECK-NEXT:    [[ONE_NEG_INFINITY:%.*]] = fcmp one half [[X:%.*]], 0xHFC00
-; CHECK-NEXT:    [[CMP_SMALLEST_NORMAL:%.*]] = fcmp olt half [[X]], 0xH0400
-; CHECK-NEXT:    [[CLASS:%.*]] = or i1 [[ONE_NEG_INFINITY]], [[CMP_SMALLEST_NORMAL]]
+; CHECK-NEXT:    [[CLASS:%.*]] = fcmp ord half [[X:%.*]], 0xH0000
 ; CHECK-NEXT:    ret i1 [[CLASS]]
 ;
   %one.neg.infinity = fcmp one half %x, 0xHFC00
   %cmp.smallest.normal = fcmp olt half %x, 0xH0400
   %class = or i1 %one.neg.infinity, %cmp.smallest.normal
   ret i1 %class
 }
 
 ; -> ~(nan|ninf)
 define i1 @one_neginfinity_and_olt_smallest_normal(half %x) #0 {
 ; CHECK-LABEL: @one_neginfinity_and_olt_smallest_normal(
-; CHECK-NEXT:    [[ONE_NEG_INFINITY:%.*]] = fcmp one half [[X:%.*]], 0xHFC00
-; CHECK-NEXT:    [[CMP_SMALLEST_NORMAL:%.*]] = fcmp olt half [[X]], 0xH0400
-; CHECK-NEXT:    [[CLASS:%.*]] = and i1 [[ONE_NEG_INFINITY]], [[CMP_SMALLEST_NORMAL]]
+; CHECK-NEXT:    [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 248)
 ; CHECK-NEXT:    ret i1 [[CLASS]]
 ;
   %one.neg.infinity = fcmp one half %x, 0xHFC00
   %cmp.smallest.normal = fcmp olt half %x, 0xH0400
   %class = and i1 %one.neg.infinity, %cmp.smallest.normal
   ret i1 %class
 }
 
 ; -> ~ninf
 define i1 @one_neginfinity_or_uno(half %x) #0 {
 ; CHECK-LABEL: @one_neginfinity_or_uno(
-; CHECK-NEXT:    [[ONE_NEG_INFINITY:%.*]] = fcmp one half [[X:%.*]], 0xHFC00
-; CHECK-NEXT:    [[UNO:%.*]] = fcmp uno half [[X]], 0xH0000
-; CHECK-NEXT:    [[CLASS:%.*]] = or i1 [[ONE_NEG_INFINITY]], [[UNO]]
+; CHECK-NEXT:    [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 1019)
 ; CHECK-NEXT:    ret i1 [[CLASS]]
 ;
   %one.neg.infinity = fcmp one half %x, 0xHFC00
   %uno = fcmp uno half %x, 0.0
   %class = or i1 %one.neg.infinity, %uno
   ret i1 %class
 }
 
 ; -> ~ninf
 define i1 @one_neginfinity_and_ord(half %x) #0 {
 ; CHECK-LABEL: @one_neginfinity_and_ord(
-; CHECK-NEXT:    [[ONE_NEG_INFINITY:%.*]] = fcmp one half [[X:%.*]], 0xHFC00
-; CHECK-NEXT:    [[ORD:%.*]] = fcmp uno half [[X]], 0xH0000
-; CHECK-NEXT:    [[CLASS:%.*]] = and i1 [[ONE_NEG_INFINITY]], [[ORD]]
-; CHECK-NEXT:    ret i1 [[CLASS]]
+; CHECK-NEXT:    ret i1 false
 ;
   %one.neg.infinity = fcmp one half %x, 0xHFC00
   %ord = fcmp uno half %x, 0.0
   %class = and i1 %one.neg.infinity, %ord
   ret i1 %class
 }
 
 ; -> pnormal|pinf
 define i1 @one_neginfinity_and_uge_smallest_normal(half %x) #0 {
 ; CHECK-LABEL: @one_neginfinity_and_uge_smallest_normal(
-; CHECK-NEXT:    [[ONE_NEG_INFINITY:%.*]] = fcmp one half [[X:%.*]], 0xHFC00
-; CHECK-NEXT:    [[CMP_SMALLEST_NORMAL:%.*]] = fcmp uge half [[X]], 0xH0400
-; CHECK-NEXT:    [[CLASS:%.*]] = and i1 [[ONE_NEG_INFINITY]], [[CMP_SMALLEST_NORMAL]]
+; CHECK-NEXT:    [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 768)
 ; CHECK-NEXT:    ret i1 [[CLASS]]
 ;
   %one.neg.infinity = fcmp one half %x, 0xHFC00
   %cmp.smallest.normal = fcmp uge half %x, 0xH0400
   %class = and i1 %one.neg.infinity, %cmp.smallest.normal
   ret i1 %class
 }
 
 ; -> ~(pnormal|pinf)
 define i1 @ueq_neginfinity_or_olt_smallest_normal(half %x) #0 {
 ; CHECK-LABEL: @ueq_neginfinity_or_olt_smallest_normal(
-; CHECK-NEXT:    [[UEQ_NEG_INFINITY:%.*]] = fcmp ueq half [[X:%.*]], 0xHFC00
-; CHECK-NEXT:    [[CMP_SMALLEST_NORMAL:%.*]] = fcmp olt half [[X]], 0xH0400
-; CHECK-NEXT:    [[CLASS:%.*]] = or i1 [[UEQ_NEG_INFINITY]], [[CMP_SMALLEST_NORMAL]]
+; CHECK-NEXT:    [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 255)
 ; CHECK-NEXT:    ret i1 [[CLASS]]
 ;
   %ueq.neg.infinity = fcmp ueq half %x, 0xHFC00
   %cmp.smallest.normal = fcmp olt half %x, 0xH0400
   %class = or i1 %ueq.neg.infinity, %cmp.smallest.normal
   ret i1 %class
 }
 
 ; -> ninf
 define i1 @ueq_neginfinity_and_olt_smallest_normal(half %x) #0 {
 ; CHECK-LABEL: @ueq_neginfinity_and_olt_smallest_normal(
-; CHECK-NEXT:    [[UEQ_NEG_INFINITY:%.*]] = fcmp ueq half [[X:%.*]], 0xHFC00
-; CHECK-NEXT:    [[CMP_SMALLEST_NORMAL:%.*]] = fcmp olt half [[X]], 0xH0400
-; CHECK-NEXT:    [[CLASS:%.*]] = and i1 [[UEQ_NEG_INFINITY]], [[CMP_SMALLEST_NORMAL]]
+; CHECK-NEXT:    [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 4)
 ; CHECK-NEXT:    ret i1 [[CLASS]]
 ;
   %ueq.neg.infinity = fcmp ueq half %x, 0xHFC00
   %cmp.smallest.normal = fcmp olt half %x, 0xH0400
   %class = and i1 %ueq.neg.infinity, %cmp.smallest.normal
   ret i1 %class
 }
 
 ; -> nan|ninf
 define i1 @ueq_neginfinity_or_uno(half %x) #0 {
 ; CHECK-LABEL: @ueq_neginfinity_or_uno(
-; CHECK-NEXT:    [[UEQ_NEG_INFINITY:%.*]] = fcmp ueq half [[X:%.*]], 0xHFC00
-; CHECK-NEXT:    [[UNO:%.*]] = fcmp uno half [[X]], 0xH0000
-; CHECK-NEXT:    [[CLASS:%.*]] = or i1 [[UEQ_NEG_INFINITY]], [[UNO]]
+; CHECK-NEXT:    [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 7)
 ; CHECK-NEXT:    ret i1 [[CLASS]]
 ;
   %ueq.neg.infinity = fcmp ueq half %x, 0xHFC00
   %uno = fcmp uno half %x, 0.0
   %class = or i1 %ueq.neg.infinity, %uno
   ret i1 %class
 }
 
 ; -> nan|ninf
 define i1 @ueq_neginfinity_and_ord(half %x) #0 {
 ; CHECK-LABEL: @ueq_neginfinity_and_ord(
-; CHECK-NEXT:    [[UEQ_NEG_INFINITY:%.*]] = fcmp ueq half [[X:%.*]], 0xHFC00
-; CHECK-NEXT:    [[ORD:%.*]] = fcmp uno half [[X]], 0xH0000
-; CHECK-NEXT:    [[CLASS:%.*]] = and i1 [[UEQ_NEG_INFINITY]], [[ORD]]
+; CHECK-NEXT:    [[CLASS:%.*]] = fcmp uno half [[X:%.*]], 0xH0000
 ; CHECK-NEXT:    ret i1 [[CLASS]]
 ;
   %ueq.neg.infinity = fcmp ueq half %x, 0xHFC00
   %ord = fcmp uno half %x, 0.0
   %class = and i1 %ueq.neg.infinity, %ord
   ret i1 %class
 }
 
 ; -> uno
 define i1 @ueq_neginfinity_and_uge_smallest_normal(half %x) #0 {
 ; CHECK-LABEL: @ueq_neginfinity_and_uge_smallest_normal(
-; CHECK-NEXT:    [[UEQ_NEG_INFINITY:%.*]] = fcmp ueq half [[X:%.*]], 0xHFC00
-; CHECK-NEXT:    [[CMP_SMALLEST_NORMAL:%.*]] = fcmp uge half [[X]], 0xH0400
-; CHECK-NEXT:    [[CLASS:%.*]] = and i1 [[UEQ_NEG_INFINITY]], [[CMP_SMALLEST_NORMAL]]
+; CHECK-NEXT:    [[CLASS:%.*]] = fcmp uno half [[X:%.*]], 0xH0000
 ; CHECK-NEXT:    ret i1 [[CLASS]]
 ;
   %ueq.neg.infinity = fcmp ueq half %x, 0xHFC00
   %cmp.smallest.normal = fcmp uge half %x, 0xH0400
   %class = and i1 %ueq.neg.infinity, %cmp.smallest.normal
   ret i1 %class
 }
 
;
   %ord = fcmp ord half %x, 0.0
   %class = and i1 %fabs.oeq.neg.infinity, %ord
   ret i1 %class
 }
 
 ; -> false
 define i1 @fabs_ueq_neginfinity_and_olt_smallest_normal(half %x) #0 { ; WRONG
 ; CHECK-LABEL: @fabs_ueq_neginfinity_and_olt_smallest_normal(
-; CHECK-NEXT:    [[FABS:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]])
-; CHECK-NEXT:    [[FABS_UEQ_NEG_INFINITY:%.*]] = fcmp ueq half [[FABS]], 0xHFC00
-; CHECK-NEXT:    [[CMP_SMALLEST_NORMAL:%.*]] = fcmp olt half [[X]], 0xH0400
-; CHECK-NEXT:    [[CLASS:%.*]] = and i1 [[FABS_UEQ_NEG_INFINITY]], [[CMP_SMALLEST_NORMAL]]
-; CHECK-NEXT:    ret i1 [[CLASS]]
+; CHECK-NEXT:    ret i1 false
 ;
   %fabs = call half @llvm.fabs.f16(half %x)
   %fabs.ueq.neg.infinity = fcmp ueq half %fabs, 0xHFC00
   %cmp.smallest.normal = fcmp olt half %x, 0xH0400
   %class = and i1 %fabs.ueq.neg.infinity, %cmp.smallest.normal
   ret i1 %class
 }
 
 ; -> pinf|pnormal
 define i1 @fabs_one_neginfinity_and_uge_smallest_normal(half %x) #0 {
 ; CHECK-LABEL: @fabs_one_neginfinity_and_uge_smallest_normal(
-; CHECK-NEXT:    [[FABS:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]])
-; CHECK-NEXT:    [[FABS_ONE_NEG_INFINITY:%.*]] = fcmp one half [[FABS]], 0xHFC00
-; CHECK-NEXT:    [[CMP_SMALLEST_NORMAL:%.*]] = fcmp uge half [[X]], 0xH0400
-; CHECK-NEXT:    [[CLASS:%.*]] = and i1 [[FABS_ONE_NEG_INFINITY]], [[CMP_SMALLEST_NORMAL]]
+; CHECK-NEXT:    [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 768)
 ; CHECK-NEXT:    ret i1 [[CLASS]]
 ;
   %fabs = call half @llvm.fabs.f16(half %x)
   %fabs.one.neg.infinity = fcmp one half %fabs, 0xHFC00
   %cmp.smallest.normal = fcmp uge half %x, 0xH0400
   %class = and i1 %fabs.one.neg.infinity, %cmp.smallest.normal
   ret i1 %class
 }
 
 ; -> ord
 define i1 @fabs_one_neginfinity_or_olt_smallest_normal(half %x) #0 {
 ; CHECK-LABEL: @fabs_one_neginfinity_or_olt_smallest_normal(
-; CHECK-NEXT:    [[FABS:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]])
-; CHECK-NEXT:    [[FABS_ONE_NEG_INFINITY:%.*]] = fcmp one half [[FABS]], 0xHFC00
-; CHECK-NEXT:    [[CMP_SMALLEST_NORMAL:%.*]] = fcmp olt half [[X]], 0xH0400
-; CHECK-NEXT:    [[CLASS:%.*]] = or i1 [[FABS_ONE_NEG_INFINITY]], [[CMP_SMALLEST_NORMAL]]
+; CHECK-NEXT:    [[CLASS:%.*]] = fcmp ord half [[X:%.*]], 0xH0000
 ; CHECK-NEXT:    ret i1 [[CLASS]]
 ;
   %fabs = call half @llvm.fabs.f16(half %x)
   %fabs.one.neg.infinity = fcmp one half %fabs, 0xHFC00
   %cmp.smallest.normal = fcmp olt half %x, 0xH0400
   %class = or i1 %fabs.one.neg.infinity, %cmp.smallest.normal
   ret i1 %class
 }
 
 ; -> ~(zero|subnormal)
 define i1 @fabs_ueq_neginfinity_or_fabs_uge_smallest_normal(half %x) #0 {
 ; CHECK-LABEL: @fabs_ueq_neginfinity_or_fabs_uge_smallest_normal(
-; CHECK-NEXT:    [[FABS:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]])
-; CHECK-NEXT:    [[FABS_OEQ_NEG_INFINITY:%.*]] = fcmp ueq half [[FABS]], 0xHFC00
-; CHECK-NEXT:    [[CMP_SMALLEST_NORMAL:%.*]] = fcmp uge half [[FABS]], 0xH0400
-; CHECK-NEXT:    [[CLASS:%.*]] = or i1 [[FABS_OEQ_NEG_INFINITY]], [[CMP_SMALLEST_NORMAL]]
+; CHECK-NEXT:    [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 783)
 ; CHECK-NEXT:    ret i1 [[CLASS]]
 ;
   %fabs = call half @llvm.fabs.f16(half %x)
   %fabs.oeq.neg.infinity = fcmp ueq half %fabs, 0xHFC00
   %cmp.smallest.normal = fcmp uge half %fabs, 0xH0400
   %class = or i1 %fabs.oeq.neg.infinity, %cmp.smallest.normal
   ret i1 %class
 }

 ;
   %fabs = call half @llvm.fabs.f16(half %x)
   %is.subnormal = fcmp olt half %fabs, 0xH0400
   %is.zero = fcmp oeq half %x, 0xH0000
   %and = or i1 %is.subnormal, %is.zero
   ret i1 %and
 }
 
+define i1 @issubnormal_or_inf_nnan_logical_select_(half %x) {
+; CHECK-LABEL: @issubnormal_or_inf_nnan_logical_select_(
+; CHECK-NEXT:    [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 756)
+; CHECK-NEXT:    ret i1 [[CLASS]]
+;
+  %fabs = call nnan half @llvm.fabs.f16(half %x)
+  %cmpinf = fcmp nnan oeq half %fabs, 0xH7C00
+  %cmp.smallest.normal = fcmp nnan olt half %fabs, 0xH0400
+  %class = select i1 %cmpinf, i1 true, i1 %cmp.smallest.normal
+  ret i1 %class
+}
+
+define i1 @issubnormal_and_ninf_nnan_logical_select_(half %x) {
+; CHECK-LABEL: @issubnormal_and_ninf_nnan_logical_select_(
+; CHECK-NEXT:    [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 240)
+; CHECK-NEXT:    ret i1 [[CLASS]]
+;
+  %fabs = call nnan half @llvm.fabs.f16(half %x)
+  %cmpinf = fcmp nnan one half %fabs, 0xH7C00
+  %cmp.smallest.normal = fcmp nnan olt half %fabs, 0xH0400
+  %class = select i1 %cmpinf, i1 %cmp.smallest.normal, i1 false
+  ret i1 %class
+}
+
 declare half @llvm.fabs.f16(half) #0
 declare half @llvm.canonicalize.f16(half) #0
 declare <2 x half> @llvm.fabs.v2f16(<2 x half>) #0
 
 attributes #0 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
 attributes #1 = { "denormal-fp-math"="ieee,preserve-sign" }
 attributes #2 = { "denormal-fp-math"="ieee,dynamic" }