[PowerPC][llvm-objdump] enable --symbolize-operands for PowerPC ELF/XCOFF.

[Esme]

Summary

--symbolize-operands
When disassembling, symbolize a branch target operand to print a label instead of a real address.

[MaskRay]

llvm/test/tools/llvm-objdump/ELF/PowerPC/elf-disassemble-symbolize-operands.yaml

7 ↗

(On Diff #389361)

Add -NEXT:

43 ↗

(On Diff #389361)

obj2yaml created test file has many redundant things which are noise, e.g. eh_frame, .note.GNU-stack, STT_FILE. They can all be deleted.

How about using assembly with llvm-mc -filetype=obj? The main thing to test is the code sequence which is opaque as the yaml test (Content). An assembly test is easier to update.

llvm/tools/llvm-objdump/llvm-objdump.cpp

981–982

You can order PowerPC before X86 for an alphabetical order.

[jhenderson]

llvm/test/tools/llvm-objdump/ELF/PowerPC/elf-disassemble-symbolize-operands.yaml

1 ↗

(On Diff #389361)

Don't prefix test names with elf- if they're in an ELF subdirectory.

llvm/test/tools/llvm-objdump/XCOFF/disassemble-symbolize-operands.yaml

17–18 ↗

(On Diff #389361)

Similar comment to MaskRay's above - the input probably wants to just be IR or assembly.

[Esme]

Address comments.

[shchenz]

lld/test/ELF/ppc64-toc-call-to-pcrel.s

33

The change is not so straightforward to me.

Could we use <callee>:, <caller>:, <__toc_save_callee>: as the check label content? So it would not be confused with the new added branch target like <__toc_save_callee>.

llvm/test/tools/llvm-objdump/ELF/PowerPC/disassemble-symbolize-operands.ll

2

Can we add a case with internal/external function calls?

4

And maybe another case for CTR loop too?(for bdnz)

llvm/test/tools/llvm-objdump/XCOFF/disassemble-symbolize-operands.ll

3

Can we show the leading-addr? As it can show whether the label matches the addr or not.

[Esme]

1. Address comments.
2. Skip recording branches for function calls in collectLocalBranchTargets();

[jhenderson]

My comments have been addressed. Looks good, but leaving approval to someone who actually knows about the disassembly.

[shchenz]

llvm/test/tools/llvm-objdump/ELF/PowerPC/disassemble-symbolize-operands.ll

30

we can add an internal attribute for the internal function to make sure it is internally called in the function foo. For now, it is not internally called. I saw two external calls there.

Linux system objdump can dump the internal function call as:

78:   89 ff ff 4b     bl      0 <internal>

So it's better llvm-objdump can also dump the internal function call like this.

llvm/tools/llvm-objdump/llvm-objdump.cpp

1002

s/PowerPc/PowerPC/g

1006

Can this logic be added in PPCMCInstrAnalysis? So we don't need the target check here.

[Esme]

Address comments.

llvm/tools/llvm-objdump/llvm-objdump.cpp

1006

I think we should return true for such cases in evaluateBranch(), because they are indeed branch operands, and their targets should be printed just like the behavior of system objdump when no --symbolize-operands is requires.

88:      	bl 0x88 <foo+0x48>
8c:      	nop

[shchenz]

LGTM. Thanks for adding this support.

One minor comment: need to update the doc for PowerPC for --symbolize-operands option in llvm-objdump.rst.

Better to wait for some days before committing.

llvm/test/tools/llvm-objdump/XCOFF/disassemble-symbolize-operands.ll

7

This seems not right, expect .internal here. I guess it should be a legacy issue. Should be ok to do this in another patch.

[Esme]

llvm/test/tools/llvm-objdump/XCOFF/disassemble-symbolize-operands.ll

7

I will leave a TODO for this.

lld/test/ELF/ppc64-toc-call-to-pcrel.s

 # a local function with st_other=1, a TOC save stub is inserted.
 
 # SYMBOL: Symbol table '.symtab' contains 7 entries
 # SYMBOL: 10010000     0 NOTYPE  LOCAL  DEFAULT [<other: 0x20>]   1 callee
 # SYMBOL: 10020000     0 NOTYPE  LOCAL  DEFAULT [<other: 0x60>]   2 caller
 # SYMBOL: 10020020     0 NOTYPE  LOCAL  DEFAULT [<other: 0x60>]   2 caller_14
 # SYMBOL: 10020040     8 FUNC    LOCAL  DEFAULT                   2 __toc_save_callee
 
-# CHECK-LABEL: callee
+# CHECK-LABEL: <callee>:
 # CHECK:       blr
 
-# CHECK-LABEL: caller
-# CHECK:       bl 0x10020040
+# CHECK-LABEL: <caller>:
+# CHECK:       bl 0x10020040 <__toc_save_callee>
 # CHECK-NEXT:  ld 2, 24(1)
 # CHECK-NEXT:  blr
 
-# CHECK-LABEL: caller_14
-# CHECK:       bfl 0, 0x10020040
+# CHECK-LABEL: <caller_14>:
+# CHECK:       bfl 0, 0x10020040 <__toc_save_callee>
 # CHECK-NEXT:  ld 2, 24(1)
 # CHECK-NEXT:  blr
 
-# CHECK-LABEL: __toc_save_callee
+# CHECK-LABEL: <__toc_save_callee>:
 # CHECK-NEXT:  std 2, 24(1)
-# CHECK-NEXT:  b 0x10010000
-
+# CHECK-NEXT:  b 0x10010000 <callee>
 
 .section .text_callee, "ax", %progbits
 callee:
   .localentry callee, 1
   blr
 
 .section .text_caller, "ax", %progbits
 caller:

llvm/docs/CommandGuide/llvm-objdump.rst

.. option:: --stop-address=<address>
   When printing symbols, only print symbols with a value up to ``address``.
 
 .. option:: --symbolize-operands
 
   When disassembling, symbolize a branch target operand to print a label instead of a real address.
 
   When printing a PC-relative global symbol reference, print it as an offset from the leading symbol.
 
-  Only works with an X86 linked image.
+  Only works with PowerPC objects or X86 linked images.
 
   Example:
     A non-symbolized branch instruction with a local target and pc-relative memory access like
 
   .. code-block:: none
 
       cmp eax, dword ptr [rip + 4112]
       jge 0x20117e <_start+0x25>

llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp

 #include "llvm/BinaryFormat/ELF.h"
 #include "llvm/MC/MCAsmBackend.h"
 #include "llvm/MC/MCAssembler.h"
 #include "llvm/MC/MCCodeEmitter.h"
 #include "llvm/MC/MCContext.h"
 #include "llvm/MC/MCDwarf.h"
 #include "llvm/MC/MCELFStreamer.h"
 #include "llvm/MC/MCExpr.h"
+#include "llvm/MC/MCInstrAnalysis.h"
 #include "llvm/MC/MCInstrInfo.h"
 #include "llvm/MC/MCObjectWriter.h"
 #include "llvm/MC/MCRegisterInfo.h"
 #include "llvm/MC/MCSectionXCOFF.h"
 #include "llvm/MC/MCStreamer.h"
 #include "llvm/MC/MCSubtargetInfo.h"
 #include "llvm/MC/MCSymbol.h"
 #include "llvm/MC/MCSymbolELF.h"

 static MCInstPrinter *createPPCMCInstPrinter(const Triple &T,
                                              unsigned SyntaxVariant,
                                              const MCAsmInfo &MAI,
                                              const MCInstrInfo &MII,
                                              const MCRegisterInfo &MRI) {
   return new PPCInstPrinter(MAI, MII, MRI, T);
 }
 
+namespace {
+
+class PPCMCInstrAnalysis : public MCInstrAnalysis {
+public:
+  explicit PPCMCInstrAnalysis(const MCInstrInfo *Info)
+      : MCInstrAnalysis(Info) {}
+
+  bool evaluateBranch(const MCInst &Inst, uint64_t Addr, uint64_t Size,
+                      uint64_t &Target) const override {
+    unsigned NumOps = Inst.getNumOperands();
+    if (NumOps == 0 ||
+        Info->get(Inst.getOpcode()).OpInfo[NumOps - 1].OperandType !=
+            MCOI::OPERAND_PCREL)
+      return false;
+    Target = Addr + Inst.getOperand(NumOps - 1).getImm() * Size;
+    return true;
+  }
+};
+
+} // end anonymous namespace
+
+static MCInstrAnalysis *createPPCMCInstrAnalysis(const MCInstrInfo *Info) {
+  return new PPCMCInstrAnalysis(Info);
+}
+
 extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializePowerPCTargetMC() {
   for (Target *T : {&getThePPC32Target(), &getThePPC32LETarget(),
                     &getThePPC64Target(), &getThePPC64LETarget()}) {
     // Register the MC asm info.
     RegisterMCAsmInfoFn C(*T, createPPCMCAsmInfo);
 
     // Register the MC instruction info.
     TargetRegistry::RegisterMCInstrInfo(*T, createPPCMCInstrInfo);
 
     // Register the MC register info.
     TargetRegistry::RegisterMCRegInfo(*T, createPPCMCRegisterInfo);
 
     // Register the MC subtarget info.
     TargetRegistry::RegisterMCSubtargetInfo(*T, createPPCMCSubtargetInfo);
 
+    // Register the MC instruction analyzer.
+    TargetRegistry::RegisterMCInstrAnalysis(*T, createPPCMCInstrAnalysis);
+
     // Register the MC Code Emitter
     TargetRegistry::RegisterMCCodeEmitter(*T, createPPCMCCodeEmitter);
 
     // Register the asm backend.
     TargetRegistry::RegisterMCAsmBackend(*T, createPPCAsmBackend);
 
     // Register the elf streamer.
     TargetRegistry::RegisterELFStreamer(*T, createPPCELFStreamer);

llvm/test/tools/llvm-objdump/ELF/PowerPC/disassemble-symbolize-operands.ll

+; RUN: llc -mtriple=powerpc64le-unknown-linux-gnu %s -filetype=obj -o %t
+; RUN: llvm-objdump %t -d --symbolize-operands --no-show-raw-insn \
+; RUN:   | FileCheck %s
+
+;; Expect to find the branch labels.
+; CHECK-LABEL: <internal>:
+; CHECK:       <L0>:
+; CHECK-NEXT:        20:      addi 3, 3, 1
+; CHECK-NEXT:        24:      bdnz 0x20 <L0>
+; CHECK-NEXT:        28:      blr
+
+; CHECK-LABEL: <foo>:
+; CHECK:             6c:        b 0x74 <L0>
+; CHECK-NEXT:  <L2>:
+; CHECK-NEXT:        70:        bf  8, 0x94 <L1>
+; CHECK-NEXT:  <L0>:
+; CHECK-NEXT:        74:        clrldi  3, 30, 32
+; CHECK-NEXT:        78:        bl 0x0 <internal>
+; CHECK-NEXT:        7c:        mr  30, 3
+; CHECK-NEXT:        80:        cmplwi  30, 11
+; CHECK-NEXT:        84:        bt  0, 0x70 <L2>
+; CHECK-NEXT:        88:        bl 0x88 <foo+0x48>
+; CHECK-NEXT:        8c:        nop
+; CHECK-NEXT:        90:        b 0x70 <L2>
+; CHECK-NEXT:  <L1>:
+; CHECK-NEXT:        94:        ld 30, 32(1)
+
+define internal i32 @internal(i32 %a) {
+entry:
+  br label %for.body
+
+for.body:
+  %i = phi i32 [ 0, %entry ], [ %next, %for.body ]
+  %next = add nuw nsw i32 %i, 1
+  %cond = icmp eq i32 %next, %a
+  br i1 %cond, label %exit, label %for.body
+
+exit:
+  ret i32 %next
+}
+
+declare void @extern()
+
+define void @foo(i1 %breakcond) {
+entry:
+  br label %loop
+loop:
+  %tmp23phi = phi i32 [ %tmp23, %endif ], [ 0, %entry ]
+  %tmp23 = call i32 @internal(i32 %tmp23phi)
+  %tmp27 = icmp ult i32 10, %tmp23
+  br i1 %tmp27, label %then, label %endif
+then:                                             ; preds = %bb
+  call void @extern()
+  br label %endif
+endif:                                             ; preds = %bb28, %bb
+  br i1 %breakcond, label %loop, label %loopexit
+loopexit:
+  ret void
+}

llvm/test/tools/llvm-objdump/XCOFF/disassemble-symbolize-operands.ll

+; RUN: llc -mtriple=powerpc-ibm-aix-xcoff %s -filetype=obj -o %t
+; RUN: llvm-objdump %t -d --symbolize-operands --no-show-raw-insn \
+; RUN:   | FileCheck %s
+
+;; Expect to find the branch labels.
+; CHECK-LABEL: <.text>:
+;; TODO: <.internal> should be printed instead of <.text>.
+; CHECK-NEXT:         0:      mr 4, 3
+; CHECK-NEXT:         4:      li 3, 0
+; CHECK-NEXT:         8:      mtctr 4
+; CHECK-NEXT:  <L0>:
+; CHECK-NEXT:         c:      addi 3, 3, 1
+; CHECK-NEXT:        10:      bdnz 0xc <L0>
+; CHECK-NEXT:        14:      blr
+
+; CHECK-LABEL: <.foo>:
+; CHECK:             5c:        b 0x64 <L0>
+; CHECK-NEXT:  <L2>:
+; CHECK-NEXT:        60:        bf  8, 0x84 <L1>
+; CHECK-NEXT:  <L0>:
+; CHECK-NEXT:        64:        mr  3, 31
+; CHECK-NEXT:        68:        bl 0x0 <.text>
+; CHECK-NEXT:        6c:        mr  31, 3
+; CHECK-NEXT:        70:        cmplwi  3, 11
+; CHECK-NEXT:        74:        bt  0, 0x60 <L2>
+; CHECK-NEXT:        78:        bl 0x0 <.text>
+; CHECK-NEXT:        7c:        nop
+; CHECK-NEXT:        80:        b 0x60 <L2>
+; CHECK-NEXT:  <L1>:
+; CHECK-NEXT:        84:        lwz 31, 60(1)
+
+define internal i32 @internal(i32 %a) {
+entry:
+  br label %for.body
+
+for.body:
+  %i = phi i32 [ 0, %entry ], [ %next, %for.body ]
+  %next = add nuw nsw i32 %i, 1
+  %cond = icmp eq i32 %next, %a
+  br i1 %cond, label %exit, label %for.body
+
+exit:
+  ret i32 %next
+}
+
+declare void @extern()
+
+define void @foo(i1 %breakcond) {
+entry:
+  br label %loop
+loop:
+  %tmp23phi = phi i32 [ %tmp23, %endif ], [ 0, %entry ]
+  %tmp23 = call i32 @internal(i32 %tmp23phi)
+  %tmp27 = icmp ult i32 10, %tmp23
+  br i1 %tmp27, label %then, label %endif
+then:                                             ; preds = %bb
+  call void @extern()
+  br label %endif
+endif:                                             ; preds = %bb28, %bb
+  br i1 %breakcond, label %loop, label %loopexit
+loopexit:
+  ret void
+}

llvm/tools/llvm-objdump/llvm-objdump.cpp

 }
 
 static void
 collectLocalBranchTargets(ArrayRef<uint8_t> Bytes, const MCInstrAnalysis *MIA,
                           MCDisassembler *DisAsm, MCInstPrinter *IP,
                           const MCSubtargetInfo *STI, uint64_t SectionAddr,
                           uint64_t Start, uint64_t End,
                           std::unordered_map<uint64_t, std::string> &Labels) {
-  // So far only supports X86.
-  if (!STI->getTargetTriple().isX86())
+  // So far only supports PowerPC and X86.
+  if (!STI->getTargetTriple().isPPC() && !STI->getTargetTriple().isX86())
     return;
 
   Labels.clear();
   unsigned LabelCount = 0;
   Start += SectionAddr;
   End += SectionAddr;
   uint64_t Index = Start;
   while (Index < End) {
     // Disassemble a real instruction and record function-local branch labels.
     MCInst Inst;
     uint64_t Size;
     bool Disassembled = DisAsm->getInstruction(
         Inst, Size, Bytes.slice(Index - SectionAddr), Index, nulls());
     if (Size == 0)
       Size = 1;
 
     if (Disassembled && MIA) {
       uint64_t Target;
       bool TargetKnown = MIA->evaluateBranch(Inst, Index, Size, Target);
+      // On PowerPC, if the address of a branch is the same as the target, it
+      // means that it's a function call. Do not mark the label for this case.
       if (TargetKnown && (Target >= Start && Target < End) &&
-          !Labels.count(Target))
+          !Labels.count(Target) &&
+          !(STI->getTargetTriple().isPPC() && Target == Index))
         Labels[Target] = ("L" + Twine(LabelCount++)).str();
     }
 
     Index += Size;
   }
 }
 
 // Create an MCSymbolizer for the target and add it to the MCDisassembler.